JPS6038897B2 - automatic equalizer - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to modification of a traversal type automatic equalizer in multilevel data transmission using quadrature amplitude modulation or mixed transmission of sampled analog and digital information.

An automatic equalizer for quadrature amplitude modulation uses two systems of tapped delay lines whose input signals are the two output signals of a two-way synchronous detector. In many cases, a method is used in which the signals taken out from two taps are converted by a pair of tap gains, for example, Ci and di, in a two-dimensional bridge type circuit as shown in FIG.

Hereinafter, the circuit shown in FIG. 1 will be referred to as a two-dimensional bridge type circuit, and a variable attenuator using this circuit will be referred to as a two-dimensional bridge type variable attenuator.

A method of correcting the tap gain of such an equalizer is to use a pair of error signals created from the difference between a pair of equalized output signals and an estimated value obtained from the pair of brushed output signals. , a method is used in which the input signal to the pair of taps to be corrected is extracted using a two-dimensional bridge circuit similar to the circuit shown in Figure 1, the information to be corrected is extracted, and the tap gain is corrected. I came.

When this method is used, it is necessary to multiply the number of taps by four times in order to change the variable attenuation of the equalizer, which is one reason for complicating the circuit configuration of the automatic equalizer.

By performing correction using only one side of the error signal, the present invention reduces the number of multiplications for correction by half while maintaining the same equalization characteristics as before, and also uses the input that is not used as error signal information. This invention relates to an automatic equalizer that can also use sampled analog information as a signal.

The principle of the present invention will be explained below. The outputs x(t) and y(t) of two-mari synchronous detection are expressed by the following equations.

X(t)=that {aip(t-iT) -biq(t-iT)}.・．． '11 y(t)=. Z {aip(t-iT) ten bip(t-iT)} ...(2} However, ai and bj are the transmission data, T is the data interval, and p(t) is 2 times from the input point of the transmission data ai.
The overall impulse response, q(t), from the input point of the transmission data ai to the x-side output point of the axis-synchronous detection output is 2
This is the total impulse response up to the y-side output point of the synchronous detection output.

Assuming that the timing is set appropriately, t=
Consider the response at nT. When x(iT), y(iT), etc. are expressed as Xj, yi, etc., respectively, the {1} formula and '
Equation 2' is as follows. ×n ni efforts {aipn・;
-biqn-i} ...[3}yn=. Z {
aipn-; ten bipn-i}.・．． [
4}Here, let the mutually orthogonal components be Xn=×n+jyn
…[5}Pn=pn ten iqn
...side Ah=an+jbn
...If we decide to express it as a complex number like [7}, '3} and ■ expressions can be collectively written as Xn=
Z AnPn-i・
... is expressed as {81.

This is expressed as a complex number tap gain CI=cl
dl...[9'
When equalized using a transversal filter having a variable attenuator, the output is a signal expressed as a complex number Gn=gn+ihn...[1
It is expressed as follows using 0.

Gn=also IC-xn-. ...(11)
〆=0 Here, the number of taps is N.

In equation (2), for example, applying the attenuation amount CI expressed as a complex number to the signal ×n-- expressed as a complex number can be realized by the two-dimensional bridge type circuit shown in FIG. Here, consider the following modification formula for sequentially modifying Ck. Ckn+・=C RyoichiQx壬，en
...(12) However, Q' is a correction coefficient, and C is false or C
It means the value of k at time n, and * is a complex number conjugate.

Further, en follows the following formula. en=gn-an
...(13) What needs to be noted here is that in equation (13), the quantities en, gm an are not complex numbers,
It is a real number.

This means that only one error of the baseband equalization output is used for equalization. Therefore, in the calculation of the second term on the left and right sides of equation (12), X*,en requires two multiplications for one tap. In a state where equation (12) is considered to have converged sufficiently, the expected value of CQ11 and the expected value of C8 are equal, and therefore the expected value E of ×n*-ken
{x en} must be 0.

XZken =・・・(
14), so N-1 E{X cow ken}=sa.

{CIE(Xnhalfk.XM)1d! E(X da〆yn-,
)} − E {
)=0 However, (i±0)E(bn,bn-:)=O
E (a zero) = E (b poison) is established, only the term E (a mine) or E (b customer) remains, and E (xgokXn-・) = E {wheat (ai-io) ( P sail-i-Mn-k-i)X
2(aipn・toi′−biqn−,−i)}Here, if n−k−i is replaced with i, the above formula becomes E〈a house). 1
2P*. (p k → 10 jq days k →) = E (a's house) I Giichi's P Ki Pi Sen - (16) Similarly, E (x Yo k, y elbow) = E {Z (ai - 瓜i) (pn-k-i-J
qn-k-,)×Z(aiqn-,-i′tenb′ip
n-, -i') = E (a reed) Z P child (qi + k +, ten ipi + kH) = -i・E (a expense), wife P * Pi + k-
,---(17)E(×bukan)=E{Z(ai-i
bi) (pn-day-Jqn-k-i) a=E (a zero)
・(p-k-jq-k)=E(a climb)P〆k
...(18) Therefore, in order to satisfy E(Xdaken)=o, from equations (16), (17), and (18), N-
1 Cloud
N-1 is E {a Korea} thousand.

More, more ≧. C, i-p*Pi conversion-, = Pk must hold. On the other hand, when correction is performed using a pair of error signals, the following correction formula is usually used.
CG+・=CQ-QX*-kEn ---(2
0) However, En follows the following formula.

En=Gn-An...(21)(20
) formula follows the algorithm that minimizes the squared error.
AYASHI) by IEEE Transactions on Comic Union (lEEE)
TRANSACTIONS ONCOMMUNICAT
In the June 1971 issue of ION magazine, there was an article titled ``Simultaneous Adaptive Establishment and Decision Algorithm Four Carrier Modulated Data Transmission Systems (Simu
ltaneousAdapt; Ve Estimati
on and Decision AIg.

teithmbr caner Modified D
It is well known from formula 83 on page 276 of a paper published under the title ``Ata TransmlsslonS 侭TEM)''. According to this method, equation (20) requires a complex number subtraction for each tap, and therefore requires four multipliers or four multiplications as shown in FIG. In this case, the formula that Ck should satisfy in a sufficiently converged state is E(Xice-,E,)=0...(22
), in the same process as shown in (15), (16), (17), (18),
−・iP*k ---(23) is obtained.

Since Equation (23) completely matches Equation (19), it turns out that the two methods described here can converge to completely equivalent states. In this way, even if one of the two baseband signals is used, an automatic equalizer correction method is obtained that allows the correction to be made in exactly the same way as using the conspiracy information on both sides, and the circuit is simplified. It is possible to obtain equalization means even when the other signal is an analog signal and it is difficult to obtain estimated data by judgment. Also, in equation (13), the error signal is defined as the difference between the equalized output signal and the transmitted data, but when the equalizer is very close to convergence, the error signal is replaced by the equalized output signal instead of the transmitted data. There is no practical problem even if the estimated data obtained is used. Based on the above principle, the present invention can achieve the same effect even when using an equalizer that performs correction using error signals on one side as when correction is performed using error signals on both ends. It is useful for simplifying the circuit for correction, and can also be used for adaptive equalization in transmission when one side is an analog signal, so it has extremely high practical value.

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 2 is a diagram showing an embodiment of the present invention. In FIG. 2, two mutually orthogonal baseband signals Xn demodulated by a two-axis synchronous detector enter terminals 1 and 2.
A delay line in which delay elements 3-1 and 3-2 are connected in series is connected to terminal 1, and a delay line in which delay elements 4-1 and 4-2 are connected in series is connected to terminal 2. The delay times of delay elements 3-1, 3-2, 4-1 and 4-2 are all equal to data interval T. Two pairs of signal lead-out lines 6--7, 6-2 and 7-2, 6-3 and 7-3 are led out from the connection lines connecting each delay element, and the above three Integrators 17-1 and 18-1, 17-2 and 18-2, 17
The tap gains output from -3 and 18-3 act. The output of each two-dimensional bridge type circuit is connected to line 2 at accumulator 8.
The signals flowing to 1-1, 21-2, 21-3 are accumulated,
The accumulator 9 accumulates the signals flowing through the lines 22-1, 22-2, and 22-3, and outputs the signals to terminals 10 and 1, respectively.
1, an equalized output signal Cn is output. The signal outputted from the terminal 10' is simultaneously input to the determination circuit 13, which samples it at an appropriate timing and outputs estimated data. The estimated data output by the judgment circuit 13 and the terminal 1
The difference between the equalized output signal and the same output signal as that outputted from the output terminal is taken by a subtraction circuit 14, and an error signal en is outputted to a line 12. The signal output to the line 12 is connected to the lead wires 6-1, 6.
-2, 6-3, 7-1, 7-2, 7-3 output signals and multipliers 19-1, 19-2, 19-3, respectively.
20-1, 20-2, and 20-3, thereby obtaining X*len, the second term on the right side of equation (12).
These are attenuators 15-1, 15-2, 15-3, respectively.
, 16-1, 16-2.16-3 is multiplied by -Q or +Q, and the integrator 17 is
-1,17-2,17-3,18-1・18-2,18
By changing the contents of (13), equation (12) is modified to obtain a new tap gain. Note that the multiplier 19-1, 19-2, 19-3, 20-1, 20-2, 20-
3. Subtractor 15-1, 15-2, 15-3.16-1,
16-2, 16-3, and integrators 17-1, 17-2
, 17-3, 18-1, 18-2, and 18-3 constitute means for modifying the amount of attenuation of the variable attenuator. In the above embodiment, to derive the error signal, the subtracter 14 takes the difference between the equalized output signal and the estimated data output from the determination circuit 13, but instead of using the estimated data here, A similar effect can be expected by using a prepared reference signal. Furthermore, although the above embodiment has been described in the case where the delay element is an analog one, the entire apparatus of the present invention can be implemented as a digital circuit by installing an AD converter at terminals 1 and 2 in FIG. 2, for example. It's easy.

[Brief explanation of drawings]

FIG. 1 is a block diagram for explaining the operation of a two-dimensional bridge type circuit used in the present invention, and FIG. 2 is a block diagram of an embodiment of the present invention. In FIG. 2, 3-1, 3-2, 4-1, 4-2 are delay elements, 5-1, 5-2, 5-3 are two-dimensional bridge type circuits shown in FIG. 1, 8, 9 is an accumulator, 13 is a judgment circuit,
14 is a subtraction circuit, 15-1, 15-2, 15-3, 16
-1, 16-2, 16-3 are attenuators, 17-1, 17-
2, 17-3, 18-1, 18-2, 18-3 are integrators, 19-1, 19-2, 19-3, 20-1, 20-2
, 20-13 is Tori Sanki. O diagram O 2 diagram

Claims (1)

[Claims] 1. In a demodulator for data transmission using orthogonal amplitude modulation, two delay lines input two mutually orthogonal baseband signals demodulated by a two-axis synchronous detector, and the first delay line. a set of a plurality of signals given different delays of integral multiples of a fixed time, which are extracted from the second signal;
For a set of signals given different delays of integer multiples of a constant time drawn from the delay line of , it acts on each pair of signals in both sets delayed by the same time. a plurality of two-dimensional bridge type variable attenuators; and two outputs from each of the two-dimensional bridge type variable attenuators.
means for collecting only the first signal out of the two signals and calculating their sum; means for collecting only the second signal output from each of the two-dimensional bridge variable attenuators and calculating their sum; a determination circuit for receiving as input one of the two equalized output signals obtained by the means for calculating the sum of the signals, estimating transmission data from this signal, and outputting the estimation result; and an input of the determination circuit. and a subtracter that calculates the difference between the outputs and obtains an error signal; and means for correcting each attenuation amount of all the variable attenuators by using a set of all output signals of the two delay lines and the error signal. An automatic equalizer characterized in that it has: and removes intersymbol interference.