JPS6148300B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention is based on orthogonal amplitude modulation (hereinafter referred to as offset orthogonal This relates to an automatic equalizer for amplitude modulation (also known as amplitude modulation).

Offset orthogonal amplitude modulation has various advantages such as resistance to nonlinear distortion, and has attracted attention in recent years, but an effective automatic equalization method has not yet been developed. In the present invention, the method that has been conventionally used for quadrature amplitude modulation,
This invention provides an automatic equalizer using a two-dimensional transversal filter.

Conventionally, automatic equalizers for quadrature amplitude modulation use two systems of tapped delay lines that take the two output signals of a two-axis synchronous detector as input signals, and use the corresponding tapped delay lines attached to each tapped delay line. A method is often used in which signals taken out from two taps are converted by a pair of tap gains, for example, c _i and d _i in a two-dimensional bridge type circuit as shown in FIG.

Hereinafter, the circuit shown in FIG. 1 will be referred to as a two-dimensional bridge type circuit, and a variable attenuator using this circuit will be referred to as a two-dimensional bridge type variable attenuator.

In order for equalization using such an equalizer to be possible, both output streams of information must be optimized with the same tap gain. It will be shown below that two series of information are both optimized with the same tap gain.

Two-axis synchronous detection output x ^R (t) and x ^I
(t) is expressed by the following formula.

However, a _i and b _i are the transmission data, T is the data interval on one side, and g(t) is the transmission data a
The overall impulse response from the input point of _i to the x ^R side output point of the 2-axis synchronous detection output, h(t) is the total impulse response from the input point of the transmitted data a _i to the 2-axis synchronous detection output X ^I side output point. It is considered as a comprehensive impulse response.

A transversal filter having four types of values per delay is applied to this signal as shown in the following equation.

Here, the number of taps is 2L+1.

If we consider a least squares type automatic equalizer using this transparsal filter, the error to be minimized is the sum of squares of the difference between the estimated value and the output at sample values every T for each output.

E ^R _o =(y ^R _o −a _o ) ² (5) However, y ^R _o , y ^I _o+ 〓 are y ^R (t) and y
Sample values of ^I (t) at t=nT and t=(n+1/2)T. Hereinafter, the sample values of the various quantities mentioned above at the interval T will be expressed by the same subscripts. Equation (5) and (6)
In order to minimize the equation, the partial differential at each tap gain should be set to zero. The partial differential is becomes. However, assuming randomness of the transmitted information sequence, the expected values of equations (7) to (10) are as follows.

In formulas (7) to (15), all are in the range (+L>m>-L).

In these equations, equations (11), (13), (12), and (14) have exactly the same form except for the tap gain term. The final goal of automatic equalization is equation (11) ~
Since the purpose is to give a tap gain that makes equation (14) 0, the determined tap gain is c ^R1 = c ^R
2 , c ^I1 = c ^I2 . This shows that automatic equalization in offset quadrature amplitude modulation can be realized using a two-dimensional transparsal filter in the same way as automatic equalization in normal quadrature amplitude modulation.

The first invention of the present invention is based on formulas (7), (8), (9), and (10).
This is a circuit configuration that realizes automatic equalization using the steepest descent method based on the formula, and is characterized by realizing automatic equalization of offset quadrature amplitude modulation with the same circuit configuration as that of ordinary quadrature amplitude modulation. .

In the second invention of the present invention, formula (9) and (10)
This is a circuit configuration that realizes automatic equalization using the steepest descent method based on equations or equations (11) and (12).
The present invention is characterized in that automatic equalization of offset quadrature amplitude modulation is realized with a simpler circuit configuration than ordinary quadrature amplitude modulation.

Examples will be described below with reference to the drawings. FIG. 2 is an embodiment of a two-dimensional transversal filter used for automatic equalization, which is common to the first and second inventions. In FIG. 2, two mutually orthogonal baseband signals demodulated by a two-axis synchronous detector enter terminals 1 and 2. A delay line in which delay elements 3 and 4 are connected in series is connected to terminal 1, and terminal 2
A delay line in which delay elements 5 and 6 are connected in series is connected to. The delay times of delay elements 3, 4, 5 and 6 are all equal to the data interval T. Two pairs of signal lead-out lines 26 and 29, 27 and 30, and 28 are connected to the connection lines connecting each delay element.
and 31 are drawn out, and terminals 10 and 1 are connected to the two-dimensional bridge type circuits 7, 8, and 9 shown in FIG.
Tap gains output from 1, 12, 13, 14, and 15 act. As the output of each two-dimensional bridge type circuit, the signals flowing on the lines 20, 21, and 22 are accumulated in the accumulator 16, and the signals flowing on the lines 20, 21, and 22 are accumulated in the accumulator 17.
Signals flowing through terminals 3, 24, and 25 are accumulated, and equalized output signals are output to terminals 18 and 19, respectively.

FIG. 3 is an embodiment of the tap gain correction circuit portion of the first invention. In FIG. 3, the equalized output signals inputted to terminals 18 and 19 are sampled in sampling circuits 32 and 33 at intervals of data interval T and shifted by T/2 from each other, and are sampled by threshold circuits 32 and 33, respectively.
4 and 35. The difference between the input and output of threshold circuits 34 and 35 is taken by subtracters 36 and 37, and error signals are outputted to lines 45 and 46. One terminal 38, 39, 40, 41, 42 and 43
From there are tracks 26, 29, 27, 30, respectively.
Signals branched from 28 and 31 enter, and are applied to the previous error signal and multipliers 62, 63, 64, 65, 6.
6, 67, 68, 69, 70, 71, 72, 73
It is multiplied by switch 50, 51, 52,
53, 54, 55 alternately open and close in synchronization with the sampling circuits 32, 33, and the switch 50 opens and closes the multiplier 62.
and 65, one of the outputs of multipliers 63 and 64 is selected by switch 51, and added to the previous result by integrators 56 and 57 to output a new tap gain to terminals 10 and 11. Similar selections are made for the other taps and the integrator 5
Terminals 12, 1 through 8, 59, 60, 61, etc.
The tap gain value is output to 3, 14, and 15.
By repeating these operations once per data interval, automatic equalization by sequential correction becomes possible.

FIG. 4 shows an embodiment of the tap gain correction circuit portion of the second invention. In FIG. 4, the equalized output signal input to the terminal 18 is sampled at a data interval T by a sampling circuit 74 and input to a threshold circuit 75. A subtracter 76 calculates the difference between the input and output of the threshold circuit 75 and outputs an error signal to a line 89. One terminal 3
From 8, 39, 40, 41, 42 and 43,
Signals branched from lines 26, 29, 27, 30, 28 and 31 respectively enter, and are applied to the previous error signal and multipliers 77, 78, 79, 80, 81 and 8.
2, and the integrators 83, 84,
85, 86, 87 and 88 are added to the previous results to output a new tap gain at terminals 10, 11, 12, 13, 14 and 15. By repeating these operations once per data interval, automatic equalization by sequential correction becomes possible.

[Brief explanation of the drawing]

FIG. 1 shows an embodiment of a two-dimensional bridge type variable attenuator used in the present invention, FIG. 2 shows an embodiment of a two-dimensional transparsal filter used in the present invention, and FIG. This is an embodiment of the tap gain correction circuit according to the invention, and FIG.
1 is an embodiment of the tap gain correction circuit of the invention. In the figure, 3, 4, 5, 6 are delay elements, 7,
8, 9 are two-dimensional bridge type variable attenuators, 16, 1
7 is an accumulator, 32, 33, 74 are sampling circuits, 3
4, 35, 75 are threshold circuits, 36, 37, 76 are subtracters, 62, 63, 64, 65, 66, 67,
68, 69, 70, 71, 72, 73, 77, 7
8, 79, 80, 81, 82 are multipliers, 50, 5
1, 52, 53, 54, 55 are switch circuits, 5
6, 57, 58, 59, 60, 61, 83, 8
4, 85, 86, 87, and 88 are integrators.

Claims (1)

[Scope of Claims] 1. A demodulator for offset quadrature amplitude modulation data transmission, comprising two delay lines receiving two mutually orthogonal baseband signals demodulated by a two-axis synchronous detector; a set of a plurality of signals given different delays of integral multiples of a fixed time drawn from the first delay line, and given different delays of integral multiples of the fixed time drawn from the second delay line; a plurality of two-dimensional bridge type variable attenuators that act on each pair of signals included in both sets and delayed by the same time for a plurality of sets of signals; and each of the two-dimensional bridge type variable attenuators. There is a means for collecting only the first signal of the two signals outputted by the variable attenuators and calculating their sum, and a means for collecting only the second signal outputted from each two-dimensional bridge type variable attenuator and calculating their sum. The means for calculating the sum and the two equalized output signals obtained by the means for calculating the two sums are sampled at the same sampling interval as the transmission information sequence and at sampling points shifted by half the sampling interval, and each two determination circuits for estimating transmission information based on sample values at sampling points and outputting the estimation results; a subtracter for calculating an error signal by taking the difference between the input and output of each of the determination circuits; means for correcting each attenuation amount of all variable attenuators by using a set of all output signals of the two delay lines and the error signal, and is equivalent to a normal quadrature amplitude modulation automatic equalizer. An automatic equalizer characterized in that it removes intersymbol interference with the ability to remove intersymbol interference. 2. In a demodulator for offset quadrature amplitude modulation data transmission, two delay lines input two mutually orthogonal baseband signals demodulated by a two-axis synchronous detector, and two delay lines extracted from the first delay line. a set of a plurality of signals given different delays that are an integral multiple of a given time, and a set of multiple signals given different delays that are an integral multiple of a given time drawn out from the second delay line. On the other hand, a plurality of two-dimensional bridge type variable attenuators act on each pair of signals delayed by the same time included in both sets, and two-dimensional bridge type variable attenuators output from each of the two-dimensional bridge type variable attenuators. means for collecting only the first signal out of the two signals and calculating the sum of the two signals;
, and one of the two equalized output signals obtained by the means for calculating the two sums is sampled at the same sampling interval as the transmitted information sequence, and the signal at that sampling point is a determination circuit for estimating transmission information based on sample values and outputting the result; a subtracter for calculating an error signal by taking the difference between the input and output of each of the determination circuits; and a subtracter for obtaining an error signal for all of the variable attenuators. means for correcting each attenuation amount by using a set of all output signals of the two delay lines and the error signal, and intersymbol interference with the same ability as a normal quadrature amplitude modulation automatic equalizer. An automatic equalizer characterized in that it removes.