JPS6041482B2 - double balanced connection circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION It is an object of the present invention to provide a double balanced connection circuit that can be applied to various circuits including modulation circuits.

Hereinafter, an embodiment of the present invention will be described with reference to FIG. 1. In FIG.
connected to the base of

In this case, input signal source 1 is connected such that transistors 2 and 3 operate differentially. transistors 2 and 3
The emitters are connected to a common constant current source 6 via emitter resistors 4 and 5, respectively. Further, 7 indicates a second signal voltage source, such as a carrier wave signal source, and this carrier wave signal source 7 is connected to the bases of transistors 8 and 9. In this case, carrier signal source 7 is connected in such a way that transistors 8 and 9 operate rhombically. The outer collector terminals of transistors 8 and 9 are connected to the power supply terminals (10 Vcc). transistor 8
The emitter of transistor 9 is connected to the collector of transistor 2 via diode 10 and is followed by the base of transistor 13, and the emitter of transistor 9 is connected via diode 11 to the collector of transistor 3 and connected to the base of transistor 12. connected to. Furthermore,
The collector of transistor 2 and the emitter of transistor 12 are connected, and the collector of transistor 3 and the emitter of transistor 13 are connected. The collectors of the transistors 2 and 13 are connected in common, a load resistor 14 is connected between the connection point of the transistors 2 and 13, and a power supply terminal (10Vcc), and an output terminal 15 is led out. In the above-described embodiment of the present invention, the base of the transistor 8 has a second
The carrier voltage v8 shown in Figure A is supplied, and the transistor 9
A carrier wave voltage v9 shown in FIG. 2B is supplied to the base of .

Here, in period 1 in which the base voltage v8 of the transistor 8 is higher than the base voltage v9 of the transistor 9, the transistor 8 is turned on and the transistor 9 is turned off. Therefore, transistor 13 and diode 10 are turned on, and transistor 2 and diode 11 are turned off. In period 0, when the relationship between the base voltages of the next transistors 8 and 9 is reversed, conversely, the transistors 9 and 9
12 and diode 11 are turned on, transistors 8 and 1
3 and diode 10 are turned off. Therefore, if the base-emitter forward voltage drops of transistors 8, 9, 12, and 13 are equal to the forward voltage drops of diodes 10 and 11, then diode 10 (a diode-connected transistor can be considered) ) and the transistor 12 can be regarded as a differential amplifier, and similarly the diode 11 and the transistor 13 can also be regarded as an amplifier. In addition, as shown by the solid line in FIG. 2C, the input signal source 1 generates a collector current i2 of the transistor 2.
If, on the other hand, the collector current i3 of the transistor 3 flows as shown by the broken line, the collector current i,3 flows through the transistor 3 which is in the on state in the period 1 as shown in FIG. In this case, the collector current i,2 flows through the transistor 12 which is in the on state. The output voltage taken out from the output terminal 15 also has the same waveform as in FIG. 2D. In this way, an output obtained by multiplying the input signal and the carrier wave can be obtained. Here, when there is no carrier wave input, the base DC light positions of transistors 8 and 9 are equal, and only signal input is performed, diode 10 and transistor 1
2 is a differential amplifier, and diode 11 and transistor 13 are also differential amplifiers with zero offset, so the collector currents i, 2 and i, 3 of transistors 12 and 13 are equal in magnitude and have opposite polarities, and the output is constant. The DC potential is .

Conversely, when there is no signal input, the base DC potentials of transistors 2 and 3 are equal, and only a carrier wave is input, the output will be a constant DC potential. In the present invention, both signal input and carrier wave input are balanced. Note that the output terminal 15 is not a common connection point between the collectors of transistors 12 and 13, but the collectors of transistors 8 and 9 are connected in common, and a load is connected to this common connection point to derive the output terminal. Also good.

It will be obvious that the input signal source 1 and the carrier wave signal source 7 may be applied to the bases of the transistors 2, 3 and 8, 9 in a single-ended manner.

[Brief explanation of the drawing]

FIG. 1 is a connection diagram of an embodiment of the present invention, and FIG. 2 is a waveform diagram of each part used to explain its operation. 1 is an input signal source as a first signal voltage source, and 7 is a carrier wave signal source as a second signal voltage source. Figure 1 Figure 2

Claims (1)

[Claims] 1 A common constant current source 6 is connected to the emitters of transistors 2 and 3, a first signal voltage source 1 is connected to the bases of transistors 2 and 3 so that they operate differentially, and transistors 8 and 9 A second signal voltage source 7 is connected to the base of the transistor 8 so as to operate differentially, and the emitter of the transistor 8 is connected to the collector of the transistor 2 via a diode 10.
The emitter of transistor 9 is connected to the collector of transistor 3 via diode 11, and the base of transistor 12 is connected to
The emitter of transistor 12 is connected to the collector of transistor 2, the emitter of transistor 13 is connected to the collector of transistor 3, and transistors 12 and 1 are connected to each other.
A double balanced connection circuit in which the collectors of 3 are commonly connected and the output is taken out from this common connection point.