JPS6053333B2 - Microprogram control data processing device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a microprogram controlled data processing device;
Particularly when performing digital signal processing in real time, such as when an automatic equalizer in a communication system is configured using a microprocessor, input data is input intermittently, resulting in a margin of processing time. This invention relates to a microprogram-controlled data processing device in which idle periods of processing time are not wasted on a control memory by a wait instruction and a restart signal, and are made transparent to a processor.

In the case of a data processing device that executes digital signal processing in a communication system in real time, input data is generally input discretely at a predetermined period, as can be seen from the time chart shown in FIG. The data processing device processes the discretely input data, and generally the individual processing period for each input data is smaller than the input cycle of the input data. For this,
In data processing devices, so-called idle time often occurs. In a microprogram-controlled data processing device, if the NOP instruction is executed when the above-mentioned free time occurs, a lot of space will be wasted on the control memory. On the other hand, in a microprogram-controlled data processing device, a wait instruction is prepared to stop the running of the microprogram, and when the wait instruction is executed, the microprogram counter is prohibited from counting up and the data processing device The practice is to put it in a dormant state.

Then, the microprogram and counter are counted up at the timing when an external start pulse is applied. However, when starting by the start pulse, the details are omitted, but the contents read from the control memory when the wait instruction was executed first are stored in the microprogram counter based on the start pulse. It is made to be set. That is, the program jumps to the address indicated by the above content. Therefore, if the above-mentioned wait instruction and start ● pulse are used as they are and the data processing device is placed in a hibernation state during the above-mentioned idle time, processing will be restarted from an undesired address at the next count-up. I don't like it.

The present invention aims to solve the above points,
While using the wait command, you can proceed with the process from the next address when restarting, or prepare a start pulse (RST pulse), and use the above start pulse (ST pulse).
The purpose of this is to enable processing to be done separately from restarting.

Therefore, the microprogram-controlled data processing device of the present invention maintains a microprogram counter in a non-increasing state by a wait instruction in a data processing system having a random access memory and a microprogram-controlled data processing device. In addition, on the control memory storing the above microprogram,
A processing program corresponding to a series of input data is divided and arranged into partitioned processing programs corresponding to individual input data, and the above-mentioned wait instruction is prepared at the end of the partitioned processing program, and the wait instruction is placed at the address next to the wait instruction. A jump instruction indicating the start address of the program is stored, and after the wait instruction is executed, the jump instruction is executed when a start signal is given, and the jump instruction is ignored when a restart signal is given. The present invention is characterized in that the contents of the microprogram count are allowed to advance and the classification processing program corresponding to the next input data is executed. This will be explained below with reference to the drawings.
FIG. 1 is an explanatory diagram conceptually explaining the operation of the data processing device of the present invention, FIG. 2 is an explanatory diagram explaining one embodiment of program storage on the control memory, and FIG. 3 is a wait instruction and start・An explanatory diagram illustrating processing using a pulse (ST pulse), FIG. 4 is an explanatory diagram illustrating processing using a wait command take start pulse (RST pulse) used in the present invention, and FIG. 5 shows the main points of the present invention. An example representing the section is shown below.

As shown in FIG. 1, a program processing period is started by a start ● pulse (abbreviated as ST pulse).

As stated at the beginning of this specification, when performing online processing, input data (input 1, input 2, etc.) are input discretely, and the processing time for processing each individual input data is relatively short. This is sufficient, resulting in downtime in processing.
In the case of the present invention, as shown in FIG. 2, there is a wait (WAIT) instruction at the end of the classification processing programs 1-1, 1-2, 1-3, etc. that perform processing on individual input data on the control memory 1. is prepared, and when the partition processing program is executed, a wait instruction is automatically executed to cause the data processing device to enter a hibernation state. Then, according to the timing when the next new input data arrives,
By the start pulse (abbreviated as RST pulse),
Causes the next partition processing program to be executed. In addition,
Addresses 1+1, m+1, n+1, . . . shown in FIG. 2 are used at the time of activation by the ST pulse, which will be explained with reference to FIG.
It can be considered as a dummy address when activated by T pulse. That is, "08" stored at the address next to the wait instruction shown in FIG. 2 is a jump instruction indicating the starting address of the processing program (in the figure, it refers to the entire three divided processing programs T3 to T3). Therefore, when executing a processing program from the beginning with the start pulse, "08" is set in the program counter, but when executing the next segmented processing program with the restart pulse, Nipa08 is ignored as a dummy, the program counter continues to increment, and the next classification processing program is read out. FIG. 3 is an explanatory diagram illustrating processing using wait commands and ST pulses, which is the premise of the present invention.

The figure shows the processing from the time when the instruction read from the control memory is a wait instruction due to the content "1" of the program counter. When the wait instruction is decoded, the illustrated count enable signal becomes a logic "0" and the program counter stops counting up. At this timing, as shown in FIG. 1, data 2 (next microinstruction) corresponding to the content "2" of the program counter is read out from the control memory. Then, when a start pulse is given,
For example, count preset processing is performed in synchronization with the processing phase of the data processing device PH4, and as shown in the figure, data 2 that has been read from the control memory is set in the program counter, and the contents of the program counter are Based on this, the control memory is accessed. As shown in Figure 2, for example, if a wait instruction is prepared at address m, and address information "08" is stored at the next address m+1, the data processing device will stop after the wait instruction at address m is executed. When the ST pulse is applied after entering the state, the address information "08" is set in the microprogram counter as shown in FIG. 3, and the processing is resumed from address "08" thereafter. Suspension and resumption by wait commands and ST pulses are performed as described above, and are extremely convenient when returning processing to the starting point.

However, as shown in FIG.
Input 1" is processed by the processing program 1-1 shown in FIG. 2, and the next input data "Input 2" is executed by the T2 processing program 1-2, and the process is left in a dormant state. , restart by the ST pulse cannot be used. Therefore, in the case of the present invention, an RST pulse is separately prepared, and the second
In the case shown in the figure, for example, address m is executed to enter the hibernation state, and the RST pulse allows the program to resume from address m+2.

FIG. 4 explains processing using wait commands and RST pulses used in the present invention. Assume that data 1 read from the control memory by the content "m" of the program counter is a wait instruction.

In this case, as explained with reference to FIG. 3, counting up of the microprogram counter is prohibited.
The contents of address m+1, ie, data 2, are read from the control memory. When the RST pulse according to the present invention is applied, the counting up of the microprogram counter is restarted as it is in synchronization with phase 4. That is, the content of the counter is m+
1 to m+2, and the first instruction of the processing program 1-2 shown in FIG. 2 is read from address m+2. In the case of restarting using the ST pulse described above, the data 2 is set in the microprogram counter by presetting the program counter.
In the case of ST pulses, the presetting is not performed. Fifth
The figure shows an embodiment representing the main part of the present invention.

In the figure, numerals 2 to 4 are flip-flops, 5 is an AND circuit, 6 is a NAND circuit, 7 is a NOT circuit, 8, 9
each represents a Noah circuit. If data 1 read from address m is a wait instruction as shown in FIG. 4, the flip-flop 2 is reset by the wait instruction.

This causes the count enable signal of the program counter to become 10W. That is, counting up is prohibited. When the RST pulse is applied in this state, the flip-flops 3 and 4 and the NOR circuit 9 differentiate the RST pulse with the phase 3 clock PH3, and the AND circuit 5 synchronizes with the phase 4 clock PH4. Flip-flop 2 is set via . As a result, the microprogram counter is counted up again. When the above wait instruction is executed, the contents of the microprogram counter are m+
1, the content becomes m+2 by restarting the count-up, and processing is restarted from address m+2. When the ST pulse explained in connection with FIG. 3 is given instead of the above-mentioned RST pulse, as shown in the bottom row of FIG. A preset enable signal is issued, and in the case shown in FIG. 4, data 2 is preset to the microprogram counter.

As explained above, according to the present invention, the wait command is used to coordinate the restart with the ST pulse, and the RST
It is designed to give restart by pulse.

Therefore, it is possible to perform a process of processing discretely input input data for a short time and then pausing without wasting the control memory.

[Brief explanation of the drawing]

FIG. 1 is an explanatory diagram conceptually explaining the operation of the data processing device of the present invention, FIG. 2 is an explanatory diagram explaining one embodiment of program storage on the control memory, and FIG. 3 is a wait instruction and start・An explanatory diagram explaining the processing using pulses, and FIG.
FIG. 5 is an explanatory diagram illustrating processing using pulses, and shows an embodiment representing the main part of the present invention. In the figure, 1 is a control memory, 1-1 to 1-3 are processing programs, and 2 to 4 are flip-flops, respectively.

Claims (1)

[Claims] 1. In a data processing system that has a random access memory and a microprogram-controlled data processing device, the microprogram
The counter is maintained in a non-increasing state, and a processing program corresponding to a series of input data is divided into divided processing programs corresponding to individual input data and arranged on the control memory storing the above-mentioned microprogram. The above-mentioned wait instruction is prepared at the end of the partitioned processing program, and a jump instruction indicating the start address of the program is stored at the address following the wait instruction, and after the above-mentioned wait instruction is executed, when a start signal is given. Control is executed to execute the jump instruction, and when a restart signal is given, ignore the jump instruction, allow the contents of the microprogram counter to increment, and execute the classification processing program corresponding to the next input data. A microprogram-controlled data processing device characterized by: