JPS6057771B2 - A/D converter accuracy verification method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an accuracy verification method for an A/D converter, and particularly to an accuracy verification method suitable for application to an A/D converter used in a telemeter system.

A telemeter system has a center and a plurality of slave stations that supply information to the center, and each slave station is connected to a large number of terminal devices.

With this configuration, the center can collect, for example, electricity, gas, water, etc. charges, other analog information, digital information,
Pulse inputs, etc. can be collected from multiple terminal devices by remote control. Now, in the above-mentioned telemeter system, when analog information among the various types of information mentioned above is to be sent to the center, it must first be converted into digital information. For this purpose, each slave station is provided with an A/D (analog/digital) converter. In this case, it goes without saying that this A/D converter must operate with high accuracy in order to realize a highly accurate telemeter system, and various accuracy verification methods have been employed heretofore. Generally, when implementing this accuracy testing method, hardware dedicated to accuracy testing, which will be described later, is provided. However, since this hardware is used only when the telemeter system handles analog information, permanently installing this hardware in all cases would standardize slave station equipment or reduce costs. The disadvantage was that it was uneconomical. On the other hand, in recent years, telemeter systems have become more computerized and each of the slave stations is increasingly configured to include a microprocessor.

Therefore, the above drawbacks should also be solved while considering the use of microprocessors. Therefore, the object of the present invention is to
The object of the present invention is to realize an A/D converter accuracy verification system that can eliminate the above drawbacks by using a microprocessor provided in a slave station.

In accordance with the above object, the present invention provides an accuracy verification system for an A/D converter that sequentially converts analog signals from terminal devices received from a plurality of channels into digital signals. The analog reference voltage is applied to one of the channels, and during accuracy verification, the analog signal from the channel to which the analog reference voltage is applied is A/D converted, and the digital output is compared with the digital signal corresponding to the reference voltage. It is characterized by performing an accuracy test.

The present invention will be explained below with reference to the drawings.

FIG. 1 is a block diagram showing an entire telemeter system for implementing a conventional A/D converter accuracy verification method.

In this figure, a telemeter system 10 is divided into a center 11 and slave stations 12 with a line 13 in between. However, only one slave station is shown. The slave station 12 has a multiplexer 14-1,
14-2... to a large number of terminal devices (not shown), and each channel group 15-1, 15-2...
Various types of information are collected from the terminal device through a corresponding one of the channels. Which channel to select is determined by receiving the address scanned by the word scanning unit 16 through the address bus 17 and the address decoder 18 at the multiplexers 14-1, 14-2, . . . . On the other hand, when one channel is selected, it sends out the corresponding information on line 19. If this information is analog information, it is converted into digital information through the A/D converter 20, sent to the data transmitter 22 through the data bus 21, and transmitted to the center 11. Here, accuracy verification of the A/D converter 20 is performed by the accuracy verification section 23. The timing to perform accuracy test is address decoder 1.
8 via line 21, for example, every cycle. Accuracy testing department receives instructions. 23 is first line 25
supply an analog reference voltage. The accuracy test section 23 receives the digital signal obtained by A/D converting it in the A/D converter 20 through the line 26, and outputs the accuracy test result from the line 27. If there is an abnormality in the result, the center 11 is notified through the data bus 21 and the data transmitter 22. As described above, the conventional A/D converter accuracy verification method requires special dedicated hardware, that is, the accuracy verification section 23, and has the above-mentioned drawbacks. Therefore, the present invention focuses on the fact that recent slave stations 12 are constructed using microprocessors, and uses this microprocessor in combination to eliminate the above-mentioned drawbacks.

FIG. 2 shows a flowchart for implementing the A/D converter accuracy verification method of the present invention, and FIG. 3 shows a block diagram showing the entire telemeter system including the configuration for implementing the flowchart. In addition, in Figure 3, the first
Components with the same reference numbers and symbols as those in the figure are the same components. This will be explained with reference to FIGS. 2 and 3. First, the schematic configuration will be explained in Fig. 3.
This telemeter system 30 is divided into a center 11 and a slave station 12'' with a line 13 in between, and a microprocessor 31 is provided in the slave station 12''. Along with this, RO
M32, RAM (Random Access Memory) 33, and an interface that provides a one-to-one correspondence between the bus line of the terminal device (not shown) and the bus line of the microprocessor 31.
An I/O driver 34 and the like serving as a bus are provided. R
The OM32 contains various control programs, one of which includes an accuracy test program. This accuracy test program starts executing by checking the free time of the microprocessor 31 (step A in FIG. 2). When execution of the accuracy test program starts, first, the A/D converter 20 is activated (step B in FIG. 2). At this time, 15'' is simultaneously specified by the multiplexer 14-1 via the address decoder 18. Then, the analog input applied to channel 1V is converted into a digital signal by the A/D converter 20. The converter 20 originally had A
An analog reference voltage source (shown) for A/D conversion is included, and its output is pre-connected to channel 15''.Thereby, the accuracy verification program converts the analog reference voltage to A/D. After the processing time required for A/D conversion (step C in FIG. 2), the A/D converter 20 outputs digital data corresponding to the analog output of the analog reference voltage source. The data is once stored in a register (not shown) in the microprocessor 31, and then read into the RAM 33 (
Step D in Figure 2). Since the analog output of the analog reference voltage source is a constant known value, the digital data is also a known constant value if normal. Therefore, this known constant value is written in the RAM 33 in advance, and the actually output digital data is compared with the predetermined constant value by a program (E in FIG. 2). If this comparison result is normal, the A/
The verification flag indicating that the D conversion accuracy is abnormal is cleared (step F in FIG. 2). Then, the accuracy test program is ended (step G in FIG. 2). If the comparison result is abnormal, the verification flag is set to ゜゛1゛ (step P in Fig. 2), and the process proceeds to step G. When the verification flag becomes ゜゜1゛, when analog inputs collected from other channel groups are subsequently transmitted to the center 11, the verification flag ゜゜1゛ is set in a part of the data format and the center 11 is notified. . That is, the data format is converted from parallel to serial by a P/S converter 36 from a 1/0 driver 34 through a line 35, and is transmitted to the center 11 via a modulation/demodulation circuit (MOD) 37. Note that the line 38 of the I/O driver 34 is connected to other I/O
This is used for connection with 0. As explained above, according to the present invention, it is possible to test the accuracy of an A/D converter without requiring conventional dedicated hardware, which is advantageous in standardizing slave station devices and reducing costs. It is.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the entire telemeter system for implementing the conventional A/D converter accuracy verification method, FIG. 2 is a flowchart for implementing the A/D converter accuracy verification method of the present invention, and FIG. FIG. 3 is a block diagram showing a telemeter system implementing the A/D converter accuracy verification method of the present invention.

Claims (1)

[Claims] 1 A plurality of channels, one of which is a channel that inputs an analog signal for accuracy verification, and the other channels are a group of channels that input analog signals from each terminal device, and the plurality of channels selected by a multiplexer. A converting said analog signal received from one of said digital signals into a digital signal;
/D converter, and the digital output obtained by A/D converting the analog signal for accuracy test in the A/D converter corresponds to the analog signal for accuracy test prepared in advance. In an accuracy testing method for an A/D converter that compares digital data and tests the accuracy based on the comparison result, the A/D converter has an analog reference voltage for A/D conversion that is An A/D conversion characterized in that an analog signal for accuracy verification is used, and digital data corresponding to the analog reference voltage is used as digital data corresponding to the analog signal for accuracy verification prepared in advance. Accuracy test method for instruments.