JPS605956B2 - Screen editing method in read processor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a screen editing method in a word processor for editing a sentence by mutually replacing a portion of information displayed on a display screen of a display device or the like.

Conventionally, in word processors, for example, the first
When exchanging arbitrary two areas of the text, the X block and the Y block, as shown in the figure, first, the X block and the Y block are each temporarily stored in a storage device (not shown) such as a floppy disk. This requires processing and operations such as deleting the X block, reading the Y block at that position, then deleting the data at the previous position of the Y block and reading the X block at that part, which is difficult for the operator to perform. There was a problem with the increase in the number of documents, making it extremely time-consuming to edit the text.

The present invention has been made to solve the above-mentioned problems in the screen editing method for conventional word processors, and includes:
By setting the memory for storing sentences in a special format and specifying two locations each at the beginning and end of the text area to be replaced, sentences and characters can be stored in a single operation using the free space in the closing memory. It is an object of the present invention to provide a screen editing method for a word processor that allows editing by mutually replacing information such as .

In order to achieve the above object, the present invention displays information stored in a text buffer memory on a display screen of a display device, and edits a text by mutually replacing a part of the information displayed on the display screen. In a screen editing method for a word processor, the text buffer memory is divided into an upper area and a lower area according to an empty area whose starting address is the position of a cursor mark indicating the display position of each character or code on the display screen, and then these upper areas are and the respective first and last addresses of the lower area are stored in registers, respectively, and are different from the areas adjacent to the above-mentioned free area among the areas of the text buffer memory corresponding to the two areas of the above-mentioned display screen to be mutually exchanged. After the data stored in the area is sequentially transferred to the free area from the first address to the last address, the transferred data is transferred to the area of the text buffer where it was stored. Transferring the data stored between the area and the free area as is, and then repeating at least the above series of operations in sequence to mutually exchange arbitrarily specified areas on the display screen. It is characterized by:

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

The basic operation of screen editing using the screen editing method according to the present invention is performed as follows.

First, a word processor (not shown).

) In the text in Figure 1 displayed on CRT (cathode ray tube) display screen 1, two arbitrarily specified blocks,
When exchanging the X block and Y block with each other,
With cursor mark 2, each first position Xs, Ys of the above × block and Y block and each last position ×E, Y
A total of four locations E (indicated by diagonal lines in FIG. 2) are designated. In this case, in order to distinguish the own X block and Y block from other Z blocks, it is preferable to use a display that is inverted from the Z block to make it easier to see.

Next, by pressing the swap key of the word processor, a display is obtained in which the x block and the Y block are swapped with each other, as shown in FIG.

In the above operation, the character input device of the word processor (
Not shown.

) The information in the text buffer that temporarily stores the input signal is processed as follows. Sentences are stored sequentially each time a character is input from the character input device into a text buffer corresponding to a cursor display position on the CRT display screen, and are stored in the order of the input characters.

The text stored in the text buffer is displayed on the CRT display device, and when the cursor mark 2 is moved, for example, from the position shown by the dotted path in FIG. 4a to the position shown by the solid line,
The characters after the cursor display position are moved to the lower part of the text buffer 3, as shown in FIG. 4b, and an empty area 5 is provided between them.

That is, the text buffer 3 is divided around the position of the cursor mark 2, and as shown in FIG. 4b, an upper text buffer (hereinafter referred to as the upper buffer).

) 6U and a lower text buffer (hereinafter referred to as lower buffer) 6L. The starting position of the empty area 5 shown in FIG. 4b is indicated by the pointer (POINTER) 1, and the starting position of the lower buffer 6L is indicated by the pointer D'. First, when moving cursor mark 2 to specify the positions of the × block and Y block,
The value of the pointer at the cursor display position shown in FIG. 1 is set to the X block start address X as shown in FIG.
SADR, X block end address XEADR, Y block start address YSADR, and Y block end address YEADR are stored in register 7.

When the cursor mark 2 is located at position xs in FIG. 1, the text buffer 3 becomes as shown in FIG. 6.

Here, since the start address of the Y block to be replaced, that is, YSADR, is set in register 7 in Figure 5, the text data is transferred from the above YSADR to the position of pointer 1, as shown in Figure 7. Transfer. The number of transferred data at this time is YS stored in register 7 in FIG.
Easier to calculate than ADR and YEADR.

After the above transfer is completed, the contents of the text buffer 3 become as shown in FIG.

Next, we must delete the unnecessary Y block in FIG.
This can be done by transferring down to nth item number.

As a result, Pointaro is also rewritten and the text buffer 3
is as shown in Figure 8.

At this time, XSADR and XEADR in Figure 5 also change, and the new XSADR and new YEAOR are changed to the new XS
ADR = Old XSADR 10 (Y number of block transfers) New XEA
DR; Old XEADR + (Y block transfer number) Next, the first
The Z block between the X block and the Y block shown in the figure is transferred to the upper buffer 6U as shown in FIG.

In this case, data between XEADR+1 and YEADR may be transferred from the pointer 1 position to the upper buffer 6U.

Next, the x block is transferred to the unnecessary Z block position in FIG. 9. This can be done by sequentially filling and transferring data from XEADR to YEADR from the bottom.

As a result, the contents of text buffer 3 become as shown in Figure 10, which is the CRT display screen! Now, as shown in FIG. 11, a screen is obtained in which the x blocks and Y blocks in FIG. 1 are interchanged.

Next, FIG. 12 shows the circuitry of the sentence editing section of a formal word processor that performs the above-mentioned screen editing.

In FIG. 12, 10 is a function key circuit,
It is provided with a cursor movement key 10a, a block (BLOCK) key 10b, and a change (CHANGE) key 10c, respectively, and outputs an encoded signal corresponding to the operated key. The cursor movement keys 10a are used to move the position mark displayed on the CRT display screen 1, and include left, right, up, and down keys.

As shown in FIG. 2, the block key lob is a key that indicates an area when exchanging sentences stored in the sentence buffer 3. That is, it indicates the position of the letter A, '' (line break), letter a, and letter h in Figure 2.

The change key 10c is an execution key for exchanging text in the designated area as described above.

The encoded signal output from the function key circuit 10 is supplied to the control circuit 13, and the encoded signal for the cursor mark 2 is supplied to the cursor control circuit 12.

Furthermore, the coded signal of the flock key 10b is sent to the counter 3.
1, the number of operations of the block key 10b is counted, and the output thereof is supplied to the control circuit 13. calculated from

The cursor control circuit 12 is generally well known and includes a cursor counter (not shown) synchronized with the CRT display.

) and remembers the cursor position according to key operations,
The output is sent to the CRT display device and a cursor mark is displayed at the specified position. The control circuit 13 is a circuit that generates control signals according to the signals supplied by V, as shown in FIGS.
It consists of ROM etc.

15 is the text buffer shown in FIG. 4b, FIG. 6, FIG. 7, FIG. 8, FIG. 9, and FIG. 10, respectively.

The address position of the text buffer 15 is designated by the address circuit 14, and the information in the accumulator 16 is read or written into the accumulator 16 by the R/W signal. The accumulator 16 is the input key circuit 11
This is a buffer memory for storing character information supplied from the computer and writing it into the character buffer 15 or supplying it to the CRT display. In addition, the control circuit 13
It is reset by the A reset signal supplied from V. Address circuit 14 addresses text buffer 15 based on data from OR gate 55.

17 is the first point P consisting of an up/down counter
, and in the initial state, they are all "0" and serve as the start address of the text buffer 15.

This pointer 17 is incremented by 1 when the AND gate 41 is opened.
The output of pointer 17 is supplied to AND gate 51, and P, → ADR supplied from control circuit 13.
It is opened by a signal and is supplied to the address circuit via the OR gate 55. 18 is similar to the above pointer 17,
The second counter P2 is an up/down counter, and in the initial state, the maximum address n of the text buffer 15 is
The value is n+1, which is one more than that, and when the AND gate 43 is opened, the count is amplified by 1, and when the AND gate 44 is opened, the count is decreased by 1.

The output of this pointer 18 is combined with an AND gate 52, and P2→
It is opened by the ADR signal and the data of the pointer 18 is supplied to the address circuit 14. Comparison circuit 23 is pointer 1
This is a circuit that outputs when 7 becomes "0".

The comparison circuit 24 is a circuit that outputs when the pointer 18 reaches n+1.

19, 20, 21, 22 are the registers (Reg),
The data of the pointer 18 is stored in a predetermined state which will be described later.

In addition to the above inputs, the registers 20 and 21 also have an AND gate 46.
, 48, and when this gate is opened, 1
is counted down.

25 None, Shi3kawa is a comparison circuit similar to the above comparison circuits 23 and 24, P2=Regl, Regl=Rechick,
Regl: Reg3, Re chick: Reg3, P2: Reg
3. When the state of P2=Reg4 is reached, it is output and supplied to the control circuit 13.

Next, the operation will be explained.

[1} Operation when character input key 11a is operated Character input operation is performed according to the flowchart 100 in FIG. character code) is output,
The data is stored in the accumulator 16, the P,→ADR signal is output, the AND gate 51 is opened, and the data of the pointer 17 is supplied to the address circuit 14 via the OR gate 55.

Furthermore, when the R/W signal (for example, 1) is output, the data in the accumulator 16 is transferred to the pointer 1 in the text buffer 15.
Store it in the location addressed in step 7. In the initial state, the pointer 17 is set to "0", so it is stored at the beginning of the text buffer 15.

Further, P and 11 are outputted, the AND gate 41 is opened, and the pointer 17 is counted up by 1 and is incremented to 11. This operation is repeated every time a character is input, and the text buffer 15 is stored sequentially from the beginning.

The character code signal is also connected to the cursor control circuit 12, so that the cursor mark 2 is always displayed at the position where the next input is to be made.

■ Operation when operating the cursor movement key 10a Next,
A case in which the cursor mark 2 is moved when making corrections, etc. with the text stored in the text buffer 5 in this manner will be explained with reference to the flowchart 200 in FIG. 13b.

[When moving the cursor to the left]

It is detected whether the pointer 17 is "0", that is, whether the cursor position is at the beginning of the text buffer 15.

This is performed by the comparator circuit 23, and if it is "0", it is output, and error handling, such as generating a sound, is performed. “0”
Otherwise, the process proceeds to flowchart 202 and outputs P,-1. When P, -1 is output, AND gate 42 is opened, pointer 17 is counted down by 1, and 203
P2-1 is output, the AND gate 44 opens, and the pointer 18 is counted down by one. P at 204, → AD
R is output, the pointer 17 is sent to the address circuit 14 via the AND gate 52 and the OR gate 55, and an R/W (for example, "0") signal is output at 205, indicating the position addressed by the pointer 17. The character code of is read out to the accumulator 16.

206 supplies the pointer 18 to the address circuit 14;
The R/W signal (1) is output at 07, and the accumulator 16
Write the code.

Furthermore, the accumulator 16 is reset at 208, the pointer 17 is addressed, and the accumulator 16 is set to "0".
In this way, the character addressed by pointer 17 is transferred to the position addressed by pointer 18.

This operation is repeated every time the cursor back key is operated. That is, the pointer 18 is initially n1, and the character at the cursor indicated position is transferred to the lowest position of the text buffer 15, forming a space therebetween.
When this operation is repeated, the data is transferred sequentially from the lowest order as shown in FIG. 4b. [When the cursor is moved forward] Assuming that the state shown in FIG. is compared with n+1, and if P2=n+1, it is output and the above-mentioned error processing is performed.

If P2=n11, then P2→ADR is output at 2 1 2, the AND gate 52 is opened, the data of pointer P2 is supplied to the address circuit 1 4, and then R is output at 213.
The /W(0) signal is output, and the character code addressed by the pointer 18 is read into the accumulator 16.

Furthermore, P,→ADR is output at 214, the data of the pointer 17 is supplied to the address circuit via the AND gate 51, the R/W (1) signal is output at 215, and the code of the accumulator 16 is set to the position of the pointer P, Write to text buffer 5. Furthermore, A is reset at 216, and 217
Address the pointer 17 from earlier, and R/W at 218.
(1) and clears this address signal. Subsequently, P, 11, and P2 11 are performed at 21 9, 220. This operation is repeated for each cursor forward operation. By doing this, the character at the cursor position in the text buffer 15 is transferred upwards, contrary to the cursor back operation. Other characters can be inserted at this cursor position. That is, you can insert another character before the character at the cursor position. [31 Operation when operating the block key 10b When exchanging sentences for each block as described above, move the cursor mark 2 to the first character position of the block to be exchanged.

In this embodiment, the case where the x block and the Y block shown in FIG. 1 are exchanged is taken as an example.

Therefore, the cursor mark 2 is moved back to the position of the letter A in the X block. At this time, the text buffer 15 repeatedly performs the above operation and reaches the state shown in FIG. When the block key 10b is operated in this state, the operation is performed according to the flowchart shown in FIG. 1
Since this is the second key operation, the P2→Regl signal is output, the AND gate 45 is opened, and the data of the pointer 18 is transferred to the register 19.

That is, the start address (A character position) of the × block is stored. Furthermore, when the cursor is moved to the last character position of the X block (line feed) character, the text buffer 15 performs the operation described above, and the characters A to L of the X block are stored in order from the beginning of the text buffer 15. The following characters are stored in order from the lowest address position of the text buffer 15, with an empty area formed between them.

At this time, P2 indicates the character position of the last character of the block (line feed), and the output of P2→Reg2 opens the AND gate 47 and the data of the pointer 18 is transferred to the register Re.
Transferred to g2. In this manner, the block start and end address values of the x block and the Y block are similarly stored in Regl to Reg4.

When the change key 10c is operated in this state, the operation follows the flowchart shown in FIG. 13d. } Operation when the change key 10c is operated In the flowchart shown in FIG. 13d above, 600 indicates the operation to achieve the state shown in FIG.
0 and 1000 respectively indicate the operation for making the image shown in FIG. 9 and FIG. 10.

When operating the change key 10c, the cursor key 10a
As a result of this operation, a space area (empty area) is formed at the cursor position, and the text buffer 3 is separated (for example, see FIG. 4).

The data in the text buffer 15 is stored in an empty area at the top of the text buffer, as shown in FIG. Therefore, in the flowchart 600, the pointer 17 is set to a character position one higher than the address pointed to by the pointer 17 (P,
11→P,). The lowest character of the upper block indicated by the pointer 17 is addressed and sequentially transferred to the position one level above the lower block indicated by the pointer 18. The operation is the same as cursor back. When the pointer 18 matches Regl in the comparison circuit 25, the state shown in FIG. 6 has been reached, and the process advances to flowchart 700.

Flowchart 700 is a flowchart of operations for achieving the state shown in FIG. In this case, the start address value of the Y block is determined by the operation of the block key lob mentioned above.
Since it is stored in the register 21, Reg3→P2 is output, and the data in the register 21 is transferred to the pointer 18 via the AND gate 57 and the OR gate 59. That is, the pointer 17 stores the space part start address value,
The pointer 18 stores the start address value of the Y block (see flowchart 701). Flowchart 7
At 02, the P2→ADR signal is output, and the AND gate 52,
The address value of the pointer 18 is transferred to the address circuit 14 via the OR gate 55, and an RNOW(0) signal is output at 703, and the first character of the Y block indicated by the pointer 18 is read into the accumulator 16. Furthermore,
The pointer 17 is transferred to the address circuit 14, and at 705 R
/W(1) signal is output and data in the accumulator 16 is written. Then, in 706, P2 and Reg4, that is, Y
Detects whether it is the last character of the block or an apricot, and if not, moves pointers 17 and 18 to AND gates 41 and 43
Count up by 1 by opening. This operation is repeatedly executed according to the flowchart 706 until the comparator 30 detects a match, and the characters of the Y block are sequentially transferred from the beginning of the space. The text buffer 15 is in the state shown in FIG. 7, and the process advances to flowchart 800. 801
, outputs Reg4→P2 and stores it in the register 22 via the AND gate 58 and the OR gate 59.

Transfers the last address value of the block to pointer P2.
Furthermore, Reg3-1 is output, the AND gate 42 is opened, and the start address value of the Y block stored in Reg3 is counted down by one. That is, the character position before the Y block is stored in Reg321. followed by 803,8
04, 805, and 806, the upper data is transferred to the data position of the Y block. Furthermore, 807,808,809
In the flowchart, the character data stored in the upper part of the Y block is deleted. At 810, Reg3=Regl is detected.

This is to detect that the text up to the first character of the × block has been transferred downward. 81 1 and Reg3=R
The e solution is detected by the comparator 28, and when Reg3 comes to the last position of the x block, the data of pointer P2 at that time is stored in Reg2.

This is the start and end address of × block, Regl,
Although it is stored in Reg2 in advance, this is to store a new address value since it changes from the above operation. By repeating the above operation, the text data in the old Y block in FIG. 7 is erased.

When Regl=Reg3 is detected at 810, P2→Regl is output at 814, the AND gate 45 is opened, and ×
The new start address of the block is transferred to Regl, the text buffer is processed as shown in Figure 8, and flowchart 9
Proceed to 00.

The flowchart 901 transfers the last address value of the x block stored in Reg2 to the pointer 18 via the AND gate 56 and the OR gate 59.

Furthermore, in 902, P2 is determined by the detection signal of the comparator circuit 30.
=Reg4, and if they do not match, it is determined that there is another sentence between the X block and the old Y block.

If they match, the process is complete and the process proceeds to flowchart 1000. There is no flowchart 903, and 907 moves the text between the X block and the Y block, and the Z block to the pointer 17.
The text buffer 14 is made as shown in FIG. 9 by repeatedly transferring the data to the address position shown in FIG.

Next, the process advances to flowchart 1000, and in the same way as the X block erase during the X block transfer described above, the x block is moved downward in order to erase the Z block. In this way, exchange between arbitrarily designated blocks can be easily performed. In the above embodiment, the block key 10b is operated to specify the block to be exchanged from the top of the text buffer 5, but it is also possible to specify it from any position in the text buffer 5.

However, in this case, after the block key 10b specifies each block, the address values stored in the register 22 are compared in magnitude without register 19, and the address values are stored again in order from the address value smaller than Regl, for example. It is necessary to change the storage order.

As is clear from the detailed description above, the present invention
Edit the text by specifying the first position and the last four positions of the two blocks that should be mutually swapped, and using a text buffer set in a special format to mutually swap the blocks in a single operation. By doing this, the operation of the word processor is greatly simplified, the efficiency of text editing work is greatly improved, and the editing process for replacing blocks on the screen is no longer limited to replacing the same number of characters. It also becomes possible for the operator to arbitrarily specify this.

[Brief explanation of the drawing]

FIG. 1 is an explanatory diagram of a CRT display screen for explaining a screen editing method in a conventional word processor, FIG. 2 is an explanatory diagram of a CRT display screen for explaining a screen editing method in a word processor according to the present invention, and FIG. The figure is an explanatory diagram of the CRT display screen after two blocks have been exchanged, FIGS. 4a and 4b are explanatory diagrams showing the display of the CRT display screen and the contents of the text buffer in that display state, and FIG. Registers for storing addresses on each first and last sentence buffer of two blocks to be swapped; FIGS. 6, 7, 8, 9, and 10 are blocks according to an embodiment of the present invention, respectively. FIG. 11 is an explanatory diagram showing the contents of text blocks when the blocks are replaced, FIG. 11 is an explanatory diagram showing the CRT display screen after block replacement is completed, and FIG. 12 is a circuit showing the text editing section of a word processor for implementing the present invention. 13a to 13d are flowcharts showing the operation of FIG. 12, respectively. 1...CRT display screen, 2...Cursor mark, 3...Text buffer, 5...Free space, 6U
......Top buffer, 6L...Bottom buffer, 7...Register, Xs...First position of x block, xE...Last position of X block, Ys...・
...First position of Y block, Y8...Last position of Y block. -Figure 1Figure 2Figure 3Figure 4Figure 5Figure 6Figure 7Figure 8Figure 9Figure 10Figure 11Figure N Ship Figure 13Figure 13

Claims (1)

[Claims] 1 In a screen editing method for a word processor in which text is edited by displaying information stored in a text buffer memory on a display screen of a display device and mutually replacing part of the information displayed on the display screen, the display screen After dividing the above text buffer memory into an upper area and a lower area according to the empty area whose starting address is the position of the cursor mark indicating the display position of each character or code, etc., the first and last areas of these upper and lower areas are The address is stored in each register, and data stored in an area of the text buffer memory that is different from the area adjacent to the empty area among the areas of the text buffer memory corresponding to the two areas of the display screen that are to be exchanged is stored in the register. After sequentially transferring the stored data from the first address to the last address to the free area, the data is stored between the area and the free area in the text buffer area where the transferred data was stored. A method for editing a screen in a word processor, which comprises transmitting the text as it is, and then sequentially repeating at least the above series of operations to mutually replace arbitrarily designated areas on the display screen.