JPS6059675B2 - Driving method of semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device, particularly a method for driving a semiconductor device regarding writing and erasing operations of a charge injection type nonvolatile semiconductor memory device.

Currently, as a semiconductor memory device, MIS (metal-insulating film-semiconductor) utilizes a threshold change caused by trapping charges in a trap level in a gate insulating film on the channel of an insulated gate field effect transistor (IGFET). MAOS (Metal-Aluminium
a-silicon Oxide-Semi-condu
controller) or MNOS (Metal-Sili
conNitride-siliocnOxideSe
A device with a two-layer gate insulating film called a microconductor is well known.

By applying a voltage between the gate electrode and the substrate electrode or between the gate electrode and the channel, the conductivity between the source and drain can be changed or even reduced to zero. Erasing can be performed, and the written state or erased state can be maintained for a long time due to the charge retention effect of the gate insulating film.

Conventionally, when writing information (injecting charge into the capture level) and erasing (releasing potential from the capture level) to this type of semiconductor device, the write and erase times are limited to the time required for the gate electrode. and was set to a constant time regardless of fluctuations in the voltage applied to the substrate electrode.

In this case, for example, in an N-channel storage device, if the write and erase times are constant as shown in FIG.
If the write and erase voltages change from a → → c and then → g → i, respectively, the threshold voltage becomes f → e−* d in the write operation, and changes to j− in the erase operation. The result is a variation of →1.

At this time, the method for reading information is to apply a read voltage I to the gate electrode and detect the conductivity between the source and drain. However, in the conventional driving method described above, when there is a region where the threshold voltage does not change at all when writing and erasing information, in other words, the threshold voltage f in the written state and the threshold voltage 1 in the erased state may be the same. Therefore, there is a drawback that writing and erasing of information may not be possible. Furthermore, the information retention time of a storage device is determined by the point at which the threshold voltage after a write operation decreases with time due to the spontaneous release of accumulated charges and intersects the read voltage I. If it changes due to fluctuations, the memory retention time will also change. Such instability in memory retention time is a serious drawback for storage devices. Furthermore, in the conventional driving method, when the power supply voltage fluctuates in a particularly high direction, the center of the density distribution of the charges captured in the silicon nitride film 0 becomes the position r, as shown in FIG. It is separated from the vicinity of the interface between the silicon oxide film n and the silicon nitride film 0 in the direction of the gate electrode p.

Therefore, when a certain erasing voltage is applied to the gate electrode p in the information erasing operation, the electric field applied between the density distribution center r and the silicon substrate m shifts to the ideal density distribution center q. In comparison, it is effectively smaller, and the probability that the charge in the trap level is released in the m direction of the silicon substrate becomes smaller.
This has the disadvantage that charges are left behind in the trap level, making it impossible to return the voltage to the threshold voltage before the write operation, and as a result, the erase operation cannot be performed. Furthermore, the above phenomenon also brings about the drawback that the number of times information is written and erased is extremely reduced.

An object of the present invention is to stably and accurately drive information writing and erasing operations in a storage device, thereby extending memory retention time, increasing the number of writing/erasing operations, and reducing power supply voltage. The purpose is to improve the characteristics.

According to the present invention, in information writing and erasing operations of a MIS type semiconductor memory device, fluctuations in the voltage applied to the gate electrode are detected, and writing and erasing times are respectively set for each applied voltage that fluctuates. A characteristic method for driving a semiconductor device is obtained.

Hereinafter, in order to better understand the present invention, the present invention will be explained in more detail with reference to the drawings. FIG. 3 is an explanatory diagram showing an embodiment of the present invention. That is, when writing and erasing information in the storage device 3, the voltage of the power supply 1 is detected by the power supply voltage detection circuit 4, and the difference from the reference voltage is applied to the storage device drive circuit 2, thereby determining the power supply voltage. To the amount of variation. The write and erase times are changed by the corresponding amount, and the memory device 3 is driven so that the threshold voltage of the memory device in the write state and the erase state is always constant regardless of fluctuations in the write voltage and the erase voltage.

According to the embodiment of the present invention described above, as shown in FIG.
Even if the voltage changes from +C and E-+F to G, the threshold voltage remains constant at the value of D in the write state, and the value of H remains constant also in the erase state.

Therefore, when a read voltage of 1 is applied to the gate electrode, when the conductivity between the source and drain is zero and when it is high,
That is, it is possible to obtain the advantage that the written state and erased state can be stably and accurately determined without depending on fluctuations in the power supply voltage. In addition, the threshold voltage in the write state is always constant regardless of fluctuations in the power supply voltage, so the information and retention time of the storage device are always stable, and there is no shortening of the retention time that occurs when the write voltage decreases. You also have the advantage of not doing so. Furthermore, in the driving method of the present invention, even when the power supply voltage fluctuates particularly in a high direction,
Since the writing time can be shortened by changing the voltage, only enough charge is injected to obtain a constant threshold voltage, which is ideal as shown in Figure 2, where the center of the density distribution of captured charges is shown earlier. always exists at position q.

Therefore, when a constant erase voltage is applied to the gate electrode p, the electric field between the captured charge density distribution center q and the silicon substrate m is always constant, making it possible to completely return it to the threshold voltage before the write operation. As a result, there are advantages in that the erase operation is stabilized regardless of fluctuations in the power supply voltage, and at the same time, the power supply voltage can be lowered. Furthermore, when the erasing operation can be performed perfectly as described above, there is an excellent advantage that the number of times information is written and erased increases. As explained above, according to the present invention, the information writing and erasing operations of a nonvolatile semiconductor memory device become stable and accurate, the memory retention time can be extended, and the power supply voltage can be lowered. We are confident that the number of times information can be rewritten will further increase, and as a result of realizing a fully satisfactory electrically rewritable function, the demand for such information will also increase further.

Incidentally, in describing the embodiments of the present invention, an n-channel type has been described in detail, but the present invention can of course also be applied to a p-channel type.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing write and erase characteristics of a memory device when a conventional driving method is used, where the horizontal axis represents the power supply voltage and the vertical axis represents the threshold voltage. In the figure, A, b, c, h, g, and i indicate respective voltage values when the power supply voltage fluctuates, and D, e, and f indicate respective threshold values for voltage fluctuations during write operation. The voltages J, k, and l are respective threshold voltages for voltage fluctuations during erase operation, and 1 is the read voltage. FIG. 2 shows an energy band diagram of a MIS type semiconductor memory device, where m is a silicon substrate, n is a silicon oxide film, 0 is a silicon nitride film (-P is a gate electrode, R
, q indicates the center of the density distribution of the captured charges. Incidentally, FIG. 2 is a power band diagram when a positive voltage is applied to the gate electrode P. FIG. 3 is a block diagram for explaining a method for driving a semiconductor device according to an embodiment of the present invention. 1 is a power supply, 2 is a storage device drive circuit, 3 is a storage device, and 4 is a power supply voltage detection circuit. FIG. 4 shows write and erase characteristics of a memory device when using a driving method according to an embodiment of the present invention, with the horizontal axis representing voltage and the vertical axis representing threshold voltage.

Claims (1)

[Claims] 1. In the information writing and erasing operations of a MIS type semiconductor memory device that stores information by injecting and releasing charges into the gate insulating layer, the writing time is set according to the magnitude of the writing voltage, and the erasing voltage is A method for driving a semiconductor device, characterized in that erasing time is set according to the size of the semiconductor device.