JPS609344B2 - Manufacturing method of semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to Isomura and the semiconductor substrate in bonding the semiconductor substrate to the substrate support using gold (Au) as a steel material for bonding the semiconductor substrate (semiconductor element) and the substrate support. The present invention relates to a method for manufacturing a semiconductor device, which eliminates misalignment of the foil, eliminates alloy unevenness, enables uniform fusion of foil serving as a koji material, and reduces defects that occur during separation.

When bonding a semiconductor substrate to a substrate support such as a lead frame using gold or a gold-based alloy as a bonding material, the secondary bonding process involves gold plating on the side of the semiconductor substrate that will be bonded to the substrate support. The method used was to form a gold plate by gold vapor deposition, and then adhere it to a gold-plated substrate support via gold foil.

However, in such conventional bonding methods, it is extremely difficult to bond the gold foil and the semiconductor substrate by eliminating any misalignment between the gold foil and the semiconductor substrate. Therefore, adhesion is performed with some misalignment. By the way, if there is a misalignment between the gold foil and the semiconductor substrate, the unevenness of the eutectic reaction between the two will further increase the thermal strain that inevitably occurs due to the difference in thermal expansion coefficient between the gold material, the semiconductor substrate, and the substrate support. It acts to make things happen. In other words, according to the conventional bonding method, the thermal strain between the bonding surfaces becomes large, and therefore, the conventional bonding method reduces the manufacturing process yield or causes cracks in the semiconductor substrate during the actual operation of semiconductor bag counterfeiting. There were concerns that this would lead to poor voltage resistance.

In view of the above problems, a semiconductor slice with a gold film deposited on one side is mechanically divided by a method such as vapor deposition from the other side on which the gold film is not deposited, and the area of the semiconductor substrate and the adhesive A method has been proposed in which the area of the gold film acting as the coin material is made the same to eliminate misalignment between the two (Tsubaki Kosho 49-40 Total No. 5). However, in this method, gold is wasted due to vapor deposition, and the process is complicated, and as the gold film becomes thicker, the vapor deposition time becomes longer.

In addition, after the gold film is attached, the semiconductor slices are divided from the other side using a well-known dividing method, so if the thickness of the gold film increases (lr or more), reliable division becomes impossible. Therefore, the thickness of the gold film can be kept to a maximum of about 1 mm. By the way, if the thickness of the gold film is controlled to such a thickness, there will be no shortage of gold as a steel material when the area of the semiconductor substrate is about 1 mm2 or more, but if the area of the semiconductor substrate exceeds 1 mm2, there will be no shortage of gold. There is a risk that the amount of gold will be insufficient, resulting in poor adhesion. In other words, this method is applicable to low-power semiconductor devices with relatively small chip sizes, and
It is difficult to apply it to high-power semiconductor devices or semiconductor integrated circuits with large chip sizes.

Additionally, the substrate support is partially coated with a gold layer, and
It is also conceivable to make the amount of the gold layer adhered to a sufficient amount to function as a material, and to adhere the semiconductor substrate to the area where the gold layer is adhered.

However, in this method, it is necessary to correctly position the semiconductor substrate on the part of the substrate support to which the gold layer is applied, and in order to facilitate this positioning work, the area of the part to which the gold layer is applied is set to be 2 times smaller than the area of the semiconductor substrate. Generally, it is made to be relatively wide. This leads to expensive waste of money,
This results in an increase in the cost of semiconductor devices. The present invention was made in order to eliminate the inconveniences that existed in the conventional methods described above, and it minimizes the amount of gold or gold alloy that acts as a steel material and adds work such as alignment. The present invention proposes a method that can perform adhesion by causing an even eutectic reaction without causing any damage, has good workability, and is less likely to cause defects during cutting. That is, the present invention lays out a layer of gold or gold alloy foil on a base that does not blend with these foils, and further spreads a semiconductor slice in which a plurality of semiconductor elements are built on the foil, A process of heating these to a temperature exceeding the eutectic temperature of the gold and semiconductor slice temperature to fuse the foil to one side of the semiconductor slice, and performing a scribing process on the foil-fused side of the semiconductor slice that has undergone the same process. Next, a mechanical dividing process that applies pressing force is applied to separate the slices into multiple semiconductor elements, and in the same process, gold or gold alloy fused to the entire surface of one side of the divided semiconductor elements is used as an anchor. The method is characterized by comprising a step of adhering the semiconductor element to a substrate support as a material. The present invention will be explained in detail below with reference to the drawings.

FIGS. 1A and 1B are process diagrams for manufacturing a semiconductor device by the method of the present invention, and FIG.
This figure shows the state after a gold layer 2 is formed on the back surface of a semiconductor slice 1 in which a transistor (transistor) is formed by the above-described gold foil fusion bonding.

Even if the gold layer 2 is relatively thick, it can be formed uniformly and with good workability. In the figure, 3 is a base region, 4 is an emitter region, 5 is a base electrode, and 6 is an emitter electrode. Next, as shown by the arrow x, the semiconductor slice 1 is scribed, for example, from the side on which the gold layer 2 is formed, and then the semiconductor slice is divided into individual semiconductor substrates along dotted lines by pressing.

In this method, the gold layer 2 is reliably separated by one thick layer, and the malleability of the gold layer 2 can be utilized even if the mechanically fragile gold-silicon layer partially peels off and the semiconductor substrate surface is exposed. , it is possible to cover exposed surfaces. FIG. 1B is a diagram showing the semiconductor substrate thus obtained, and as shown, a gold layer 2 of uniform thickness is formed over the entire back surface of the semiconductor substrate 7. As shown in FIG.

After that, as shown in FIG. 1C, the semiconductor substrate is bonded to the gold-plated or silver-plated substrate support 8 using the gold layer 2 on the back side as a key material, thereby completing the bonding process. The work is completed.

Thereafter, the semiconductor device is completed by connecting electrode leads and performing a sealing process.

The welding table used for welding foil such as gold may be, for example, a ceramic one or a warp plate made by Habelia, and the welding temperature is higher than the eutectic temperature of 375 qo or higher between gold and silicon, which is the semiconductor slicing material. For example, about 390 qo is sufficient.

FIG. 2 is a diagram comparing the variation in thermal resistance of semiconductor devices obtained by the method of the present invention described above and the conventional method.

Examples 1 to 3 show variations in semiconductor devices obtained by conventional methods. This figure shows the variation when gold is vapor-deposited to a thickness of one tsubo and a silicon substrate is bonded at a temperature of 430 qo without using gold foil on a silver-plated board frame.

Example 2 shows the variation when a method of directly bonding a silicon substrate with an elevation angle of 1.5 to a gold plated frame with a thickness of 6 mm at a temperature of 430 qo is adopted.

In Example 3, a 0.2 mm thick circular gold plate is deposited on the back side of a silicon substrate with an elevation angle of 1.5 degrees, and then this silicon substrate is silver plated at a temperature of 43,000 ℃ using a 1 layer thick gold foil. This shows the variation when using the method of adhering to the board frame.

Example 4 shows the variation when employing the method of the present invention and shows that gold foil with a thickness of 1° was placed on the back side of a silicon slice at 430°
A silicon substrate with an elevation angle of 1.5 obtained by fusion bonding at a temperature of
This is the case when bonding was performed at a temperature of 30 qo.

As is clear from the figure, the variations in thermal resistance of semiconductor devices bonded by the method of the present invention are significantly smaller than those bonded by other methods.

Moreover, the average value of thermal resistance is also comparable to the average value of Example 3 in which bonding was performed through gold foil. As is clear from the above explanation, according to the method of the present invention, the amount of gold or gold alloy used as the steel material is reduced to the minimum necessary amount in order to ensure the division of the substrate and to avoid using additional gold foil. A uniform eutectic reaction can be caused over the entire adhesive surface by limiting the amount. In other words, the eutectic reaction becomes non-uniform due to insufficient amount of steel or incorrect alignment between the key material and the semiconductor substrate, resulting in increased thermal strain between the bonding surfaces, resulting in decreased process yield or operation. Problems such as cracking of the semiconductor substrate inside can be eliminated, and it can also be easily applied to relatively large-area semiconductor substrates, making it possible to reduce defects when cutting. The amount of gold or gold alloy used as the steel material may be controlled by considering the size of the bonding surface of the semiconductor substrate and controlling the thickness of the foil to be fused to the semiconductor substrate.

[Brief explanation of the drawing]

Figures 1A to C2 are process diagrams for explaining the method of manufacturing a semiconductor device according to the present invention, and Figure 2 is a comparison of variations in thermal resistance to clarify the differences between the present invention and the conventional method. FIG. 1... Semiconductor slice, 2... Gold or gold alloy layer, 3...
- Base region, 4... Emitter region, 5, 6... Electrode, 7... Semiconductor substrate, 8... Substrate support.

Claims (1)

[Claims] 1. A gold or gold alloy foil is placed on a table that does not fit in with the foil, and a semiconductor slice in which a plurality of semiconductor elements are built is placed on the foil, and these are combined with gold and a semiconductor slice. A step of fusing the foil to one side of the semiconductor slice by heating it to a temperature exceeding the eutectic temperature with the material, performing a scribing process on the foil-fused side of the semiconductor slice that has undergone the same step, and then applying a pressing force. A step of dividing the semiconductor slice into individual semiconductor elements by performing a mechanical dividing process, and supporting the semiconductor element using gold or a gold alloy as a solder material, which is fused to the entire surface of one side of the divided semiconductor element in the same step. A method for manufacturing a semiconductor device, comprising a step of adhering it to a body.