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JPH0722165B2 - Method for manufacturing semiconductor device - Google Patents
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JPH0722165B2 - Method for manufacturing semiconductor device - Google Patents

Method for manufacturing semiconductor device

Info

Publication number
JPH0722165B2
JPH0722165B2 JP31430686A JP31430686A JPH0722165B2 JP H0722165 B2 JPH0722165 B2 JP H0722165B2 JP 31430686 A JP31430686 A JP 31430686A JP 31430686 A JP31430686 A JP 31430686A JP H0722165 B2 JPH0722165 B2 JP H0722165B2
Authority
JP
Japan
Prior art keywords
tape
solder
pellet
wafer
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP31430686A
Other languages
Japanese (ja)
Other versions
JPS63160346A (en
Inventor
淳 佐々木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP31430686A priority Critical patent/JPH0722165B2/en
Publication of JPS63160346A publication Critical patent/JPS63160346A/en
Publication of JPH0722165B2 publication Critical patent/JPH0722165B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Die Bonding (AREA)
  • Dicing (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は特に半導体ペレッタイズ工程に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention particularly relates to a semiconductor pelletizing process.

〔従来の技術〕[Conventional technology]

従来の方法では、半導体ウェハーを粘着テープに貼り付
け、ダイサーによりダイシングして微小形のペレットに
分割し、半導体の送りレール上でソルダー貼り付け工程
にてソルダーを貼り付けられたリードフレームの上に個
々のペレットをマウントしていた。
In the conventional method, a semiconductor wafer is pasted on an adhesive tape, diced by a dicer to divide it into minute pellets, and the lead frame on which the solder has been pasted on the semiconductor feed rail in the solder pasting process. Individual pellets were mounted.

〔発明が解決しようとする問題点〕[Problems to be solved by the invention]

このように、リードフレームのアイランド上に貼り付け
されたソルダーの上にペレットをマウントしているの
で、第4図のように、ソルダーbの貼り付け位置とペレ
ットaのマウント位置が異なるとペレットaがソルダー
bの上に一様に乗らない場合があった。なお、6は送り
レームで、5はリードフレームである。
As described above, since the pellets are mounted on the solder attached on the island of the lead frame, as shown in FIG. 4, when the attachment position of the solder b and the mounting position of the pellet a are different, the pellet a Sometimes did not ride evenly on the solder b. In addition, 6 is a feed frame and 5 is a lead frame.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は、金属箔からなるソルダーテープを粘着性を有
するテープに貼り付ける工程と、前記ソルダテープ上に
ウェハーを接着剤で貼り付ける工程とを有し、しかる後
各ソルダーテープ付半導体ペレットに分離し、裏面にソ
ルダーテープを有したまま各ソルダーテープ付半導体ペ
レットをマウント工程へ移すものである。
The present invention includes a step of attaching a solder tape made of a metal foil to a tape having adhesiveness, and a step of attaching a wafer onto the solder tape with an adhesive, and then separating into semiconductor pellets with solder tape. Then, the semiconductor pellets with the solder tape are transferred to the mounting step with the solder tape on the back surface.

〔実施例〕〔Example〕

次に本発明について図面を参照して説明する。 Next, the present invention will be described with reference to the drawings.

第1図は本発明の一実施例の構成図である。図はテーピ
ング工程を表わしており、ウェハー1と同形の金テープ
2を粘着テープ3に貼りつけ、ローラによって一様に貼
りつくようにする。さらに金テープ3上に製品特性に影
響を与えない材質の接着剤を塗り、その上にウェハー1
を貼りつけるそしてこの粘着テープ3自体をフラットリ
ング4にさらに貼りつける。通常はフラットリング4ご
と持ち運びを行なう。
FIG. 1 is a block diagram of an embodiment of the present invention. The figure shows a taping process, in which a gold tape 2 having the same shape as the wafer 1 is attached to an adhesive tape 3 and is evenly attached by a roller. Further, the gold tape 3 is coated with an adhesive material that does not affect the product characteristics, and the wafer 1
Then, the adhesive tape 3 itself is further attached to the flat ring 4. Usually, the flat ring 4 is carried together.

このフラットリング4をダイサに乗せフルカットダイシ
ングをすると、第2図のように、ウェハーが1個1個の
金テープ付ペレットcになる。フラットリング4上のペ
レットcをマウント工程によってピックアップして送り
レール6上のリードフレーム5にマウントするわけであ
る。
When this flat ring 4 is placed on a dicer and full-cut dicing is performed, each wafer becomes a pellet c with a gold tape, as shown in FIG. The pellet c on the flat ring 4 is picked up by the mounting process and mounted on the lead frame 5 on the feed rail 6.

第3図は本発明の参考例の構成図である。図はテーピン
グ工程を表わしており、ウェハー1の裏面に銀ペースト
2を均等に塗りつけ、その銀ペーストが固まるまで待
つ。そしてウェハーを粘着テープ3に貼りつける。そし
てこの粘着テープ3自体をフラットリング4にさらに貼
りつける。
FIG. 3 is a block diagram of a reference example of the present invention. The figure shows the taping process, in which the silver paste 2 is evenly applied to the back surface of the wafer 1, and the silver paste is waited until it hardens. Then, the wafer is attached to the adhesive tape 3. Then, the adhesive tape 3 itself is further attached to the flat ring 4.

この参考例では、銀ペーストをウェハー裏面に均等に塗
りつけるためには、例えばウェハー表面をチェックし、
引っ繰り返してピンセット等で作業台の上に置かないと
塗り付け作業がしにくく、かつ、銀ペーストを用いてい
るのでペーストが固まるまで待たなければならず、製造
工程が複雑になるという欠点が生じる。
In this reference example, in order to evenly apply the silver paste to the back surface of the wafer, for example, check the front surface of the wafer,
It is difficult to apply it repeatedly unless it is repeatedly placed on the work table with tweezers, and since silver paste is used, it has to wait until the paste hardens, resulting in a drawback that the manufacturing process becomes complicated. .

〔発明の効果〕〔The invention's effect〕

以上説明したように本発明はペレットと同形のソルダー
テープがペレット裏面に貼りつけられていることによ
り、マウントの際にソルダーとペレットの位置が同位置
にマウントできる。またソルダー貼り付け機構は必要が
ない。
As described above, according to the present invention, since the solder tape having the same shape as the pellet is attached to the back surface of the pellet, the solder and the pellet can be mounted at the same position during mounting. Also, no solder attachment mechanism is required.

【図面の簡単な説明】[Brief description of drawings]

第1図は本発明の構成図、第2図は本発明のマウント状
態図、第3図は参考例図、第4図は従来例である。 1……ウェハー、2……金テープ、3……粘着テープ、
4……フラットリング、5……リードフレーム、6……
送りレール、a……ペレット、b……金テープ、c……
本発明の金テープ付ペレット。
FIG. 1 is a configuration diagram of the present invention, FIG. 2 is a mounting state diagram of the present invention, FIG. 3 is a reference example diagram, and FIG. 4 is a conventional example. 1 ... Wafer, 2 ... Gold tape, 3 ... Adhesive tape,
4 ... Flat ring, 5 ... Lead frame, 6 ...
Feed rail, a ... Pellet, b ... Gold tape, c ...
The pellet with gold tape of the present invention.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】金属箔からなるソルダーテープを粘着性を
有するテープに貼り付ける工程と、前記ソルダーテープ
上にウェハーを接着剤で貼り付ける工程とを有し、しか
る後各ソルダーテープ付半導体ペレットに分離し、裏面
にソルダーテープを有したまま半導体ペレットをマウン
ト工程へ移すことを特徴とする半導体装置の製造方法。
1. A step of attaching a solder tape made of a metal foil to an adhesive tape, and a step of attaching a wafer onto the solder tape with an adhesive, and then to each semiconductor tape-attached semiconductor pellet A method for manufacturing a semiconductor device, which comprises separating and transferring a semiconductor pellet to a mounting step while having a solder tape on the back surface.
JP31430686A 1986-12-24 1986-12-24 Method for manufacturing semiconductor device Expired - Lifetime JPH0722165B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP31430686A JPH0722165B2 (en) 1986-12-24 1986-12-24 Method for manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP31430686A JPH0722165B2 (en) 1986-12-24 1986-12-24 Method for manufacturing semiconductor device

Publications (2)

Publication Number Publication Date
JPS63160346A JPS63160346A (en) 1988-07-04
JPH0722165B2 true JPH0722165B2 (en) 1995-03-08

Family

ID=18051768

Family Applications (1)

Application Number Title Priority Date Filing Date
JP31430686A Expired - Lifetime JPH0722165B2 (en) 1986-12-24 1986-12-24 Method for manufacturing semiconductor device

Country Status (1)

Country Link
JP (1) JPH0722165B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2845884B2 (en) * 1988-03-30 1999-01-13 株式会社日立製作所 Throttle sensor and its temperature compensation method
JP4544675B2 (en) * 1999-12-21 2010-09-15 ローム株式会社 Manufacturing method of semiconductor device

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS609344B2 (en) * 1976-04-30 1985-03-09 松下電子工業株式会社 Manufacturing method of semiconductor device
JPS59130438A (en) * 1983-11-28 1984-07-27 Hitachi Ltd Method for separating plates
US4687693A (en) * 1985-06-13 1987-08-18 Stauffer Chemical Company Adhesively mountable die attach film

Also Published As

Publication number Publication date
JPS63160346A (en) 1988-07-04

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