JPS6112403B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a digital modem device having both AM and FM modem functions.

With the recent advances in digital technology, things that were traditionally constructed using analog circuits are being converted to digital, and some are being implemented using LSI. In recent years, phase-locked loops used to extract carriers from AM waves and demodulate FM waves have also been digitized. FIG. 1 shows the configuration of a digital phase lock loop. The input is a sampled signal sequence x(n), and the output is a signal sequence y(n) obtained by sampling a sine wave. The multiplier circuit 11 serves as a phase comparator, and if the sampling interval T is x(n)=sin(ω _c nT+θ) y(n)=cos(ω _c nT), then the output series of the multiplier circuit 11 is z(n) is z(n)=x(n)・y(n) = sin(ω _c nT+θ) cos(ω _c nT) = 1/2 {sin(2ω _c nT+θ)+sinθ} ……(1) becomes. A digital low-pass filter (LPF) 13 reduces the double frequency component of the carrier in the above equation and determines the characteristics of the loop.

This filter may be a simple one such as H(z)=K ₂ /1−K ₁ Z ⁻¹ , and its output is expressed as w
(n). Adder 13, phase specification memory 1
4. The sine wave generator 15 constitutes a digital voltage controlled oscillator (VCO). Sine wave generator 15
outputs the amplitude value of the sine wave corresponding to the phase designated by the phase designation memory 14. For example 360
Assuming that the phase of ° is divided into 32 equal parts, the phase specification memory 1
If 4 specifies "15", sine wave generator 15
The output should be a value of cos (360° x 15/32). The output v(n) of the phase designation memory 14 is v(n)=v(n-1)+C+w(n-1). C specifies the center frequency of the VCO, w
(n-1) becomes the VCO control signal. For example, if the control signal is always 0, the phase designation increases by C every time T, so the center frequency F ₀ becomes F ₀ =C/32·1/T. When the VCO control voltage w(n) is positive, the phase advances quickly, which corresponds to increasing the oscillation frequency of the VCO. The opposite is true when w(n) is negative. Therefore, in equation (1), if θ>0, the DC component 1/2 sin θ is emphasized by the low-pass filter 12, so
The VCO control signal becomes positive, and the VCO output is controlled in the phase advance direction. If θ<0, the opposite is true.

The Costas loop is a loop that extracts the carrier component from the DSB waveform. A block diagram of the Costas loop is shown in Figure 2.

The input is a DSB waveform A(t)cos(ω _c T+θ). If the output of the VCO 25 is sin(ω _c t), the output e _A (t) of the phase comparator 21A is e _A (t)=A(t) cos(ω _c t+θ) sin(ω _c
t) = 1/2A(t) {sinθ+sin(2ω _c t+θ)}
(2) The output of the VCO 25 passes through a 90° phase shifter 26 to obtain -cos(ω _c t) as an output. Phase comparator 21
B's output e _B (t) is e _B (t) = -A(t) cos (ω _c t + θ) cos
(ω _c t) = −1/2A(t) {cosθ+cos(2ω _c t+θ)
} …(3) LPF22A and 22B have a frequency 2 that is twice that of the carrier.
It cuts the modulation component due to ω _c , and their outputs h _A (t) and h _B (t) are h _A (t) = -1/2A (t) sinθ h _B (t) = -1/2 A (t) cosθ The output g(t) of the product circuit 23 is g(t)=h _A (t)・h _B (t) = 1/4A(t) ² sinθcosθ = 1/8A(t) ² sin2θ... ...(4) Therefore, since A(t) ² 0, a value proportional to sin2θ can be obtained as a VCO control signal by passing it through the LPF 24, so that the output of the VCO 25 can be locked with the input. The Costas loop has a 180° divergence in the lock phase. Needless to say, this Costas loop can also be digitized like the phase lock loop shown in FIG.

The present invention is based on the phase-locked loop as described above, and by adding some logic circuits to it,
The present invention provides a modem device that has both AM modem and FM modem functions.

The basic idea of the present invention will be explained using FIG. 1 as follows. First, the AM demodulator (synchronous detector) can suitably phase shift the carrier extracted by a circuit like the one shown in Figure 1, multiply it with the modulated signal, and extract only the baseband component using the LPF. . The AM modulator may input a constant frequency carrier instead of the extracted carrier in the demodulator. The FM demodulator can take the output from the digital LPF 12. The FM modulator can be configured by cutting the loop, inputting the input from the adder 13, and taking the output from the sine wave generator 15.

An embodiment of the present invention constructed based on the above idea is shown in FIG. A multiplication circuit 31, an arithmetic circuit including a digital low-pass filter (LPF) 32 (in this example, the arithmetic circuit is composed of only the LPF 32), a phase specifying circuit 33, and a sine wave generator 34 constitute a basic phase-locked loop. . By adding an input buffer 35, an output buffer 36, and gate circuits 37 and 38 to this, various modulation/demodulation functions are provided. The input is for operating the phase-locked loop, and for FM modulation, a baseband signal as a modulation input is applied, and for FM demodulation, a modulated wave is applied. Also,
This input I is not used during AM modulation, and is used as a signal for carrier extraction during AM demodulation.
That is, the modulated wave itself or a signal obtained by passing the modulated wave through a filter is applied. On the other hand, the input is a signal subjected to AM modulation or demodulation, that is, a baseband signal as a modulation input in the case of AM modulation, and a modulated wave in the case of AM demodulation. Also,
This input is not used during FM modulation/demodulation. In the case of AM demodulation, the multiplication circuit 31 is used as a phase comparator for a phase-locked loop and as a detector for synchronous detection, so it is used for time division. The input buffer 35 is a circuit for supplying the input and the contents of the input to the multiplication circuit 31 in a timely manner. For example, if the multiplication circuit 31 works as a phase comparator during the period "M0", it supplies the input content during that period, and if it works as a synchronous detector during the period "M1", it supplies the input content during that period. supply. The "sin out" signal, which will be described in detail later, is a command signal for supplying a fixed pattern to the multiplication circuit 31 in place of the input content.

Details of the input buffer 35 are shown in FIG. It is assumed that the input comes at the timing of “M0”. During the period "M0", the input is outputted through the AND gate 45 and the OR gate 47. When the "sin out" signal is "0", the input passes through the AND gate 41 and the OR gate 43 and is stored in the memory 44 during the period "M0". The contents of memory 44 are processed by AND gate 46
and is output through the OR gate 47 during the period “M1”. When the "sin out" signal is "1", the fixed pattern is stored in the memory 44. Storing a fixed pattern in memory is the same as inputting the same code to the input, and corresponds to inputting a DC component. Therefore, what is output from the multiplication circuit 31 in FIG. 3 during the period "M1" is a value obtained by multiplying the output of the sine wave generator 34 by a constant value corresponding to the fixed pattern. The output of the output buffer 36 is also similar.

Details of the phase designation circuit 33 are shown in FIG. As in FIG. 1, the phase designation memory 52 and adder 53 constitute a cumulative adder. The address signal specified by the phase specification memory 52 has a period “M0”
The signal is output through an AND gate 55 and an OR gate 56. The value of the sine wave with the phase specified by this address is output from the sine wave generator 34 in FIG.
Multiplied by the value of input I in the multiplication circuit 31,
It is supplied to LPF32. On the other hand, the phase designation memory 5
The output of 2 is added to a constant value θ _c in an adder 53 and outputted through an AND gate 54 and an OR gate 56 during a period "M1". θ _c is a value for correcting the difference between the extracted carrier phase and the optimum carrier phase for synchronous detection. Therefore, during the period "M1", a sine wave value corresponding to the corrected carrier phase is output from the sine wave generator 34 in FIG. is supplied to

The “DEM” signal in Figure 3 is the first mode designation signal that specifies whether the modulation/demodulation device is used as a modulator or a demodulator. If it is desired to be used as a 0, "0" is supplied. The “AM” signal is a second mode designation signal that specifies whether the modulator/demodulator is to be used as an AM modem or an FM modulator, and is “1” if you want to use it for AM, and “1” if you want to use it for FM. “0” if
is supplied. The gate circuit 38 becomes a gate group as shown in FIG. When used as a demodulator for either AM or FM, the phase-locked loop must be closed, so with DEM="1", the output of the LPF 32 is guided to the phase specifying circuit 33 through an AND gate 61 and an OR gate 63. In the case of AM modulation, the carrier is constant, so if DEM = “0”,
Passage of the output of LPF 32 is prohibited. The carrier frequency at this time is determined by the constant C. In the case of an FM modulator, the oscillation frequency must be controlled by input, so by setting DEM = "0" and AM = "0",
The output of the input buffer 35 is ORed with the AND gate 62
It is output through gate 63. At this time LPF3
It is assumed that the timing of the output from the input buffer 35 and the output from the input buffer 35 are adjusted using a shift register or the like so that the timing of the output from the input buffer 35 is the same.

When used as an FM modulator, the output of the sine wave generator 34 must be output as an output signal via the multiplication circuit 31, so the "sin out" signal must be set to "1". In this case, the fixed pattern in the period “M0” is the memory 4 in FIG.
4, and the contents of this memory 44 are supplied to one input of the multiplication circuit 31 during period "M1".
Further, the output of the sine wave generator 34 is supplied to the other input of the multiplication circuit 31 during the period "M1". Therefore, the output of the multiplication circuit 31 is a value obtained by multiplying the output value of the sine wave generator 34 by a constant value that is a fixed pattern value.

It should be noted that the modulator/demodulator shown in Fig. 3 is a simple phase modulator.
When used as a lock loop, AM=
By setting DEM to "1" and setting the "sin out" signal to "1", a phase-locked sine wave output can be obtained from the output buffer 36. If you do not need to use it as a simple phase lock loop (used only for modulation/demodulation), it is best to set the “sin out” signal to “1”.
Since this occurs only during FM demodulation, the logic of the "sin out" signal may be set as (sin out)=().(). The gate circuit 37 is also a gate group, as shown in FIG. AND gate 74
Since the logic () and (DEM) is used, the output becomes "1" only during FM demodulation. Therefore, during FM demodulation, the output signal of LPF 32 is output through AND gate 72 and OR gate 73,
In other cases, the output signal of the multiplication circuit 31 is outputted through the AND gate 71 and the OR gate 74.
At this time, it is assumed that the timings of the signal from the LPF 32 and the signal from the multiplication circuit 31 are adjusted by a shift register or the like so that they are the same.

As described above, according to the present invention, two types of inputs are time-divisionally supplied to a phase-locked loop whose basic configuration is a sine wave generator multiplier circuit, a digital low-pass filter, and a phase specifying circuit, and one of the inputs is It has an input buffer that can be replaced with a fixed pattern, and in the case of AM or FM demodulation, the output of the low-pass filter becomes the input of the phase specification circuit, and in the case of FM modulation, the input becomes the input of the phase specification circuit, and AM modulation In this case, the input of the phase specifying circuit is 0.
A second gate circuit is provided, and the first gate circuit is provided with a second gate circuit so that the output section receives the output of the low-pass filter in the case of FM demodulation, and the output of the multiplication circuit in other cases. By providing a gate circuit, a modulation/demodulation device with integrated AM and FM modulation/demodulation functions can be realized.

In the above explanation, a phase-lock loop is used as the phase-locked loop, but it is of course possible to realize a similar modulation/demodulation device using a Costas loop. That is, the second
When using a Costas loop as shown in the figure, the phase comparators 21A and 21 in FIG.
B (corresponding to the multiplication circuit 31 in FIG. 3), the input buffer 35 in FIG. 3 is arranged before the common input terminal of the multiplication circuit 31 in FIG.
The output of 1A or 21B is led to one input of the first gate circuit 37 in FIG.
3 and the digital LPF 24 (the arithmetic circuit including the digital LPF: corresponds to the part of the digital pass filter 32 in FIG. 3), the output is sent to the first gate circuit 37 and the second gate circuit in FIG. 38 inputs. Furthermore, in Fig. 2
Since the VCO 25 corresponds to the phase specifying circuit 33 and the sine wave generator 34 in FIG.
The output of the second gate circuit 38 in FIG. 3 may be input to the phase designation circuit in the VCO 25. With this configuration, the input is switched by the input buffer 35 as in the previous embodiment, and the first and second gate circuits 37 are switched by the first and second mode designation signals ("DEM" signal and "AM" signal). , 38, the output buffer 3 provided on the output side of the first gate circuit 27
AM and FM modulation and demodulation outputs can be taken out through 6.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the basic configuration of a digital phase lock loop, FIG. 2 is a block diagram showing the basic configuration of a coctor loop, and FIG. 3 is a block diagram showing the configuration of a modulation/demodulation device according to an embodiment of the present invention. The block diagrams of FIGS. 4 to 7 are diagrams showing the internal structure of each part of FIG. 3. 31... Multiplication circuit, 32... Digital low-pass filter, 33... Phase specifying circuit, 34... Sine wave generator.

Claims (1)

[Claims] 1. A sine wave generator, a multiplication circuit that multiplies the output of this sine wave generator by an input signal, an arithmetic circuit including a digital low-pass filter that receives the output of this multiplication circuit as input, and an output of the sine wave generator. A modulation/demodulation device using a phase-locked loop having a phase specifying circuit for specifying a phase, an input buffer for switching an input signal of the phase-locked loop, and the modulation/demodulation device being used as a modulator or a demodulator. The output of the multiplication circuit and the calculation are controlled by a first mode designation signal that designates whether the modulation/demodulation device is to be used as an AM modulation/demodulator or an FM modulation/demodulation, a first gate circuit that switches and outputs the output of the circuit; an output buffer that takes out the output of the first gate circuit as a modulation or demodulation output; and a first mode designation signal and a second mode designation signal.
a second gate circuit controlled by a mode specifying signal of the input buffer and the output of the arithmetic circuit to supply the same to the phase specifying circuit; A modulation input signal is given to the multiplication circuit via the input buffer with the output frequency fixed, and an AM modulation output is taken out from the output of the multiplication circuit via the first gate circuit and the output buffer.
In the case of modulation, a modulation input signal and a fixed pattern signal are fed from the input buffer to the multiplication circuit in a time-division manner, and are also fed to the phase designation circuit via the second gate circuit, and are input from the output of the multiplication circuit. The FM modulation output is taken out through the first gate circuit and the output buffer, and is used for AM demodulation and FM
In the case of demodulation, the modulated signal and the reference signal for establishing the phase-locked loop are provided to the multiplication circuit in a time-division manner via the input buffer, and the output of the arithmetic circuit is provided to the phase designation circuit. , a configuration in which an AM demodulated output is taken out from the output of the multiplication circuit via the first gate circuit and an output buffer, and an FM demodulated output is taken out from the output of the arithmetic circuit through the first gate circuit and the output buffer. A modem device characterized by: