JPS6113370B2 - - Google Patents
Info
- Publication number
- JPS6113370B2 JPS6113370B2 JP56152588A JP15258881A JPS6113370B2 JP S6113370 B2 JPS6113370 B2 JP S6113370B2 JP 56152588 A JP56152588 A JP 56152588A JP 15258881 A JP15258881 A JP 15258881A JP S6113370 B2 JPS6113370 B2 JP S6113370B2
- Authority
- JP
- Japan
- Prior art keywords
- chip
- adhesive
- solid electrolytic
- electrolytic capacitor
- resin layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Description
【発明の詳細な説明】
この発明はチツプ状固体電解コンデンサおよび
その製造方法に関するものある。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a chip-shaped solid electrolytic capacitor and a method for manufacturing the same.
電子機器の小形化、薄形化、されには省資源化
などから電子部品のチツプ化が活発になつてきて
おり、すでにVTRをはじめラジオ、オーデイオ
等に使用されるつつある。このチツプ部品は、回
路基板にフエースボンデイングするときにあらか
じめ基板に仮接着して固定しておき、ついでリフ
ローソルダ法またはデイツプソルダ法等により、
基板の回路パターンであるランドとチツプ部品の
端子とがはんだ付けされて実装が行われる。この
チツプ部品はチツプ状タンタル固体電解コンデン
サおいても全く同様であつて、この種の固体電解
コンデンサAは第1図ないし第3図に示すよう
に、熱衝撃性、耐熱性の面から多くの場合シリコ
ン系の樹脂1で外装が行われ、その両側面より金
属端子板2,3を引出し、この先端部2a,2a
を両側面に沿つてほぼ直角に折曲げ加工し、され
に底面1aに沿つて内側にほぼ直角に折曲げ加工
して形成される。そして実装は回路基板4の上の
ランド5とランド5′の間にエポキシ系の樹脂接
着剤を注射針等でスポツト的に載せ、その上にチ
ツプ部品Aを載せて硬化させて仮接着し、つぎに
前記したはんだ付けによりランド5,5′と端子
板2,3の先端部2a,3aとが接続される。 As electronic devices become smaller, thinner, and more resource-saving, electronic components are increasingly being made into chips, and they are already being used in VCRs, radios, audio, etc. These chip components are temporarily bonded and fixed to the circuit board before face bonding, and then reflow soldered or dip soldered, etc.
Mounting is performed by soldering the land, which is the circuit pattern on the board, to the terminals of the chip component. This chip component is exactly the same in chip-shaped tantalum solid electrolytic capacitors, and this type of solid electrolytic capacitor A has many advantages in terms of thermal shock resistance and heat resistance, as shown in Figures 1 to 3. In this case, the exterior is made of silicone resin 1, and the metal terminal plates 2 and 3 are pulled out from both sides of the exterior, and the tip portions 2a and 2a are
It is formed by bending it at approximately right angles along both side surfaces, and then bending it inward at approximately right angles along the bottom surface 1a. Then, for mounting, epoxy resin adhesive is placed on the circuit board 4 between the lands 5 and 5' using a syringe needle, etc., and the chip part A is placed on top of it, and it is cured and temporarily bonded. Next, the lands 5, 5' and the tips 2a, 3a of the terminal plates 2, 3 are connected by the soldering described above.
ところが、このチツプ状固体電解コンデンサA
は、スポツト的に接着剤6で仮接着されるため、
接着力が弱いという欠点がある。また他の抵抗チ
ツプやセラミツクチツプと比較して寸法が大きく
重量も重いため、接着剤6にて固定してもその後
の搬送工程等の振動、衝撃などによりまたはんだ
付け工程のデイツプ作業中はんだの表面張力など
で落下することがあるという欠点があつた。さら
に外装材としてシリコン系のモールデイングコン
パウンドを用いた場合、基板との接着力が弱くな
る欠点がある。 However, this chip-shaped solid electrolytic capacitor A
is temporarily glued with adhesive 6 in spots, so
It has the disadvantage of weak adhesive strength. Also, compared to other resistance chips and ceramic chips, they are larger in size and heavier, so even if they are fixed with adhesive 6, they may be damaged by the solder during the dip work in the soldering process due to vibrations and shocks during the subsequent transportation process. The drawback was that it could fall due to surface tension. Furthermore, when a silicone-based molding compound is used as the exterior material, there is a drawback that the adhesive force with the substrate is weak.
これに対して、接着剤6による接着面積を大き
くすればそれだけ全体の強度が向上するが、接着
剤6をあまり多くすると金属端子板および基板側
のランド5,5′まで樹脂が広がりはんだ付け性
を損うことになるので、あまり多く使用すること
はできない。 On the other hand, increasing the bonding area with the adhesive 6 will improve the overall strength, but if the adhesive 6 is too large, the resin will spread to the metal terminal plate and the lands 5 and 5' on the board side, making it difficult to solder. It cannot be used in large quantities because it will damage the
したがつて、この発明の目的は、実装時の仮接
着を確実にすることができるチツプ状固体電解コ
ンデンサおよびその製造方法を提供することであ
る。 SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a chip-shaped solid electrolytic capacitor that can ensure temporary adhesion during mounting and a method for manufacturing the same.
この発明の一実施例を第4図および第5図に示
す。すなわち、このチツプ状固体電解コンデンサ
は、シリコン系外装樹脂1′でモールドされた本
体の底面1a′にエポキシ樹脂またはエポキシ変性
樹脂等のエポキシ系樹脂層7を形成させることを
特徴とするもので、その他は第1図ないし第3図
のものと同様である。このように底面1′aの全
体を接着性の良いエポキシ系の樹脂層7を設けて
おくとこれは接着剤6と同系統であるので、基板
4への接着時に接着剤6がスポツト的であつても
本体への接着面積は実質的にほぼ2〜3倍に増大
するので、従来に比較して2〜3倍の強度を確保
することができる。またエポキシ系樹脂層7と接
着剤6との「ぬれ性」が良いため接着が向上させ
ることができる。 An embodiment of this invention is shown in FIGS. 4 and 5. That is, this chip-shaped solid electrolytic capacitor is characterized in that an epoxy resin layer 7 made of epoxy resin or epoxy modified resin is formed on the bottom surface 1a' of the main body molded with silicone exterior resin 1'. The other parts are the same as those in FIGS. 1 to 3. By providing the epoxy resin layer 7 with good adhesive properties over the entire bottom surface 1'a, this layer is of the same type as the adhesive 6, so that the adhesive 6 can be applied in spots when bonding to the substrate 4. Even if there is a problem, the area of adhesion to the main body is substantially increased by about 2 to 3 times, so it is possible to secure strength 2 to 3 times as much as in the past. Furthermore, since the epoxy resin layer 7 and the adhesive 6 have good "wettability", adhesion can be improved.
こ発明の製造方法を第6図および第7図により
説明する。すなわち、コンデンサ素子の両側面よ
り金属端子板8,9を引出すようにシリコン系樹
脂10にてモールド外装した後、その底面11ま
たは全体をブラスト処理して表面を粗面化すると
同時に表面の離型剤を除去した後スクリーン印刷
法、スプレー法、塗布法等により底面11にエポ
キシ樹脂層12を形成し(第6図)、その後金属
端子板8,9の両端を所定の長さに切断して、両
側面に沿つてほぼ直角に屈曲させさらに底面11
に折曲げ加工する(第7図)。 The manufacturing method of the present invention will be explained with reference to FIGS. 6 and 7. That is, after molding the capacitor element with silicone resin 10 so as to pull out the metal terminal plates 8 and 9 from both sides of the capacitor element, the bottom surface 11 or the entire surface is blasted to roughen the surface, and at the same time, the surface is released from the mold. After removing the agent, an epoxy resin layer 12 is formed on the bottom surface 11 by screen printing, spraying, coating, etc. (FIG. 6), and then both ends of the metal terminal plates 8 and 9 are cut to a predetermined length. , and the bottom surface 11 is bent at a substantially right angle along both sides.
(Figure 7).
このように構成したため、この方法によれば生
産性が容易になる。 With this configuration, this method facilitates productivity.
以上のように、この発明のチツプ状固体電解コ
ンデンサは、底面に接着剤と同系統の樹脂層を形
成したため、仮接着を確実にすることができると
いう効果がある。またその製造方法は、外装樹脂
の表面をブラストして底面に樹脂層を形成し、つ
いで端子板を折曲するようにしたため、生産性が
よいという効果がある。 As described above, the chip-shaped solid electrolytic capacitor of the present invention has the effect that temporary adhesion can be ensured because the resin layer of the same type as the adhesive is formed on the bottom surface. In addition, the manufacturing method has the effect of high productivity because the surface of the exterior resin is blasted to form a resin layer on the bottom surface, and then the terminal board is bent.
第1図は従来例の側面図、第2図はその底面
図、第3図は実装状態の側面図、第4図はこの発
明の一実施例の側面図、第5図はその実装状態の
側面図、第6図および第7図は製造過程を示す斜
視図である。
1,10……シリコン樹脂、1′a……底面、
2,3,8,9……金属端子板、4……基板、
5,5′……ランド、6……接着剤、7,12…
…樹脂層。
Fig. 1 is a side view of the conventional example, Fig. 2 is a bottom view thereof, Fig. 3 is a side view of the mounted state, Fig. 4 is a side view of an embodiment of the present invention, and Fig. 5 is its mounted state. The side view, FIGS. 6 and 7 are perspective views showing the manufacturing process. 1,10...Silicone resin, 1'a...Bottom surface,
2, 3, 8, 9...metal terminal board, 4...board,
5, 5'... Land, 6... Adhesive, 7, 12...
...resin layer.
Claims (1)
り引出した金属端子板を基板実装面となる底面側
に折曲したチツプ状固体電解コンデンサにおい
て、その底面に仮接着用接着剤と同系統の樹脂層
を形成したことを特徴とするチツプ状固体電解コ
ンデンサ。 2 両側面より外方より金属端子板を延出したコ
ンデンサ素子の表面を樹脂モールドする外装工程
と、この外装工程により形成された表面の全体ま
たは基板実装面となる底面をブラスト処理するブ
ラスト処理工程と、前記底面に仮接着用接着剤と
同系統の樹脂層を形成硬化させる層形成工程と、
前記金属端子板を前記樹脂層上に折曲加工する折
曲工程とを含むチツプ状固体電解コンデンサの製
造方法。[Scope of Claims] 1. A chip-shaped solid electrolytic capacitor that is molded and exteriorized with resin and has metal terminal plates pulled out from both sides bent toward the bottom side, which is the board mounting surface, and the bottom surface is coated with an adhesive for temporary bonding. A chip-shaped solid electrolytic capacitor characterized by forming a resin layer of the same type. 2. An exterior process in which the surface of the capacitor element with metal terminal plates extending outward from both sides is molded with resin, and a blasting process in which the entire surface formed by this exterior process or the bottom surface, which will be the board mounting surface, is blasted. and a layer forming step of forming and curing a resin layer of the same type as the temporary bonding adhesive on the bottom surface,
A method for manufacturing a chip-shaped solid electrolytic capacitor, including a bending step of bending the metal terminal plate onto the resin layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56152588A JPS5853818A (en) | 1981-09-26 | 1981-09-26 | Chip-shaped solid electrolytic condenser and method of producing same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56152588A JPS5853818A (en) | 1981-09-26 | 1981-09-26 | Chip-shaped solid electrolytic condenser and method of producing same |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5853818A JPS5853818A (en) | 1983-03-30 |
| JPS6113370B2 true JPS6113370B2 (en) | 1986-04-12 |
Family
ID=15543730
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56152588A Granted JPS5853818A (en) | 1981-09-26 | 1981-09-26 | Chip-shaped solid electrolytic condenser and method of producing same |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5853818A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH01230218A (en) * | 1988-03-10 | 1989-09-13 | Matsuo Denki Kk | How to treat solid electrolytic capacitor terminals |
| JP2006173383A (en) | 2004-12-16 | 2006-06-29 | Rohm Co Ltd | Solid-state electrolytic capacitor, and mounting structure thereof onto board |
-
1981
- 1981-09-26 JP JP56152588A patent/JPS5853818A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5853818A (en) | 1983-03-30 |
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