JPS6123487B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electronic timepiece, and more particularly to a drive system for a pulse motor, which is an electromechanical converter thereof.

BACKGROUND ART Electromechanical converters used in electronic watches include a balance that is forcibly driven by a frequency-divided signal from a crystal oscillator, a pulse motor that rotates one step at a time in a fixed direction, and the like.

Electromechanical converters commonly used in wristwatches are
Regarding tape drive systems using single-phase pulses, where stability against shock loads is an issue, a method has been proposed in which the pulse width of the drive pulses is controlled by the induced voltage of the drive coil in order to improve shock resistance. Some of them have been put into practical use.

However, in the case of a single-phase drive system, in the case of a balance wheel, the drive pulse is only applied to one side of the reciprocating motion, so even if the pulse width becomes wide at the time of impact, malfunctions are likely to occur, and multi-phase pulses In the case of a motor, the structure is multi-polar and the rotation angle of one step is small, so the induced voltage is small, and a sufficient control action cannot be performed and stability is not very good. From these points of view, stability is obtained by supplying pulses with the maximum pulse width, which has the disadvantage of increasing power consumption.

The present invention provides a highly stable converter drive circuit with good shock resistance and without the above-mentioned drawbacks.

The present invention provides a highly stable electric watch characterized in that the pulse width of the drive pulse of an electromechanical converter driven by two-phase drive pulses is controlled in a stepwise manner by the induced voltage of the drive coil. The purpose of this invention is to provide a drive circuit for a mechanical converter.

Another object of the present invention is to provide an electromechanical converter drive circuit for a watch, which is characterized by having an inverter having one end of the drive coil as an input, and an inverter having the other end as an input.

Examples will be described below.

Figures 1a and 1b show an example of an electromechanical converter, in which 101 is a balance wheel, 102 is a magnet, 103, 1
04 is a drive coil, 105 is a balance spring, a,
b is a drive coil terminal, and the magnet fixed to the balance wheel receives a force due to the magnetic field generated in the drive coil due to the current caused by the two-phase pulse voltage applied to a and b, and the balance consisting of the hairspring and balance wheel is performs a reciprocating motion. FIG. 2 shows another embodiment of the electromechanical converter, in which 106 is a rotor made of a magnet having at least two magnetic poles, 107 and 108 are stators made of magnetic material, 109 is a drive coil, a,
b is the drive coil terminal, and it is a pulse motor that rotates the rotor in a fixed direction in steps by guiding the magnetic flux generated in the drive coil to the stator due to the current due to the two-phase pulse voltage applied to a and b. be.

FIG. 3 shows an embodiment of the electronic timepiece of the present invention.
01 is a crystal oscillation circuit, 202 is a frequency dividing circuit, 203
are the pulse selection circuit 206 and the pulse conversion circuit 20
7. Pulse width switching circuit including control circuit 208, 2
04 is a drive circuit, and 205 is a detection storage circuit including a detection circuit 209 and a return means 210.

Figure 4 is an explanatory diagram of the state of the drive coil, Figures 5 and 6 are waveform diagrams of various parts when a balance wheel is used as an electromechanical converter, Figure 5 is at steady state, and Figure 6 is at impact. Indicates the status of Figures 7 and 8 are waveform diagrams of various parts when a pulse motor is used as an electromechanical converter.
Shows the condition at the time of impact.

In FIG. 3, the outputs of flip-flops (hereinafter referred to as FF) 117 and FF 118 of the frequency dividing circuit 202 are connected to the switching circuits 124 and 12 of the pulse selection circuit 206.
During normal operation, the output of FF117 is input to FF120, 12 of pulse conversion circuit 207.
Short pulse width pulses φ ₁ and φ ₂ - are generated alternately at the respective outputs F ₁ and F ₂ . _F1 is the _R4 terminal of the reset and set flip-flop 126 (hereinafter referred to as RS-FF);
The S ₆ terminal and F ₂ of the RS-FF 127 forming the return means 210 are connected to the S ₄ terminal of the RS-FF 126 and the S ₅ terminal of the RS-FF 128 forming the return means 210 . The other output F ₁ of the FF 120 of the pulse conversion circuit 207 is the input of the FF 123 of the control circuit 208 and the P channel MOS transistor 133 (hereinafter referred to as P-ChMOS transistor) of the drive circuit 204, and the other output ₂ of the FF 121 is the input of the FF 123 of the control circuit 208. The output F ₃ of the FF 123 is connected to the input of the N-channel MOS transistor 136 and each gate of the P-Ch MOS transistor 135 (hereinafter referred to as N-
(referred to as ChMOS transistor) ₃ is N-
It is connected to each gate of the ChMOS transistor 134. The drive coil 137 is connected between the common drains a and b of the MOS transistors, and the a terminal is connected to the induced voltage detection inverter 13 of the detection circuit 209.
0 and b terminals are connected to each input gate of an induced voltage detection inverter 129, and the inverter 129 output is connected to the restoring means 21 via a gate circuit 131.
The R ₆ terminal of the 0 FF 127 and the inverter 130 output are connected to the R ₅ terminal of the FF 128 via a gate circuit 132 . The FF127 output _F6 is connected to the switching circuit 125 of the pulse selection circuit 206 and the FF12
Eight outputs F ₅ are connected to each input of switching circuit 124 .

First, considering the case of a balance wheel, in Fig. 5, a φ ₁ pulse is generated at t=t ₁ and P-
ChMOS transistor 133 is turned on. At this time, since F ₃ =1, the N-ChMOS transistor 136 is on, and the drive circuit is in the state shown in FIG. Receive power. On the other hand, the _φ1 pulse is the set terminal of FF127 of the return means 210.
_S6 is applied and the FF output returns to f=1. t
When the pulse ends at = _t2 , _F3 =0, ₃ =1, P-ChMOS transistor 133, N-ChMOS transistor 136 turns off, 134 turns on,
It will look like Figure 4 2. A terminal is transistor 1
34, as shown in FIG. 5a, the induced voltage detection inverter 130 of the detection circuit 209 does not operate. On the other hand, the b terminal is grounded when the _φ1 pulse is applied, but it is ungrounded immediately after the pulse ends, and the induced voltage is applied to the inverter 12.
9, and at t= _t3 to _t4 , the induced voltage exceeds the threshold voltage of the inverter, and the gate circuit 13
An output d of 1 is generated. Gate circuits 131, 13
2 is an FF 127 of the means 210 for restoring only the induced voltage, excluding the drive pulses detected by the induced voltage detection inverters 129 and 130 of the detection circuit 209;
128 reset input.

This output d is applied to the reset terminal _R6 of the FF127 of the recovery means 210, and the FF127 output f=
It becomes 0. Therefore, since the output of the selection gate 125 of the pulse selection circuit 206 becomes the output of the FF 118, the next φ ₂ pulse also has the same short pulse width as the φ ₁ pulse.

Next, at t= _t5 , a _φ2 pulse is generated, and P-
ChMOS transistor 135 is turned on. N-
Since the ChMOS transistor 134 remains on, the drive circuit 204 is in the state shown in FIG. 4(3),
A driving voltage is applied to the b terminal, a current flows from b to a, and the balance receives a driving force in the opposite direction. On the other hand, the _φ2 pulse is applied to the set terminal _S5 of the FF 128 of the return means 210, and the FF output returns to e=1. When the pulse ends at t=t ₆ , F ₃ = 1, ₃
= 0, P-ChMOS transistor 135,
N-ChMOS transistor 134 is off, 136
is turned on, as shown in FIG. 4. The b terminal is grounded via the transistor 136, as shown in FIG.
Therefore, the induced voltage detection inverter 1
29 does not work. On the other hand, the a terminal is grounded when the _φ2 pulse is applied, but immediately after the pulse ends, the grounding is released and an induced voltage is applied to the inverter 130. At t= _t7 to _t8 , the induced voltage reaches the threshold of the inverter. The voltage exceeds the value voltage, and gate circuit output C is generated. FF128 is reset by C and e=
0, the switching circuit 124 output becomes the FF117 output, and the next _φ1 becomes a short pulse width pulse,
Also, FF127 is set at _φ1 and reset at d, so that f=0 and the output of the switching circuit 125 is FF11.
7 outputs, and the next _φ2 is a pulse with a short pulse width.

Next, when an impact load is applied, the result will be as shown in FIG. In other words, the FF127 output f is set to 1 at φ ₁ , but the induced voltage decreases to below the threshold voltage and no reset pulse is generated, so f
= 1, and the switching circuit 125 switches to FF
FF118 output is applied to the _R2 terminal of 121,
φ ₂ becomes twice the pulse width (t ₁₃ to t ₁₄ ). moreover
FF128 is set to 1 by _φ2 , but since a reset pulse is not generated, e remains at 1, the switching circuit 124 switches, and the FF118 output is applied to the _R1 terminal of FF120, and the next _φ1 is set to 2. The pulse width (t ₁₅ to t ₁₆ ) is doubled. When the pulse width doubles, the driving force increases, and the induced voltage returns to the previous state, a reset pulse is generated at d at t= _t17 to _t18 , f=0, and the next _φ2 pulse is the same as the previous one. The state returns, and the _φ1 pulse also returns to the previous state.

Next, consider the case of a pulse motor. The induced voltage waveform is slightly different, and everything else is almost the same as in the case of the balance wheel, but in Fig. 7, t=
At t ₃₁ , a φ ₁ pulse is generated, a driving voltage is applied to the a terminal of the driving coil, a current flows from a to b, the stators 107 and 108 are excited, and the rotor 106 rotates 180° clockwise for a certain period of time. It vibrates and stops. On the other hand, the _φ1 pulse is applied to the set terminal _S6 of the FF 127 of the return means 210, and the FF output returns to f=1. Immediately after _φ1 is disconnected, the a terminal is grounded,
The b terminal is disconnected from ground, and the induced voltage accompanying the rotation of the rotor is applied to the detection inverter 1 of the detection circuit 209.
29, and at t= _t33 to _t34 , the induced voltage exceeds the threshold voltage of the detection inverter, and the gate circuit output d is generated. The FF127 output f is reset to 0 and the next _φ2 has a short pulse width. The rotor becomes almost stationary and stable at t=t ₃₅ . Next, at t=t ₃₆ , a _φ2 pulse is generated and the drive coil b
A driving voltage is applied to the terminal, and current flows from b to a, causing reverse excitation to the previous direction and rotating 180 degrees in the same direction. On the other hand, the _φ2 pulse is applied to the set terminal _S5 of the FF 128 of the return means 210, and the FF output returns to e=1. When the pulse ends at t= _t37 , the b terminal is grounded, the a terminal is ungrounded, and the induced voltage is applied to the detection inverter 130. At t= _t38 to _t39 , the induced voltage reaches the threshold voltage of the detection inverter. As a result, gate circuit output c is generated. FF12
8 is reset by c and e=0, switching circuit 1
24 output becomes the FF117 output, the next φ ₁ becomes a short pulse width pulse, FF127 is set at φ ₁ , reset at d, and f=0, and the switching circuit 125 output becomes the FF117 output, and the next φ ₂
is a pulse with a short pulse width.

Next, when subjected to impact load, as shown in Figure 8, FF
127 output f is set to 1 at φ ₁ , but the induced voltage decreases and becomes below the threshold voltage of the detection inverter of the detection circuit 209, causing the reset pulse d.
Since no longer occurs, f=1 remains set, the switching circuit 125 switches, and the FF 121
The FF118 output is applied to the _R2 terminal, and φ2 is ₂
The pulse width (t ₄₃ to t ₄₄ ) is doubled. Furthermore, FF1
28 is set by φ ₂ and becomes e=1, and since the induced voltage decreases and becomes below the threshold voltage of the detection inverter 130 and the reset pulse c is no longer generated, e=1 remains set.
The switching circuit 124 switches and the _R1 terminal of FF120 becomes FF.
118 output is applied, the pulse width of _φ1 becomes twice, and the driving force increases, so that malfunction can be prevented. When the load becomes 0, the induced voltage returns to the previous state, a reset pulse is generated at d, and f=0,
The φ ₂ pulse width returns to its previous state, and the φ ₁ pulse also returns to its previous state. In the case of a balance wheel, the induced voltage is generated immediately before and after the drive pulse, so either can be used for pulse width control, but in the case of a pulse motor, the induced voltage is only generated immediately after the drive pulse, so this Examples are suitable.

If configured as in the present application, the converter will be driven with a drive pulse with a minimum pulse width of 5 milliseconds or less during normal operation, and when an impact load is applied, the converter will be driven with a drive pulse of 5 milliseconds or less.
By increasing the pulse width to 5 milliseconds or more, we can provide the converter with driving force to overcome the shock and prevent malfunctions, and once the shock load is removed, by reducing the pulse width to the original 5 milliseconds or less, the average It is possible to reduce the consumption current to 1 μA or less.

In addition, since the induced voltage of the drive coil is detected by a CMOS inverter, there is no need for any detection mechanism such as installing a detection coil in the converter or providing contacts or semiconductors in the wheel train connected to the converter, and the drive current can be detected. Since this is not the case, an amplification circuit is not required, and the current consumption can be ignored. Therefore, it is possible to reduce the total current consumption including the oscillation circuit and the frequency dividing circuit to 2 μA or less.

In this embodiment, the drive pulse width is set to be twice as long as during normal operation when an impact occurs, but it is also possible to set the drive pulse width to an arbitrary pulse width in steps.

Further, although the present embodiment has described the drive pulse width at the time of impact, it is obvious that the present invention can also be applied to cases where load fluctuation occurs, such as when driving a calendar display, for example.

[Brief explanation of the drawing]

Figures 1a and b are a plan view and a side view showing an embodiment of a balance that is an electromechanical converter, and Figure 2 is a
FIG. 3 is a circuit diagram showing an embodiment of the electronic timepiece of the present invention; FIG. 4 is an explanatory diagram of the state of the drive coil; FIG. Figure 6 is a waveform diagram of each part when a balance wheel is used as an electromechanical converter, Figures 7 and 8
The figure is a waveform diagram of each part when a pulse motor is used. 101... Balance wheel, 102... Magnet, 103,
104, 109... Drive coil, 105... Balance spring, 106... Rotor, 107, 108...
... Stator, 201 ... Oscillation circuit, 110 ... Inverter, 111 ... Crystal resonator, 112 ... Feedback resistor, 113, 114 ... External capacitor, 202 ...
...Frequency dividing circuit, 115...Inverter, 116,
117, 118, 119...flip flop,
203...Pulse width switching circuit, 206...Pulse selection circuit, 207...Pulse conversion circuit, 208...
...Control circuit, 124, 125...Switching circuit, 20
4...Drive circuit, 133, 135...P-
ChMOS transistor, 134,136...N
- ChMOS transistor, 137... drive coil, 205... detection storage circuit, 209... detection circuit, 210... recovery circuit, 129, 130... detection inverter, 131, 132... gate circuit.

Claims (1)

[Claims] 1. A pulse motor including an oscillation circuit, a frequency dividing circuit, a pulse motor drive circuit, a drive coil, and a rotor;
The electronic timepiece includes a detection circuit for detecting the induced voltage generated in the drive coil of the pulse motor, and the electronic timepiece is configured to vary the driving force to the pulse motor based on the detection signal of the detection circuit, wherein at least two of the first and second pulse widths are provided. a pulse conversion circuit for generating different types of drive pulses; a pulse selection circuit for supplying a drive pulse having a first pulse width of the pulse conversion circuit to the pulse motor drive circuit based on the detection signal of the detection circuit; An electronic timepiece characterized by comprising a return means for returning the pulse selection circuit to a state in which a drive pulse having a second pulse width is selected.