JPS6330593B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electronic timepiece, and particularly to a drive system for a pulse motor that is an electromechanical converter thereof.

The electromechanical converters used in electronic watches include a balance that is forcibly driven by a frequency-divided signal from a crystal oscillator, a pulse motor that rotates in a fixed direction one step at a time, and the like.

The electromechanical converter used in conventional watches is
Although it is driven using a drive pulse having a constant pulse width, the electromechanical converter is applied with a load associated with impact and a load associated with calendar drive in addition to the load during normal pointer drive. Therefore, the pulse width of the drive pulse is set wide enough to allow rotation even when the load increases to the maximum, so under normal pointer drive load conditions, energy is wasted and current consumption is reduced. This increased the battery life and shortened the battery life.

However, as a method to solve the above drawback, the induced voltage generated in the drive coil is detected by a detection circuit, the magnitude of the load is determined from this detected waveform, and the pulse width of the drive pulse is controlled according to the magnitude of the load. A method has been proposed.

The above method is an excellent method that can stabilize the operation and extend the battery life at the same time because it controls the supplied energy according to the size of the load.
During actual detection, there is a drive pulse in addition to the induced voltage at the terminals of the drive coil, so
Since the induced voltage and drive pulse are inputted as detection signals to the detection circuit, the detection waveform is disturbed and the magnitude of the load cannot be accurately determined.

The present invention is intended to solve the above-mentioned drawbacks, and aims to provide an electromechanical conversion circuit for a timepiece that can accurately determine the size of a load without being affected by drive pulses.

Examples will be described below.

Figures 1a and 1b show an example of an electromechanical converter, in which 101 is a balance wheel, 102 is a magnet, 103, 1
04 is a drive coil, 105 is a balance spring, a,
b is a drive coil terminal, and the magnet fixed to the balance wheel receives a force due to the magnetic field generated in the drive coil due to the current caused by the two-phase pulse voltage applied to a and b, and the balance consisting of the hairspring and balance wheel is performs a reciprocating motion. FIG. 2 shows another embodiment of the electromechanical converter, in which 106 is a rotor made of a magnet having at least two magnetic poles, 107 and 108 are stators made of magnetic material, and 109 is a driving coil, a, b.
is the drive coil terminal, and it is a pulse motor that rotates the rotor in a fixed direction in a step shape by guiding the magnetic flux generated in the drive coil to the stator due to the current due to the two-phase pulse voltage applied to a and b. .

FIG. 3 shows an embodiment of the electromechanical converter drive circuit of the present invention, in which 201 is a crystal oscillation circuit, 202 is a frequency dividing circuit, 203 is a pulse width circuit including a pulse selection circuit 206, a pulse conversion circuit 207, and a control circuit 208. A switching circuit, 204 a drive circuit, 205 a detection circuit 2
09, a detection storage circuit including a restoring means 210;

Figure 4 is an explanatory diagram of the state of the drive coil, Figures 5 and 6 are waveform diagrams of various parts when a balance wheel is used as an electromechanical converter, Figure 5 is at steady state, and Figure 6 is at impact. Indicates the status of 7 and 8 are waveform diagrams of various parts when a pulse motor is used as an electromechanical converter, with FIG. 7 showing a steady state and FIG. 8 showing a state at an impact.

In FIG. 3, the outputs of flip-flops (hereinafter referred to as FF) 117 and FF 118 of the frequency dividing circuit 202 are connected to the switching circuits 124 and 125 of the pulse selection circuit 206.
In steady state, the output of FF117 is input to FF120, 121 of pulse conversion circuit 207.
Short pulse width pulses φ ₁ and φ ₂ are alternately generated at the respective outputs F ₁ and F ₂ . F ₁ is reset, set flip-flop 1
26 (hereinafter referred to as RS-FF), the _{S 6 terminal} of RS-FF 127, which constitutes the return means 210, and the F ₂
is the _S4 terminal of the RS-FF126, and the return means 210
It is connected to the _S5 terminal of RS-FF128. The other output ₁ of the FF 120 of the pulse conversion circuit 207 is the input of the FF 123 of the control circuit 208 and the P channel MOS transistor 133 (hereinafter referred to as P-Ch MOS transistor) of the drive circuit 204, and the other output ₂ of the FF 121 is the input of the FF 123 of the control circuit 208. It is connected to other inputs and each gate of the P-Ch MOS transistor 135, and the output _F3 of the FF 123 is connected to the N-channel MOS transistor 136 (hereinafter referred to as N-Ch
(referred to as MOS transistor) ₃ is N-Ch MOS
Connected to each gate of transistor 134. The drive coil 137 is connected between the common drains a and b of the MOS transistors, and the a terminal is connected to the induced voltage detection inverter 130 and b of the detection circuit 209.
The terminals are connected to each input gate of the induced voltage detection inverter 129, and the inverter 129 output is connected to the return means 210 via the gate circuit 131.
The R ₆ terminal of the FF 127 and the output of the inverter 130 are connected to the R ₅ terminal of the FF 128 via a gate circuit 132 . The FF127 output _F6 is connected to the switching circuit 125 of the pulse selection circuit 206, and the FF128 output _F5 is connected to each input of the switching circuit 124.

First, considering the case of a balance wheel, in FIG. 5, a φ ₁ pulse is generated at t=t ₁ and the P-Ch MOS transistor 133 is turned on. At this time F ₃ = 1
Therefore, the N-Ch MOS transistor 136 is on, and the drive circuit is in the state shown in FIG.
A driving voltage is applied to the a terminal, a current flows from a to b, and the balance receives a driving force. On the other hand, the φ ₁ pulse is applied to the set terminal S ₆ of the FF 127 of the return means 210, and the FF output returns to f=1. When the pulse ends at t=t ₂ , F ₃ =0, ₃ =1, and P-Ch
The MOS transistor 133N-Ch MOS transistor 136 is turned off and the transistor 134 is turned on, as shown in FIG. 42. Since the a terminal is grounded through the transistor 134 as shown in FIG.
doesn't work. On the other hand, the b terminal is grounded when the _φ1 pulse is applied, but immediately after the pulse ends, the grounding is released and _an induced voltage is applied to the inverter ₁₂₉ . The output d of the gate circuit 131 becomes lower than the threshold voltage.
occurs.

RS-FF12 in the detection storage circuit 205
Reference numeral 6 constitutes a gate pulse generation means for generating a gate pulse including the application period of the drive pulse supplied to the drive coil terminal of the electromechanical converter, and gate circuits 131 and 132 generate the gate pulse from the RS-FF 126. The return means 21 controls the induced voltage supplied to the detection circuit 209 from the drive coil terminal and removes the drive pulse from among the drive pulses and uses only the induced voltage as a detection signal.
It constitutes a prohibition gate means for supplying 0 to 0. The prohibition gate means may be provided between the drive coil terminal and the detection circuit 209, and it is also possible to provide a gate means for rendering the detection inverter constituting the detection circuit 209 inactive. In short, the condition is that it be provided in the detection path connecting the drive coil terminal and the return means 210 for storing detection data.

This output d is applied to the reset terminal _R6 of the FF127 of the recovery means 210, and the FF127 output f=
It becomes 0. Therefore, since the selection gate 125 output of the pulse selection circuit 206 becomes the output of the FF 118,
The next φ ₂ pulse also has the same short pulse width as the φ ₁ pulse.

Next, a φ ₂ pulse is generated at t=t ₅ , and the P-Ch MOS
Transistor 135 is turned on. N-Ch
Since the MOS transistor 134 remains on, the drive circuit 204 is in the state shown in FIG.
A driving voltage is applied to the terminal, a current flows from b to a, and the balance receives a driving force in the opposite direction. On the other hand, the φ ₂ pulse is applied to the set terminal S ₅ of the FF 128 of the return means 210, and the FF output returns to e=1. When the pulse ends at t=t ₆ , F ₃ = 1, ₃
= 0, P-Ch MOS transistor 134
is off and 136 is on, as shown in FIG. Since the b terminal is grounded through the transistor 136, as shown in FIG. 5b, the induced voltage detection inverter 129 does not operate. On the other hand, the a terminal is grounded when the φ ₂ pulse is applied, but immediately after the pulse ends, it is ungrounded and an induced voltage is applied to the inverter 130, and at t= _t7 to _t8 , the induced voltage reaches the inverter threshold. The voltage exceeds the value voltage, and gate circuit output C is generated. FF128 is reset by C and e=0, and the switching circuit 124 output becomes FF.
117 output, and the next φ ₁ becomes a pulse with a short pulse width, and FF 127 is set at φ ₁ and reset at d, and f=0, and the switching circuit 125 output becomes
The output is FF117, and the next φ ₂ is a pulse with a short pulse width.

In the above series of operations, the operations of the RS-FF 126, which is the gate pulse generation means, and the gate circuits 131 and 132, which are the inhibition gate means, are performed as follows.
This will be explained using each waveform shown in the figure.

Since the RS-FF 126 is reset by φ ₁ and set by φ ₂ , the signal of F ₄ is t ₁ to _{t 5} =
0, rectangular wave with t ₅ to t ₉ = 1, and signal of ₄ with t ₁ to _{t 5} =
1, t ₅ to t ₉ =0, and the output signals of F ₄ and ₄ are gate pulses that include application periods of drive pulses Pa and Pb supplied to drive coil terminals a and b. Next, the operation for removing the drive pulse from the detection signal using the gate pulse and selecting only the induced voltage will be explained.

That is, at the time when the drive pulse Pa is applied to the coil terminal a, F ₄ =1, ₄ =0, so the gate circuit 131 is turned on and the gate circuit 132 is turned on.
is off, and as a result, the drive pulse Pa is blocked by the gate circuit 132 which is in the off state, but the induced voltage generated at the coil terminal b at timing t ₃ to t ₄ after this drive pulse Pa is converted into a detection signal Pd by the detection circuit 209, and then passed through the gate circuit 131, which is in an on state, and transmitted to the FF 127 of the recovery means 210. Furthermore, at the time when the drive pulse Pb is applied to the coil terminal b, F ₄ =0, ₄ =1, so the gate circuit 1
31 is off and the gate circuit 132 is on, and as a result, the drive pulse Pb is blocked by the gate circuit 131 which is in the off state, but at timing t ₇ to t ₈ after this drive pulse Pb. The induced voltage generated at the coil terminal a is converted into a detection signal Pc by the detection circuit 209, and then passes through the gate circuit 132 which is in an on state and is sent to the FF of the return means 210.
128. The above selection operation is performed by inverting the RS-FF 126 every time the drive pulses φ ₁ and φ ₂ are supplied, as shown in FIG.
This is periodically repeated by switching the gate circuits 131 and 132 by F ₄ and ₄ .

Although the gate pulses F ₄ and ₄ are short waveforms with a duty of 50% in this embodiment, they are not limited to this, and the point is that the gate circuit on the side to which the driving pulse is applied is connected to the driving pulse. Of course, it is sufficient to use a gate pulse for turning off during the application period of .

Next, when an impact load is applied, the result will be as shown in FIG. That is, the FF127 output f is set to 1 at φ ₁ , but since the induced voltage decreases and becomes below the threshold voltage, no reset pulse is generated, so f=1.
remains as it is, and the switching circuit 125 switches FF12.
The FF118 output is applied to the _R2 terminal of 1, and _φ2 has twice the pulse width ( _t13 to _t14 ). Furthermore FF1
28 is set to 1 by _φ2 , but since no reset pulse is generated, e=1 remains, and the switching circuit 124 switches and the _R1 terminal of FF120 is set to FF1.
18 outputs are applied, and the next φ ₁ has twice the pulse width (t ₁₅ to t ₁₆ ). When the pulse width doubles, the driving force increases, and the induced voltage returns to its previous state, t=
A reset pulse is generated at d from _t17 to _t18 , and f=0
Then, the next φ ₂ returns to the previous state, and further φ ₁
The pulse also returns to its previous state.

Next, consider the case of a pulse motor. The induced voltage waveform is slightly different, and everything else is almost the same as in the case of the balance wheel, but in Fig. 7, t=t ₃₁
A φ ₁ pulse is generated, a driving voltage is applied to the a terminal of the driving coil, and a current flows from a to b to the stator 10.
7 and 108 are excited, and the rotor 106 moves to the right.
It rotates 180°, vibrates for a certain period of time, and then stops. On the other hand, φ ₁
The pulse is applied to the set terminal _S6 of the FF 127 of the return means 210, and the FF output returns to f=1.
Immediately after φ ₁ is cut off, the a terminal is grounded, the b terminal is ungrounded, the induced voltage accompanying the rotation of the rotor is applied to the detection inverter 129 of the detection circuit 209, and the induced voltage is increased at t=t ₃₃ to _{t 34} becomes equal to or higher than the threshold voltage of the detection inverter, and gate circuit output d is generated. The FF127 output f is reset to 0 and the next φ ₂ has a short pulse width. The rotor becomes almost stationary and stable at t=t ₃₅ . Next, at t=t ₃₆ , a φ ₂ pulse is generated, a driving voltage is applied to the b terminal of the driving coil, a current flows from b to a, and the coil is reversely excited and rotated 180° in the same direction. On the other hand, the φ ₂ pulse is applied to the set terminal S ₅ of the FF 128 of the return means 210.
The FF output returns to e=1. When the pulse ends at t= _t37 , the b terminal is grounded, the a terminal is ungrounded, and the induced voltage is applied to the detection inverter 130. At t= _t38 to _t39 , the induced voltage reaches the threshold voltage of the detection inverter. As a result, gate circuit output c is generated. FF128 is reset at c and e=
0, the switching circuit 124 output becomes the FF117 output, and the next _φ1 becomes a short pulse width pulse, and the FF
127 is set at _φ1 , reset at d, and becomes f=
0, the output of the switching circuit 125 becomes the output of the FF 117, and the next φ ₂ is a pulse with a short pulse width. In addition, even in the case of the above pulse motor,
The selection operation by the RS-FF 126 and gate circuits 131 and 132 is performed in the same manner as in the case of the balance wheel shown in FIG. That is, as shown in FIG. 7, the drive pulse Pa is blocked by the gate pulse ₄ , and the drive pulse Pb is blocked by the gate pulse _F4 .
As a result, only the detection signals Pd and Pc are transmitted to the return means 210.

Next, when subjected to impact load, as shown in Figure 8, FF
127 output f is set to 1 at φ ₁ , but the induced voltage decreases and becomes below the threshold voltage of the detection inverter of the detection circuit 209, and the reset pulse d is generated.
Since no longer occurs, f=1 remains set, the switching circuit 125 switches, and the FF 121
FF118 is applied to the _R2 terminal, and _φ2 has twice the pulse width ( _t43 to _t44 ). Furthermore, FF128 is _φ2
Since the induced voltage decreases and becomes below the threshold voltage of the detection inverter 130, and the reset pulse c is no longer generated, e=1 remains set and the switching circuit 12
4 is switched, the FF118 output is applied to the _R1 terminal of the FF120, and _φ1 has twice the pulse width, which can prevent malfunctions due to increased driving force. When the load becomes 0, the induced voltage returns to the previous state and a reset pulse is generated at d, f=0, the φ ₂ pulse returns to the previous state, and the φ ₁ pulse also returns to the previous state.
In the case of a balance wheel, induced voltage is generated immediately before and after the drive pulse, so either method can be used for pulse width control, but in the case of a pulse motor, the induced voltage is only generated immediately after the drive pulse, so this method is not recommended. An example is appropriate.

As described above, in the present invention, the inhibition gate means is provided in the induced voltage detection path, and the gate pulse generation means for generating a gate pulse that includes at least the application period of the drive pulse is provided, and the inhibition gate means is provided in the gate pulse. By controlling this, the drive pulse is removed from the detection signal, so the detection signal uses only the induced voltage as the detection signal, making it possible to accurately determine the size of the load, resulting in stable operation and long battery life. This has a great effect on the realization of an electronic clock that simultaneously achieves

In this embodiment, the drive pulse width is set to be twice as long as during normal operation when an impact occurs, but it is also possible to set the drive pulse width to an arbitrary pulse width in steps.

Further, in this embodiment, the driving pulse width at the time of impact has been described, but it is obvious that the invention can also be applied to cases where load fluctuation occurs, such as when driving a calendar display, for example.

[Brief explanation of the drawing]

1A and 1B are a plan view and a side view showing an embodiment of a balance that is an electromechanical converter, FIG. 2 is a plan view and a side view showing an embodiment of a pulse motor that is an electromechanical converter, and FIG. is a circuit diagram showing one embodiment of the electronic timepiece of the present invention, FIG. 4 is a state explanatory diagram of a drive coil, FIGS. 5 and 6 are waveform diagrams of various parts when a balance wheel is used as an electromechanical converter, FIGS. 7 and 8 are waveform diagrams of various parts when a pulse motor is used. 109,137... Drive coil, 107,10
8... Stator, 201... Oscillation circuit, 202...
Frequency dividing circuit, 206...Pulse selection circuit, 207...
... Pulse conversion circuit, 208 ... Control circuit, 205
...Detection storage circuit, 209...Detection circuit, 210
...Return circuit, 129,130...Detection inverter, 131,132...Gate circuit, 126...
...RS-FF.

Claims (1)

[Claims] 1. A pulse motor including an oscillation circuit, a frequency dividing circuit, a pulse motor drive circuit, a drive coil, and a rotor,
A detection memory circuit that detects an induced voltage generated in the drive coil after the application of the drive pulse to the pulse motor is completed, and a pulse conversion circuit that controls the pulse width of the drive pulse according to the detection signal of the detection memory circuit. In the electronic timepiece, the detection storage circuit includes an inhibition gate means inserted into the detection path of the induced voltage, and a gate pulse generation means for generating a gate pulse including at least an application period of the drive pulse, An electronic timepiece characterized in that the prohibition gate means is configured to be controlled by the gate pulse.