JPS6125288B2 - - Google Patents

Description

[Detailed description of the invention]

This invention relates to a flow velocity measuring device that measures flow velocity or flow rate by installing a vortex generation column in a measuring fluid flowing in a conduit and detecting the number of Karman vortices (generation vortex frequency) generated downstream of the column using ultrasonic waves. , the purpose of which is to provide a method that can ensure the initial phase locking angle of a flow velocity measurement device that detects eddy signals by a phase-locked loop circuit using a voltage-controlled phase-shift circuit, and furthermore, To provide a method for quickly resynchronizing and restarting normal eddy signal detection operation even when the phase locked loop becomes out of synchronization due to a shift circuit being out of an operable phase shift angle. . Japanese Utility Model Publication No. 17010/1973 proposes a method in which a vortex generating column is provided in a conduit and the generation frequency of the Karman vortex generated downstream of the column is detected using ultrasonic waves to measure the flow velocity or flow rate of fluid flowing within the tube. When detecting the Karman vortex using this method, the ultrasound transmitted from the ultrasound transmitter propagates through the fluid, is modulated by the Karman vortex, and is received by the receiver. The modulation that ultrasonic waves undergo is amplitude modulation, frequency modulation, phase modulation, etc., and the vortex signal can be demodulated by each demodulation method. One of these demodulation methods is a phase demodulation circuit method. FIG. 1 shows an example of a conventional phase demodulation circuit system. In the figure, 1 is a vortex generation column, 11
is a conduit, 2 is an ultrasonic transmitter, 3 is an ultrasonic transmitter 2
4 is an ultrasonic receiver, 5 is an amplifier for waveform shaping the received signal, 7 is an active low-pass filter circuit constituting a loop filter, 71, 74, 75 is a resistor, 72 is a capacitor, 73 is an operational amplifier, 8 is a voltage controlled phase shift circuit, and 81 and 82 are monostable units with variable time width for shifting the phase of the input signal according to the control voltage _V7 . A phase shift circuit consisting of a multi-circuit, 83 is a monostable multi-circuit with a fixed time width for adjusting the duty ratio of the output pulse, 811, 8
21,831,835,836 are resistors, 812,
822, 823 are capacitors, 813, 823,
833 is a diode, 814, 824, 834 are voltage comparators, and 815, 825, 835 are D flip-flop circuits. The ultrasonic transmitter 2 is driven by an oscillator 3 to oscillate ultrasonic waves. The sound wave is phase modulated by a Karman vortex street, a modulated signal is received by a receiver 4, and the waveform is shaped by an amplifier 5 to form a voltage _V5 , which is applied as one input of a phase comparator 6 constituted by an exclusive OR circuit. The voltage controlled phase shift circuit 8 is a circuit that generates a phase shift signal whose phase shift angle from the output signal V ₁ of the oscillator 3 is controlled in response to the output voltage V ₇ of the loop filter 7, and is connected in series with each other. The pulse width can be controlled by the output voltage of the loop filter 7.
It consists of phase shift circuits 81 and 82 (two) and a monostable multi-circuit 83 with a fixed time width that sets the output pulse width to substantially match the oscillation frequency signal pulse width. Phase shift circuits 81 and 82 in each stage above
are resistors 811 and 821 and capacitor 81, respectively.
2, 822, a voltage comparator 814, 824 that compares this capacitor voltage with the voltage V ₇ of the loop filter 7, and a signal V ₁ of the oscillator 3.
D-type flip-flop circuits 815 and 825 are sequentially triggered using the first stage trigger signal and are reset by the outputs of the comparators 814 and 824, respectively.
and diodes 812, 823 which control charging and discharging of the capacitors 812, 822 by the output of the flip-flop circuit. The output signal V ₄ of the voltage controlled phase shift circuit 8 is input to the other input of the phase comparator 6, and the phase comparator 6, the loop filter 7, and the voltage controlled phase shift circuit 8 are input to the other input of the phase comparator 6.
Together, they form a phase-locked loop. Figure 2
V ₁ to _{V 6} represent voltage signal waveform diagrams of respective parts indicated by the same reference numerals V ₁ to _{V 6} in FIG. 1. In the phase-locked loop configured as described above, a modulated signal V _{5 is phase-modulated by a Karman vortex using the signal V 1 of} the oscillation circuit 3 as a reference, and is further accompanied by a phase delay from the transmitter 2 to the receiver 4.
is given as one input of the phase comparator 6. In Fig. 2, the signal V ₁ of the oscillator 3 and the modulation signal V ₅ happen to be in the same phase, but when the density of the fluid being measured changes and the speed of sound changes, the phase difference between these two signals has a wide angle. A phase difference occurs. On the other hand, the signal V ₁ from the oscillator 3 is given to the voltage controlled phase shift circuit 8 . In the voltage controlled phase shift circuit 8, first, the first stage D-type flip-flop 815 is triggered by the rise of the signal _V1 of the oscillator 3 to the "H" level and performs an inverting operation, and charging of the capacitor 812 begins. When the charging voltage of this capacitor reaches the output voltage V7 of the loop filter ₇ , the D-type flip-flop 815 activates the comparator 81.
4, and outputs a pulse output _V2 with a time width TD1 corresponding to the output voltage _V7 .
The second stage D-type flip-flop 825 is triggered by the rise of the first stage pulse output V ₂ to the "H" level, and the output voltage V ₇ of the loop filter 7 is triggered.
A pulse output V ₃ with a time width TD2 _{corresponding} to It generates a pulse output V ₄ with a time width and is applied as the other input of the phase comparator 6 . That is, the output V ₄ of the voltage controlled phase shift circuit 8 has the pulse time width TD1 of the first and second phase shift circuits 81 and 82 corresponding to the output voltage V ₇ of the loop filter 7.
The signal becomes a signal whose phase is shifted from the signal _V1 of the oscillator 3 by the phase of the synthesis time of TD2. The phase comparator 6 generates a voltage V ₆ corresponding to the phase difference between the above-mentioned modulation signal V ₅ and the output signal V ₄ of the voltage controlled phase shift circuit 8, and the loop filter 7 generates a high frequency component of the output voltage V ₆ . By removing unnecessary components such as noise, the phase shift angle of the voltage controlled phase shift circuit 8 is controlled so that the phase error of the two inputs V ₄ and V ₅ of the phase comparator 6 becomes small, and a phase locked loop is eventually formed. It is something that will be done. FIG. 3 shows the voltage characteristics of the average value of the output voltage corresponding to the phase difference of the input of the phase comparator 6. As is clear from FIG. 3, if the set voltage of the positive phase input terminal of the operational amplifier 73 of the loop filter ₇ in _FIG . It can be seen that the phase difference is π/2 and a phase locked loop is formed. With the phase-locked loop configured in this way, a signal V ₄ that follows the phase modulation of the phase modulation signal V ₅ due to the Karman vortex is obtained, so by setting the loop response of the loop filter 7, the phase modulation signal of the Karman vortex is In other words, the vortex signal appears at the output V ₇ of the loop filter or the output V ₆ of the phase comparator 6,
The carrier filter 9 provides vortex signals 1 and 2 from which unnecessary frequency components have been removed. On the other hand, since the phase is originally a periodic function every 2π, the phase synchronization point shown in Figure 3 above is exactly π/2±2nπ (n is an integer), and there may be multiple points. On the other hand, the phase shift angle that can be shifted per stage of the above-mentioned phase shift circuits 81 and 82 is limited from 0 to 2π with respect to the input signal. In order for the output V ₄ of the voltage controlled phase shift circuit 8 to follow even when the modulation signal V ₅ is wide-angle phase modulated, a phase shift circuit 81 of 0 to 2π is required per stage.
82 may be connected in series, and in the case of two stages, the relationship between the phase shift angle corresponding to the output voltage _V7 of the loop filter 7 is as shown in FIG. When phase synchronization is established, the output V ₇ of loop filter 7 will be a predetermined value determined by the loop, but as mentioned above, there are multiple stable points of phase synchronization of the loop, π/2 ± 2nπ. Therefore, it can be seen that there are also multiple predetermined outputs V ₇ that provide stable points for the loop. The output voltage _V7 of the loop filter 7 corresponding to the plurality of stable points is controlled to be greater than the minimum voltage Vmin corresponding to the minimum value of the controllable phase shift angle of the voltage controlled phase shift circuit 8 shown in FIG. If the voltage is smaller than the maximum possible voltage Vmax, this phase-locked loop will be established, but if not, the loop will not be established and demodulation of the Karman vortex signal will be impossible. The present invention aims to eliminate the above-mentioned drawbacks, and provides a current velocity measuring device in which the phase-locked loop operates at the optimum phase-locked stable point at the same time as the current velocity measuring device is operated, and also provides a flow velocity measuring device in which the phase-locked loop operates at the optimum phase-locked stable point, and even if the phase-locked loop becomes synchronized by any chance. It is an object of the present invention to provide a flow rate measuring device that can quickly resynchronize even if a deviation occurs. Furthermore, when this flow rate measuring device is used for measuring the intake air amount of an automobile engine where the power supply voltage fluctuates widely or the temperature of the fluid to be measured changes greatly, the above-mentioned phase-locked loop operates stably. The purpose is to provide a flow rate measuring device with stable detection. An embodiment of the present invention shown in FIG. 5 will be described below. That is, in FIG. 5, a resistor 55 and a capacitor 56 are time constant circuits, 57 is a Zener diode, resistor 54 is a base-emitter resistance of transistor 52, 53 is a resistor, and transistor 51 is a transistor for discharging the integrating capacitor 72 of loop filter 7. be. In the flow rate measuring device configured as described above, when the device power supply voltage Vcc is first applied in a stepwise manner in a state of zero V, the charging voltage of the capacitor 56 increases with the time constant of the resistor 55 and the capacitor 56. . During the period when this capacitor voltage is below the inversion voltage which is the sum of the base-emitter voltage of the transistor 52 and the Zener voltage Vz of the Zener diode 57, the transistor 52 is
It is in the OFF state, the transistor 51 is in the ON state, and the output voltage V ₇ of the loop filter 7 is set to a value equal to the reference voltage of the positive phase input terminal of the operational amplifier 13. The value of this voltage is the minimum deviation angle θmin found from the curve of the phase deviation angle of the voltage controlled phase deviation circuit 8 versus the control voltage V ₇ shown in FIG.
The control voltage is set to approximately correspond to the center angle of the maximum deviation angle θmax. At this time the signal V ₄ and
When the phase difference with V ₅ is at point a shown in Figure 6, the capacitor voltage mentioned above rises and exceeds the inversion voltage, transistor 52 is turned on and transistor 51 is turned off, forming a phase-locked loop. starts operating normally and is phase-synchronized to synchronization point 1 shown in FIG. In this case, the control voltage _V7 becomes an output voltage corresponding to synchronization point 1 shown in FIG. In this case, it is theoretically impossible for the loop to converge from point a to synchronization point 2, and the reset circuit added to this loop filter 7 sets the initial synchronization point to the phase shift angle of voltage controlled phase shift circuit 8. This becomes the nearest and shortest angle synchronization point from the approximately central angle point, and phase synchronization is quickly achieved. If the phase difference between the signals V ₄ and V ₅ at the time of power-on is point b, the phase synchronization is performed toward the synchronization point 2 because the angular difference is smaller and closer to the synchronization point 2. According to the current velocity measuring device that is phase-synchronized in this way, there is no situation where phase synchronization cannot be synchronized when the power is turned on, and the phase shift angle that can be followed for the modulation signal V ₅ after the power is turned on is both leading and lagging. A relatively uniform angular phase shift in both directions is possible. This effect becomes more effective as the number of stages of the phase shift circuit increases. Next, consider the operation of the reset circuit when the power supply voltage rises very slowly. In this case, the time constant circuit determined by the resistor 55 and capacitor 56 cannot be expected to operate, but the reset circuit is operating because the transistor 52 is not turned on during the period when the power supply voltage Vcc is below the above-mentioned inversion voltage.
When Vcc rises and exceeds the inversion voltage, the reset is released and the phase locked loop immediately operates. Now, if the phase-locked loop is operating normally and within the operable range of the voltage-controlled phase shift circuit 8, it would be fine if only the initial phase synchronization was performed reliably, but multi-stage phase shift Transfer circuit 8
Compared to the number of stages of 1.82, the phase change range of the modulation signal V ₅ becomes too large and the phase deviation angle is less than θmin or more than θmax, that is, the control voltage V ₇ of the output of the loop filter 7 is less than Vmin or more than Vmax. If the phase synchronization of the phase-locked loop cannot be established unless the loop is operated properly, a state called phase synchronization may occur, and a state may occur in which normal operation cannot be restored unless a reset signal is applied from the outside. be. In such a case, resynchronization can be achieved by turning off the power and then turning it on again, but there is a method in which the circuit itself generates a reset signal to enable resynchronization. Another embodiment of the invention shown in FIG. 8 will be described below. An integrating circuit consisting of a resistor 101 and a capacitor 102 is the output of the voltage controlled phase shift circuit 8.
The output frequency of the inverted signal ₄ of V ₄ is converted into a DC detection voltage V _DET , which is input to the inverted input terminal of the voltage comparator 108 . Resistors 103 and 104 determine the inversion level of the voltage comparator input to the positive phase input terminal of voltage comparator 108. The resistor 105 provides hysteresis to the inversion level. resistance 10
6 is an output resistance of the voltage comparator 108, and a resistor 107 is a base resistance of the transistor 109. When the phase-locked loop circuit is operating normally in the flow rate measuring device configured as described above, the frequency of the output ₄ of the voltage controlled phase shift circuit 8 is equal to the frequency of the oscillator 3, and the pulse width of the output is equal to the duty ratio. The value is close to about 50%. The DC voltage obtained by integrating this voltage is equal to approximately 1/2. Voltage comparator 108
When the inversion level of is set to about 3/8, the output of voltage comparator 108 becomes "L" level and transistor 109 is turned "OFF", so that it does not affect the operation of transistors 51 and 52 of the reset circuit.
Next, when the phase-locked loop loses synchronization, the operation of the trigger signal and reset signal of the flip-flops 815 and 825 in each stage of the phase shift circuits 81 and 82 is in a state where the output frequency of the oscillator 3 can no longer be maintained, and the voltage The output frequency of the control phase shift circuit 8 necessarily decreases, and the integrated voltage V _DE of the output signal ₄ decreases.
_T also decreases to 3/8 or less of the voltage value. Then, the output of the voltage comparator 108 is inverted to "H", and the transistor 10
9 turns on, the transistor 51 turns on, the reset circuit operates, and the output of the voltage controlled phase shift circuit 8 returns to normal. When the output ₄ returns to normal, its integrated voltage V _DET returns to 1/2, the output of the voltage comparator 108 is inverted to "L", and the reset operation is canceled. When the reset is released, the phase-locked loop is resynchronized and returns to normal operation. In this way, the out-of-synchronization state of the phase-locked loop circuit is detected by an abnormality in the output voltage of the voltage-controlled phase shift circuit 8, and by operating the reset circuit, even in the unlikely event that out-of-synchronization occurs, the circuit can be restored to normal. It can be restored to operation. In the above embodiment, the out-of-synchronization of the phase-locked loop is detected by the output of the direct voltage control phase shift circuit 8 and the reset circuit is operated. A similar effect can be expected by detecting that the synchronization point is approaching and operating the reset circuit to resynchronize to a stable synchronization point. Another embodiment shown in FIG. 9 will be described below. 201 is a window comparator circuit for monitoring the value of the output voltage of the loop filter 7 and operating the reset circuit. Assume that the settings of the window comparator 201 are as shown in the table below.

[Table] If the output voltage V7 of the loop filter ₇ is within the controllable (operable) voltage range of the voltage controlled phase shift circuit 8, the output of the window comparator 201 is "L" and the reset circuit does not operate. Conversely, when the voltage falls outside the controllable voltage range or approaches a value outside the controllable voltage range, the output of the window comparator 201 becomes "H" and the reset circuit operates. When the reset circuit operates, _V7 is reset to a predetermined value, the voltage controlled phase shift circuit 8 returns to its normal operating range, the reset circuit ceases operation, and the phase locked loop is resynchronized. In order to actually perform the operation of this embodiment, a delay circuit and hysteresis of the comparator voltage are required in order to secure the time necessary for the reset circuit to complete its operation, but for the sake of simplicity, Omitted. As explained above, according to the present invention, there is provided a flow velocity measuring device which uses a phase locked loop circuit using a voltage controlled phase shift circuit to demodulate the phase modulation signal received by an ultrasonic wave due to a Karman vortex. The disadvantage of not knowing at which point of the multiple phase synchronization angles (points) the initial synchronization will be performed due to the fact that it is a periodic function of This can be solved with a simple configuration of initially setting the value to the optimum value. Furthermore, by synchronizing the operation of the reset circuit with the rise of the power supply voltage and performing it for a certain period of time, there is an effect that the operation of the circuit can be performed stably and quickly after the power is turned on. Furthermore, even when the power supply voltage rises at a very slow rate, by detecting the voltage level and turning the reset ON or OFF, a stable system that does not depend on how the power supply voltage rises can be maintained. Initial reset is possible. Even if the initial synchronization angle of the phase-locked loop is ensured in this way, the amount of phase deviation of the phase modulation signal will change significantly due to sudden temperature changes in the fluid being measured, and the voltage-controlled phase-shift circuit will not operate normally. Even if the phase-locked loop goes out of the possible phase shift angle range and the phase-locked loop goes out of synchronization, or even if it is about to go out of synchronization, according to the present invention, the output abnormality of the voltage-controlled phase-shift circuit or the loop filter can be corrected. This has the effect of detecting an output voltage value or an abnormality in the output voltage and operating the reset circuit to quickly restore normal operation. Furthermore, it goes without saying that the reset circuit can be operated by an arbitrary reset signal obtained from the outside to resynchronize the phase synchronization angle and stabilize the operation of the phase lock loop. As the arbitrary reset signal, various engine parameters such as a cranking signal, a key switch, a boost switch, an intake air temperature, etc. can be considered when this flow rate measuring device is used to measure the intake air amount of an automobile engine.

[Brief explanation of the drawing]

Figure 1 is a configuration diagram showing a conventional flow velocity measurement device using a phase demodulation circuit system, Figure 2 is an operating waveform diagram of each part in Figure 1, and Figure 3 is the input/output of the phase comparator in Figure 1. 4 is an input/output characteristic diagram of the voltage controlled phase shift circuit in FIG. 1, FIG. 5 is a configuration diagram showing an embodiment of the flow rate measuring device according to the present invention, and FIG.
7 are explanatory diagrams briefly explaining the operation of FIG. 5, and FIGS. 8 and 9 are configuration diagrams showing different embodiments of the present invention. In the figure, 1 is a vortex generating column, 2 is an ultrasonic transmitter,
3 is an oscillator, 4 is an ultrasonic receiver, 6 is a phase comparator, 7 is a loop filter, 8 is a voltage controlled phase shift circuit, and 51 is a transistor constituting a reset circuit. Note that the same reference numerals in each figure indicate the same or equivalent parts.

Claims (1)

[Scope of Claims] 1. A vortex generating column arranged substantially perpendicular to the flow of fluid, and arranged so as to propagate ultrasonic waves across the flow of the Karman vortex street generated downstream of the vortex generating column. an ultrasonic transmitter, an oscillator that excites the ultrasonic transmitter, an ultrasonic receiver that receives the ultrasonic wave phase-modulated by the Karman vortex, and a phase comparison that uses the received phase-modulated signal as one input. a loop filter for removing unnecessary frequency components from the output of the phase comparator, and generating an output signal whose phase deviation angle from the output signal of the oscillator is controlled in accordance with the output voltage of the loop filter; A voltage controlled phase shift circuit which serves as the other input of the phase comparator and constitutes a phase locked loop together with the phase comparator and the loop filter, and the output of the loop filter is separated from the operation of the phase locked loop and set to a predetermined voltage value. A flow velocity measuring device characterized by being equipped with a reset circuit for giving 2. The flow rate measuring device according to claim 1, characterized in that the reset circuit operates for a certain period of time from the power up time in synchronization with the power up of the flow rate measuring device. 3. The flow rate measuring device according to claim 1, wherein the reset circuit operates when the power supply voltage of the flow rate measuring device is below a predetermined voltage value, and is deactivated when the voltage exceeds the predetermined voltage value. . 4. It is characterized by being set to the output voltage value of the loop filter when the reset circuit is operating, or the voltage value that is approximately the center angle between the maximum angle and the minimum angle of the operable phase shift angle range of the voltage controlled phase shift circuit. A flow rate measuring device according to any one of claims 1, 2, and 3. 5. Claim 1, characterized in that the reset circuit is operated by detecting, based on the output signal of the voltage-controlled phase-shift circuit, that the voltage-controlled phase-shift circuit is out of an operable phase-shift angle range. The flow rate measuring device described. 6. The flow rate according to claim 1, wherein the voltage controlled phase shift circuit detects, based on the output voltage value of the loop filter, that the voltage control phase shift circuit is out of an operable phase shift angle range, and operates the reset circuit. measuring device.