JPS6126159B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor integrated circuit having an electrically writable memory element.

BACKGROUND OF THE INVENTION Electrically programmable memory devices (programmable devices) are used in integrated circuits such as programmable read-only memories (PROMs) and field programmable logic arrays (FPLAs). In this case, the programmable element is paired with a decoupled element to form one cell so that reading and writing can be performed selectively, that is, so that they can be electrically isolated from each other,
These cells are arranged at the intersections of the X-ray group and the Y-ray group to form an array.

When increasing the integration and speed of programmable integrated circuits such as PROM and FPLA, the requirements for the cell are (a) a small cell area; (b) The parasitic capacitance of the cell is small.

Typical examples of conventionally used cells are shown below.
As shown in the figure. In the figure a, the programmable element is a fuse 11, and the decoupled element is a transistor 12 which also serves as an amplification element. The fuse 11 is ohmic in an unwritten state, and opens when a certain amount of power is applied. In Figure b, the programmable element is a fuse 13, and the decoupled element is a shot barrier diode (SBD) 14. Although C in the same figure shows only one transistor 15 with an open base, this is equivalent to two transistors connected in anti-series.
It can be represented by a PN junction diode. Here the base
The emitter junction is a programmable element, and the base-collector junction is a decoupled element. In this method, a current above a certain level is passed through the base-emitter diode in the opposite direction (from the emitter to the collector in the case of a transistor) to create a short circuit.

Looking at these three conventional examples in light of the requirements for higher density and higher speed mentioned above, in Figure 1a, one cell contains the emitter, base contact, and fuse of a transistor, and they are designed using the same design rules. It will be the largest. Figure 1b can be made relatively small with just a fuse and a hole for the SBD. Figure 1 C can be made the smallest since only one emitter hole is required.
However, the cathode of the SBD in FIG. 1b and the collector in FIG. 1C (both on the X-ray side) have a junction capacitance with the substrate, which slows down the speed.

An object of the present invention is to provide a highly integrated, high-speed programmable integrated circuit such as a PROM or FPLA using small cells with small parasitic capacitance, which does not have the drawbacks of the above-mentioned conventional examples.

In the present invention, it is important to note that if a diode array is made of diodes that become open when a certain level of current flows through them, this diode will function as both a programmable element and a decoupled element, so a cell can be constructed with one element. . This diode functions as a decoupled element if it is not written, and functions as a programmable element if it is written and left open. After writing, the decoupled element also disappears, but it is not a short circuit but an open circuit, so it is not necessary.

In addition, the present invention focuses on the experimental fact that a polycrystalline silicon PN junction diode becomes open when a current or voltage above a certain level is applied.

Furthermore, in the present invention, it is noted that since this diode is formed on an insulating film, the parasitic capacitance with the substrate can be made much smaller than that of the conventional one.

In the present invention, a diode array is constructed using diodes that become open when a current or voltage above a certain level is applied, and a circuit that selectively flows current to the target diode is arranged to connect PROM or FPLA.
Construct programmable integrated circuits such as The above diode characteristics can be achieved by using a polycrystalline silicon PN junction. The above objects are thus achieved by the present invention.

Next, the present invention will be explained using the drawings.

FIG. 2 shows a cross-sectional view of a polysilicon diode used in the present invention. The planar width is 3μ. This diode is made as follows. Polycrystalline silicon is grown on the oxide film 22 covering the upper surface of the semiconductor substrate 21, and then covered with a silicon nitride film, and using photoetching technology, only the silicon nitride film is left in the portion where the element is to be formed using polycrystalline silicon, and other regions are covered with the silicon nitride film. is selectively oxidized 23 until it reaches the underlying oxide film 22. Next, the right half of the nitride film is removed, boron is diffused, and the surface is oxidized. Furthermore, after removing the remaining nitride film and diffusing phosphorus, the surface is oxidized. 24 is a P-type region into which boron is diffused, 25 is an N-type region into which phosphorus is diffused, and 26 is an oxide film covering both of them. Next, contact openings 27 are made on both the P side and N side, and wiring is performed.
8,29.

The area of this diode itself is approximately ^40μ2 , but even when configured as an array, each cell has an area of 200μ2.
When μ is less than ² , it is about 1/4 of a of the conventional example in FIG. 1, and about half of the minimum value of C.

Also, the parasitic capacitance on the cathode side of this diode is
When 256 pieces are lined up, it is less than 1 eF including wiring. In the case of the conventional example shown in FIG. 1 b and c, it is around 10 pF, so it can be reduced to one-tenth.

The electrical characteristics of this diode are shown in FIG.
When writing, it can be opened by passing a current of 30 to 50 mA or more in the reverse direction. Writing can be done in the same way in the forward direction. Writing time can be shortened by increasing the current. The diode can be opened even if a constant voltage is applied across it. When applying voltage in the opposite direction
6v or more is sufficient, and in the forward direction, approximately 4.5v is sufficient. These currents and voltages vary depending on the conditions during polycrystalline silicon formation and how heat is applied after formation.

Next, Fig. 4 shows a 64K
The configuration of the write system of a PROM with 4 bits and 4 outputs is shown. Diodes 41 that are opened by writing constitute a diode array 42 . The X-side address inputs _A0 to _A7 enter the X decoder 43, and the 256 outputs thereof each enter the X driver 44 and are connected to the X-rays of the diode array. Y side address input A ₈
~A ₁₃ enters 4 Y decoders 45 in parallel,
Output lines from each Y decoder 45 are connected to a Y driver 46. Each Y driver 46 is provided with a write voltage supply terminal 47, respectively.

Examples of the circuits of the X and Y drivers are shown in FIGS. 5a and 5b. The numbers in the figure correspond to those in FIG.

In this circuit, a voltage is applied in the forward direction to the diode for writing. In this case, diodes other than the target diode are connected in parallel to both ends of the target diode in a forward-reverse-forward manner, so the write power to other cells is In order to prevent much leakage, it is necessary to write at a voltage lower than the sum of twice the forward voltage and the reverse breakdown voltage. In the diode mentioned above, twice the forward voltage (current 0.1μA) is 1v, and the reverse voltage (0.1μA) is
If is 4.5v, then the voltage should be lower than the sum of 5.5v. Also, since the write voltage only needs to be 4.5V or more, when writing with this circuit configuration, after determining an appropriate address, connect the write terminal (Fig. 4, Fig. 5 47)
Just apply 7.5v to 8.5V to. (The diode has approx.
(takes 4.5v to 5.5v).

In the above embodiment, writing was performed using a forward bias, but it can also be performed using a reverse bias.
For example, in FIG. 4, the directions of all the diodes may be reversed. In this case, leakage of write current to other diodes occurs at a voltage higher than the sum of twice the reverse breakdown voltage and one forward voltage. For the diode, this becomes 9.5v. Writing by applying a voltage in the reverse direction requires 6.0V, so in this example, writing can be done by applying 6.0 to 9.5V to the diode. As mentioned above, the write voltage and current vary depending on the conditions for producing polycrystalline silicon, and therefore need to be varied accordingly.

As described above, according to the present invention, the area occupied by one cell can be reduced, so the degree of integration can be increased, and the parasitic capacitance attached to one cell can be drastically reduced compared to the conventional example, so that the speed can be greatly improved.

[Brief explanation of the drawing]

Figure 1 shows a conventional example of a programmable element, and Figure 2 shows a polycrystalline silicon PN used in the present invention.
A diagram showing an example of a junction diode, FIG. 3 is a diagram showing the electrical characteristics of the diode, FIG. 4 is a diagram showing a write system of a 64K-bit PROM which is an embodiment of the present invention, and FIG. 5 is an embodiment. 2 is a diagram showing an X driver and a Y driver used for 21... Semiconductor substrate, 22... Oxide film, 23...
...Oxide film, 24...Polycrystalline silicon P-type region, 25...
...N-type region, 28... Wiring, 41... Polycrystalline silicon
PN diode, 42...Diode array, 4
4...X driver, 46...Y driver.

Claims (1)

[Claims] 1. A diode array configured using diodes that open when a certain level of current or voltage is applied in the forward or reverse direction, select a target diode, and open that diode. A semiconductor integrated circuit that has a means for passing current. 2. Claim 1, wherein the diode is made of a P-N junction of polycrystalline silicon.
Semiconductor integrated circuit described in Section 1.