JPS6130738B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor chip storage device for temporarily storing semiconductor chips for testing and transportation.

Up until now, as storage devices for transporting semiconductors, there has been a device (wafer tray) 2 with a recess for storing a disk-shaped semiconductor wafer 1 as shown in FIG. 1a, and a device (wafer tray) 2 as shown in FIG. 1b. As shown in the figure, a device (chip tray) 4 for storing and transporting good chips 3 selected from wafers has been used, but as the assembly process of semiconductor devices has progressed,
Such conventional storage devices have become inadequate.

FIG. 2 is a flow chart of an example of a conventional semiconductor device assembly process. As shown in the figure, semiconductor wafers are inspected and then scribed to create chips. One chip is then glued to the package, and then conductors are bonded to allow signals to be extracted from the chip to the outside. The package is then sealed, inspected, aged, and further inspected. When such an assembly process was used, if a defective product was produced in each process, it was sufficient to simply remove it and discard it, so a storage device as shown in Figure 1 was used as a storage device for transportation. However, there were no problems.

FIG. 3 is a flowchart showing another example of the semiconductor device assembly process. What is shown in the figure is a flowchart of the assembly process of a multi-chip semiconductor device using so-called flip-chip technology. First, the wafer is inspected and scribed to create chips. Next, a number of chips are bonded (also used as adhesives) on a large board, and the next step is inspection. If a defective chip is found as a result of the inspection, the defective chip is replaced. Next, the entire assembly is sealed and inspected to complete the assembly process. The problem here is replacing the defective chip. If the process was as shown in Figure 2, even if a defective product was produced, it would be just one chip and could be discarded. However, in the case of FIG. 3, even if one chip is defective, it is not possible to discard the entire board including other normal chips, so the defective chip is replaced according to the process. However, it is better to discover a defective chip before bonding than to find out that it is defective after bonding and have to replace it. For this reason, process A has been introduced between scribing and bonding.

Process A consists of a process in which the scribed chips are temporarily glued and stored one by one in a storage device, and a testing process in which defective products are discovered through inspection and aging. Next, the process consists of steps (○) and (c) for removing it from the storage device. If defective chips are removed in advance before bonding in this manner, it is advantageous to reduce the number of defective chips that need to be replaced in subsequent steps.

The present invention relates to a chip storage device used for testing and transporting chips in the process A.

Now, when attaching and connecting chips using the flip-chip method, the height of the solder part that forms the connection part has a great influence on the reliability of the connection part. It is necessary to be able to retain the amount of solder on the connection terminal on the chip side without reducing the amount of solder in the connection terminal on the chip side when it is attached and detached multiple times. However, solder remains and the amount of solder on the connection terminals on the chip side decreases.

The present invention has been made to solve the above-mentioned problems, and therefore, an object of the present invention is to provide a storage device to which chips are temporarily connected for testing and transportation. It is an object of the present invention to provide a storage device in which solder of a chip-side connection terminal does not remain on the connection terminal of the storage device when removed.

The key point of the configuration of the present invention is that the connection terminal on the storage device side is formed into a filament shape with a small contact area with the solder.

Next, an embodiment of the present invention will be described in detail with reference to the drawings.

FIG. 4 shows a perspective view of a semiconductor storage device which is an embodiment of the present invention. A is a perspective view of the front surface, and b is a perspective view of the back surface. In the figure, the printed board 11 may be made of commonly used materials such as epoxy resin or ceramic board, and the connecting terminals 13 on the board side are connected to the connecting terminals 18 on the back side of the board via the through holes 14 by the conductor pattern 12. It's on. Further, among the chip-side connection terminals (or connection solder) 16 of the chip 17, the board-side connection terminals that are connected to the terminals corresponding to the power supply terminals are also connected to the connector connection terminals 15 through the conductor pattern 12. . Therefore, the state in which the chip 17 is housed in the board 11, that is, the chip side connection terminal 1
When the power supply is connected to the connector connecting terminal 15 while the chip 6 is connected to the board side connecting terminal 13, the chip 17 can be aged.

Figures 5 and 6 show the board side connection terminal 1 in Figure 4.
3 is an enlarged view of part 3. Figure 5 a and b
is a perspective view showing the shape of a conventional connection terminal 13, in which the conductor pattern 12 is connected to the connection terminal 13 and the insulating layer 1.
Connected under 9. The conventional connection terminal 13 has a planar shape as shown in the figure, since it is less susceptible to distortion in terms of connection life and also ensures connection reliability. FIGS. 5c and 5d are enlarged side views of the board side connection terminal 13, where c shows the state before connection with the chip side connection terminal (solder) 16, and d shows the state after connection. The insulating layer 19 is for preventing the solder 16 from flowing out when the chip 17 is bonded to the substrate 11.

Now, as mentioned above, the purpose of this invention is to prevent the decrease in the solder amount 16 of the chip side connection terminal when the chip is connected but removed. Solder remains on the terminals 13, and the amount of solder 16 at the chip side connection terminal portion decreases, making it impossible to achieve this purpose.

FIGS. 6a to 6c are perspective views showing examples of the shape of the board-side connecting terminal 13 according to the present invention. This shape is formed of wires with a small contact area, and in terms of connection life, the area wetted by solder is small, so it has a short life in terms of reliability. When the terminal 16 is removed from the board-side connection terminal 13, less solder remains on the terminal 13 side.

As explained above, according to the present invention, when a chip is removed in a temporary chip storage device for testing and transportation, the solder of the chip side connection terminal does not remain on the connection terminal on the storage device side. The advantage is that it can be avoided.

[Brief explanation of the drawing]

FIG. 1 is a perspective view of a conventional transport and storage device, in which a indicates a device for transporting wafers, and b indicates a device for transporting chips. FIG. 2 is a flowchart showing an example of a conventional semiconductor device assembly process, FIG. 3 is a flowchart showing another example, and FIG. 4 is a perspective view of an embodiment of the present invention. b is a perspective view of the back side, FIG. 5 is an enlarged view of the board side connection terminal 13, a and b are perspective views of the conventional one, c and d are side views, and FIGS. FIG. 3 is a perspective view showing an example of the shape of the board-side connection terminal 13. FIG. In the figure, 1 is a wafer, 2 is a transportation storage device (wafer tray), 3 is a chip, 4 is a transportation storage device (chip tray), 11 is a substrate, 12 is a conductor pattern, 13 is a substrate side connection terminal, and 14 is a through hole. 15 is a connection terminal for a connector, 16 is a chip side connection terminal or solder on the terminal, 17 is a chip, and 18 is a connection terminal on the back side of the board.

Claims (1)

[Claims] 1 A storage device for semiconductor chips that temporarily stores semiconductor chips having substantially hemispherical metal connections such as solder bumps on the connection terminals for testing and transportation, and corresponds to the terminals on the chip side. A connecting terminal and a conductor pattern for applying a test signal to the terminal are formed on the substrate, and the terminal on the substrate side is connected to the terminal on the chip side by the hemispherical connecting metal, thereby The chip is housed on the board and the connection is separated so that the chip is not housed, and when the board side terminal is separated from the chip side terminal, the connecting metal is connected to the board side terminal. A storage device for semiconductor chips, characterized in that the semiconductor chip storage device is characterized by having a shape made of wires with a small contact area with metal so that a large amount of semiconductor chips does not remain attached to the semiconductor chip.