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JPS6132901B2 - - Google Patents
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JPS6132901B2 - - Google Patents

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Publication number
JPS6132901B2
JPS6132901B2 JP5226279A JP5226279A JPS6132901B2 JP S6132901 B2 JPS6132901 B2 JP S6132901B2 JP 5226279 A JP5226279 A JP 5226279A JP 5226279 A JP5226279 A JP 5226279A JP S6132901 B2 JPS6132901 B2 JP S6132901B2
Authority
JP
Japan
Prior art keywords
current
value
phase
average value
transformer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP5226279A
Other languages
Japanese (ja)
Other versions
JPS55144728A (en
Inventor
Mitsuyasu Furuse
Norio Suda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Meidensha Electric Manufacturing Co Ltd
Original Assignee
Meidensha Electric Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Meidensha Electric Manufacturing Co Ltd filed Critical Meidensha Electric Manufacturing Co Ltd
Priority to JP5226279A priority Critical patent/JPS55144728A/en
Publication of JPS55144728A publication Critical patent/JPS55144728A/en
Publication of JPS6132901B2 publication Critical patent/JPS6132901B2/ja
Granted legal-status Critical Current

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  • Protection Of Static Devices (AREA)
  • Rectifiers (AREA)

Description

【発明の詳細な説明】 本発明は直流式電気鉄道の給電系或は直流の送
電系統に適用される交―直変換装置としての順電
力変換装置の保護装置に係り、特に交―直変換装
置の交流入力側に変圧器が挿入される一般の系の
場合、変圧器を含めた交―直変換装置の想定され
る汎ゆる故障に対して、故障検出と同時に確実に
しかも高精度で所定の保護を行なう事ができる新
規な保護装置を提供しようとするものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a protection device for a forward power converter as an AC-DC converter applied to a DC electric railway power supply system or a DC power transmission system, and more particularly to In the case of a general system in which a transformer is inserted on the AC input side of The purpose is to provide a new protection device that can provide protection.

直流式電気鉄道の給電系或は直流送電の系で
は、周知の様に商用周波電源母線より入力される
交流電力を直流電力に変換するものとして順電力
変換装置が適用されており、この種順電力変換装
置を含めた系の代表的な保護方法を第1図に示
す。同図で1は三相の商用周波電源母線で、2は
交流遮断器で、3は各相の相電流ia及びib,icを
取出す変流器で、4はサイリスタを順ブリツジ接
続した順電力変換装置で、5は直流電流idcを取
出す直流変流器で、6は所望の直流電力が供給さ
れる負荷で、7は各変流器3,5より取出された
検出量の大小を比較して順電力変換装置の内部故
障を検出し所定の保護を行なう電流差動リレーで
ある。以上の様な構成の保護方法を述べると、各
変流器3,5より取出した相電流に関連した信号
と、直流電流に関連した信号とを電流差動リレー
7で比較―判定する事によつて順電力変換装置4
の異常の有無を検出し所定の保護を行なうもので
あるが、この保護方法の技術思想は、例えばサイ
リスタ素子が順方向の阻止能力を失つたり、さら
には外部より侵入するノイズにより誤点弧して転
流失敗した場合の事故と、サイリスタ素子が逆方
向の阻止能力を失つて当該素子が挿入されるアー
ムが短絡した場合の事故との区別を行なう場合、
転流失敗時には直流電流が定常電流値の1.5倍〜
2倍ほど上昇するのに対して、アーム短絡時には
直流電流が略零となる現象に基づき判定するもの
であるからして、この様に直流電流が増大する転
流失敗時の事故と、直流電流が略零となるアーム
短絡時の事故とは確実に検出できるものである
が、例えばゲート信号を供給するゲート回路の故
障、或は信号線が断線した場合のゲート欠相、さ
らにはよく見られる現象であるが遮断器2側の故
障で、電源の一相が欠相した場合の電源欠相の事
故時に際して、電流差動リレーの判定要素として
取出される相電流と直流電流とに、共に電流があ
る期間と、共に電流がない期間とが存在するので
両電流の信号レベルを比較した所でほとんど同レ
ベルとなり、欠相時の事故は検出できない事とな
る。
As is well known, in the power supply system or DC power transmission system of a DC electric railway, a forward power converter is used to convert the AC power input from the commercial frequency power supply bus into DC power. FIG. 1 shows a typical protection method for a system including a power conversion device. In the figure, 1 is a three-phase commercial frequency power supply bus, 2 is an AC breaker, 3 is a current transformer that takes out the phase currents ia, ib, and ic of each phase, and 4 is a forward power supply with thyristors connected in a forward bridge. In the converter, 5 is a DC transformer that takes out the DC current IDC, 6 is the load to which the desired DC power is supplied, and 7 is the one that compares the magnitude of the detected amount taken out from each current transformer 3 and 5. This is a current differential relay that detects internal failures in the forward power converter and provides specified protection. To describe the protection method for the above configuration, the signal related to the phase current extracted from each current transformer 3 and 5 and the signal related to DC current are compared and judged by the current differential relay 7. Forward power conversion device 4
The technical concept of this protection method is to detect the presence or absence of an abnormality in the thyristor element and perform the specified protection. When distinguishing between an accident when the thyristor element loses its blocking ability in the reverse direction and the arm into which the element is inserted short-circuits, an accident occurs when commutation fails.
When commutation fails, the DC current is 1.5 times the steady current value
The judgment is based on the phenomenon that the DC current increases by about twice as much, but when the arm is short-circuited, the DC current becomes almost zero. Therefore, the DC current increases due to an accident caused by a commutation failure in which the DC current increases in this way, and the DC current Accidents caused by arm short circuits, where As a phenomenon, when one phase of the power supply is open due to a failure on the circuit breaker 2 side, both the phase current and the DC current, which are taken out as a judgment element of the current differential relay, are Since there is a period in which there is current and a period in which there is no current, when the signal levels of both currents are compared, they are almost the same level, and an accident at the time of phase loss cannot be detected.

本発明はこの点に鑑みて発明されたものであつ
て、特に本願は従来と同様な電流差動保護法を適
用したとしても想定される汎ゆる故障を検出し、
且つ所定の保護が行なえる保護方法を実現した所
に特徴を有し以下第2図及び第3図の具体例に基
づき詳述するものとする。
The present invention was invented in view of this point, and in particular, the present invention detects all possible failures even if the conventional current differential protection method is applied,
The present invention is characterized in that it realizes a protection method that can perform predetermined protection, and will be described in detail below based on the specific examples shown in FIGS. 2 and 3.

第2図は本発明の基本的な保護方法の具体的な
構成例を示し同図で第1図と同一のものは同一符
号を附しており、8は本保護法による一方の保護
対象となる変圧器で、この変圧器は通常の系では
よくみられるものであつて例えば入力電源電圧を
所定値に降圧する為のもので、図では一次側と二
次側とを共に△結線した場合を示したが、例えば
Y―△或は△―Y結線した変圧器が一般には適用
されている。さて本発明の要部たる電流差動リレ
ー7の具体的な構成図を示したのが第3図であつ
て、ia及びib,icは夫々変流器3の二次側より取
出された各相の相電流で、idcは直流変流器5の
二次側より取出された直流電流で、Aは第1図に
示す従来の差動リレーと略々同機能を有する電流
差動リレーで、Bは本発明の要部たる相平衡を監
視するリレーである。さて前者の差動リレーAは
図示する様に、各相電流の瞬時値ia,ib,icより
絶対値|ia|,|ib|,|ic|を取り出してこれ
ら各絶対値を夫々加算して瞬時、瞬時の交流入力
電流Σ|i|を求める加算回路9と、この回路9
で求めた瞬時、瞬時の交流入力電流の総和Σ|i
|を入力電源電圧波形の各半波期間に渡つて累積
するか、或は入力電源電圧波形の1サイクルに渡
つて累積して、この累積した結果より交流入力電
流の平均値を求める第1の平均値算出回路10
と、相電流の瞬時値を取出す為にサンプリングす
る信号と同期して直流電流idcを順次サンプリン
グして、これらサンプルした直流電流の各瞬時値
より絶対値|idc|を取出す絶対値回路11と、
この絶対値回路より出力される信号を上記した方
法と同様に、例えば入力電源電圧波形の各半波期
間に相応した期間に渡つて順次累積して、この累
積した結果より直流電流の平均値を求める第2の
平均値算出回路12と、交流入力電流の平均値Σ
|i|と直流電流の平均値kidcとを減算してΣ|
i|―kidcなる動作量を得、この動作量と不感帯
の量Koを表わす抑制量とを比較―判定する第1
の判定回路13と、同様に上記動差量Σ|i|―
kidcと、抑制量としての交流入力電流の平均値K
Σ|i|とを比較―判定する第2の判定回路1
4、なおこの第2の判定回路14はΣ|i|―
kidcなる動作量と、直流電流の平均値を示すkidc
なる抑制量とを比較―判定してもよい。但し上記
したk及びKは夫々定数で、例えば前者の定数k
は変流器3の変流比をαとすると、k=2αとな
る式で示される。15は第1及び第2の判定回路
13,14より出力される信号のAND条件を取
るANDゲートで、16はANDゲートより出力さ
れる信号を所定期間に渡つて遅延する第1のタイ
マで、このタイマより出力される信号を以つて変
圧器8の内部事故或は順電力変換装置4の内部事
故が検出されるものである。さて相平衡を監視す
るリレーBは、図示する様に順次サンプリングし
て取出された各相の瞬時値より絶対値を取出した
信号|ia(t)|,|ib(t)|,|ic(t)|と、これら信
号より60゜前にサンプリングした信号|ia(t−
60゜)|,|ib(t−60゜)|,|ic(t−60
゜)|とで|ia(t)|−|ib(t−60゜)|+|ib
(t)|−|ic(t−60゜)|+|ic(t)|−|ia(t
−60゜)| ― 式の演算を行なう演算回路18と、なお式
で60゜は順電力変換装置4の6個の素子群が60゜
毎に順次転流するのを条件として導びき出された
値であつて、何もこの様に60゜前にサンプリング
した相電流の瞬時値を利用するのではなく、例え
ば120゜前にサンプリングした相電流の瞬時値を
利用しても相平衡を監視する諸量としては何ら支
障ない。さて再び第3図に戻つて、19は上記
式で導びき出された交流入力電流の瞬時値を電源
電圧波形の半波期間に渡つて順次累積するか、或
は電源電圧波形の1サイクルに渡つて順次累積し
た結果よりその平均値を求める第3の平均値算出
回路で、20は第3の平均値算出回路19より出
力された信号が零かもしくは“信号あり”かで事
故の有無の判定を行なう第3の判定回路で、21
は相電流の瞬時値を取出す為にサンプリングした
信号と同期して直流電流を順次サンプリングして
得られる瞬時値を、電流電圧波形の1サイクルに
渡つて順次累積した結果よりその平均値を求めた
信号量Σidc(t)と、この信号量の1サイクル前の
平均値化した信号量Σとを減算する減算回路
で、22は第4の平均値算出回路で前記減算回路
21より出力される信号の平均値を求める回路
で、23は第4の平均値算出回路22より出力さ
れる信号が零かもしくは“信号あり”かで事故の
有無の判定を行なう為のものである。24は第3
及び第4の判定回路20,23より出力される信
号のAND条件を取るANDゲートで、25はこの
ANDゲート24より出力される信号を所定期間
に渡つて遅延する第2のタイマである。以上の様
に相平衡を監視するリレーBは演算回路18―第
3及び第4の平均値算出回路19,22−減算回
路21―第3及び第4の判定回路20,23―
ANDゲート24―タイマ25とで構成され、同
様に電流差動リレーAは加算回路9―第1及び第
2の平均値算出回路10,12―直流電流瞬時値
回路11―第1及び第2の判定回路13,14―
ANDゲート15―タイマ16とで構成され、こ
れら両リレーA,Bの各出力信号P1,P2をORゲ
ート17に入力して、さらにORゲートの出力側
に挿入されるインヒビツト回路28の出力信号を
以つて変圧器と順電力変換装置との内部事故を最
終的に検出して、この検出出力で警報を発生して
所定の保護を行なうものである。なお26は順電
力変換装置の始動時に変圧器に流れる励磁突入電
流によりA,Bのリレーが誤動作するのを防止す
る図示しない誤動作防止用リレーのa接点で、2
7はこのリレーの接点出力信号を所定期間に渡つ
て遅延する第3のタイマである。
Figure 2 shows a specific configuration example of the basic protection method of the present invention. In the same figure, the same parts as in Figure 1 are given the same reference numerals, and 8 is one of the objects of protection under this protection law. This transformer is often seen in normal systems, and is used, for example, to step down the input power supply voltage to a predetermined value. However, for example, a Y-△ or △-Y connected transformer is generally used. Now, FIG. 3 shows a specific configuration diagram of the current differential relay 7, which is the main part of the present invention. In the phase current of the phase, idc is the DC current taken out from the secondary side of the DC current transformer 5, and A is a current differential relay that has almost the same function as the conventional differential relay shown in FIG. B is a relay that monitors phase balance, which is the main part of the present invention. Now, the former differential relay A, as shown in the figure, extracts the absolute values |ia|, |ib|, |ic| from the instantaneous values ia, ib, and ic of each phase current and adds these absolute values, respectively. Addition circuit 9 for obtaining instantaneous, instantaneous AC input current Σ|i|, and this circuit 9
The sum of the instantaneous and instantaneous AC input currents Σ|i
| is accumulated over each half-wave period of the input power supply voltage waveform or over one cycle of the input power supply voltage waveform, and the average value of the AC input current is calculated from the accumulated result. Average value calculation circuit 10
and an absolute value circuit 11 that sequentially samples the DC current idc in synchronization with the sampling signal to extract the instantaneous value of the phase current, and extracts the absolute value |idc| from each instantaneous value of the sampled DC current,
Similar to the method described above, the signal output from this absolute value circuit is sequentially accumulated over a period corresponding to each half-wave period of the input power supply voltage waveform, and the average value of the DC current is calculated from the accumulated results. The second average value calculation circuit 12 to calculate the average value Σ of the AC input current
|i| and the average value of DC current kidc are subtracted to obtain Σ|
The first step is to obtain the motion amount i|-kidc and compare this motion amount with the suppression amount representing the dead zone amount Ko.
Similarly, the determination circuit 13 of
kidc and the average value K of AC input current as the suppression amount
Second judgment circuit 1 that compares and judges Σ|i|
4. Note that this second determination circuit 14 is Σ|i|−
kidc, which shows the operating amount and the average value of DC current.
The determination may be made by comparing the amount of suppression. However, the above k and K are each constants, for example, the former constant k
is expressed by the equation k=2α, where α is the current transformation ratio of the current transformer 3. 15 is an AND gate that takes the AND condition of the signals output from the first and second judgment circuits 13 and 14; 16 is a first timer that delays the signal output from the AND gate for a predetermined period; An internal fault in the transformer 8 or an internal fault in the forward power converter 4 is detected using the signal output from this timer. Now, as shown in the figure, relay B that monitors the phase balance outputs signals |ia(t)|, |ib(t)|, |ic( t) | and a signal sampled 60° before these signals | ia (t−
60゜)|,|ib(t-60゜)|,|ic(t-60
゜)|Tode|ia(t)|−|ib(t−60゜)|+|ib
(t)|−|ic(t−60゜)|+|ic(t)|−|ia(t
-60°) | - 60° in the equation is derived on the condition that the six element groups of the forward power converter 4 sequentially commutate every 60°. However, instead of using the instantaneous value of the phase current sampled 60 degrees ago, it is also possible to monitor phase balance by using the instantaneous value of the phase current sampled 120 degrees ago, for example. There is no problem with the various quantities involved. Now, returning to FIG. 3 again, 19 indicates whether the instantaneous value of the AC input current derived from the above formula is accumulated sequentially over a half-wave period of the power supply voltage waveform, or is accumulated in one cycle of the power supply voltage waveform. 20 is a third average value calculation circuit that calculates the average value from the results sequentially accumulated over the crossing, and 20 determines whether there is an accident or not depending on whether the signal output from the third average value calculation circuit 19 is zero or "signal present". A third judgment circuit that performs judgment, 21
In order to obtain the instantaneous value of the phase current, the DC current was sequentially sampled in synchronization with the sampled signal, and the instantaneous values obtained were sequentially accumulated over one cycle of the current and voltage waveforms, and the average value was calculated. A subtraction circuit that subtracts the signal amount Σidc(t) and the signal amount Σ which is the average value of this signal amount one cycle before. 22 is a fourth average value calculation circuit and the signal output from the subtraction circuit 21. 23 is a circuit for determining the presence or absence of an accident based on whether the signal output from the fourth average value calculation circuit 22 is zero or "signal present". 24 is the third
25 is an AND gate that takes the AND condition of the signals output from the and fourth judgment circuits 20 and 23.
This is a second timer that delays the signal output from the AND gate 24 for a predetermined period of time. As described above, the relay B that monitors the phase balance includes the arithmetic circuit 18 - the third and fourth average value calculation circuits 19, 22 - the subtraction circuit 21 - the third and fourth judgment circuits 20, 23 -
Similarly, the current differential relay A is composed of an AND gate 24 - a timer 25, and a current differential relay A is composed of an adder circuit 9 - first and second average value calculation circuits 10, 12 - DC current instantaneous value circuit 11 - first and second Judgment circuits 13, 14-
It is composed of an AND gate 15 and a timer 16, and the output signals P 1 and P 2 of both relays A and B are input to an OR gate 17, and the output of an inhibit circuit 28 is inserted into the output side of the OR gate. An internal fault between the transformer and the forward power converter is finally detected using the signal, and an alarm is generated using this detection output to provide a prescribed protection. Note that 26 is a contact a of a malfunction prevention relay (not shown) that prevents relays A and B from malfunctioning due to excitation inrush current flowing through the transformer when the forward power conversion device is started;
7 is a third timer that delays the contact output signal of this relay for a predetermined period of time.

さて、以上の様に構成される本願の動作を第4
図〜第6図に示すタイムチヤート図に基き詳述す
る。第4図は保護対象となる変圧器及び順電力変
換装置共に何ら異常のない定常動作時の入力電源
の相電流ia,ib,icと変圧器一次電流iab,ibc,
ica、二次電流iAB,iBC,iCAと順電力変換装置
のアーム電流iAO,iBO,iCOと、直流電流idc、
との対応関係を示したもので、これら各電流の相
互関係に於て、変圧器の一次側各相電流ia,ib,
icと変圧器の二次側各相電流iA,iB,iCとは変流
比nで同相と考えてよくさらに変圧器の二次側相
電流iA,iB,iCと順電力変換装置のアーム電流
iAO,iBO,iCOと直流電流idcとは、iA(=iB=
iC)=iAO(=iBO=iCO)=idcの関係にあり、さ
らに交流入力電流の総和Σ|i|は周知の様にΣ
|i|=|ia|+|ib|+|ic|の関係にあるの
で、従つて第4図で順電力変換装置の各サイリス
タの通流期間時に於けるタイムチヤート図を注目
してみるに、例えばサイリスタTHAの通流幅120
゜に於て前半の通流幅60゜に於てはサイリスタ
THBが導通しており、後半の通流幅60゜に於て
はサイリスタTHCが導通して、サイリスタ
THB,THCの通流幅はサイリスタTHAの通流幅
の1/2となつている。従つてサイリスタTHAがオ
ンでサイリスタTHBがオン時には、 iB=iA,iC=0であるので、そのときにおける
絶対値は、 |iA|+|iB|+|iC|=2|iA|となり、ま
た、THAオンでサイリスタTHCオン時には、 iB=0,iC=iAであるのでこの場合も|iA|+
|iB|+|iC|=2|iA|となり、iAは上記し
た様にiA=iDCの関係にあるのでΣ|i′|=2|
iDC|となる。ここで変圧器の二次側電流の総和
Σ|i′|と変圧器の一次側電流の総和Σ|i|と
は、上記した様に略同相で電流値そのものは変流
比nのみに規制されるものであるからして、この
変流比nを無視するものとし、さらに一次側相電
流を取出す変流器の変流比をαとすれば、変流器
の二次側より取出される変圧器一次側総電流Σ|
i|と直流電流idcとの関係はΣ|i|=2αidc
……なる関係式が得られる事になる。
Now, the operation of the present application configured as described above is explained in the fourth section.
This will be explained in detail based on the time charts shown in FIGS. Figure 4 shows the phase currents ia, ib, ic of the input power supply and the primary currents iab, ibc,
ica, secondary currents iAB, iBC, iCA, forward power converter arm currents iAO, iBO, iCO, and direct current idc,
In the mutual relationship of these currents, each phase current ia, ib on the primary side of the transformer,
IC and the secondary side phase currents iA, iB, and iC of the transformer can be considered to be in phase with the current transformation ratio n, and furthermore, the secondary side phase currents iA, iB, and iC of the transformer and the arm current of the forward power converter
iAO, iBO, iCO and DC current idc are iA(=iB=
iC) = iAO (= iBO = iCO) = idc, and the total sum of AC input current Σ|i| is Σ
Since there is a relationship of |i|=|ia|+|ib|+|ic|, therefore, let's pay attention to the time chart during the conduction period of each thyristor of the forward power conversion device in Figure 4. , for example, the conduction width of thyristor TH A is 120
When the flow width in the first half is 60°, the thyristor
TH B is conducting, and in the latter half of the current flow width of 60°, thyristor TH C is conducting, and the thyristor
The flow width of TH B and TH C is 1/2 of the flow width of thyristor TH A. Therefore, when thyristor THA is on and thyristor THB is on, iB=iA, iC=0, so the absolute value at that time is |iA|+|iB|+|iC|=2|iA|, and , when THA is on and thyristor THC is on, iB=0 and iC=iA, so in this case also |iA|+
|iB|+|iC|=2|iA|, and since iA has the relationship iA=iDC as mentioned above, Σ|i′|=2|
iDC|becomes. Here, the sum of the secondary currents of the transformer Σ|i'| and the sum of the primary currents of the transformer Σ|i| are approximately in phase as described above, and the current value itself is regulated only by the current transformation ratio n. Therefore, if this current transformation ratio n is ignored and the current transformation ratio of the current transformer from which the primary side phase current is taken is α, then the current transformation ratio n is taken out from the secondary side of the current transformer. total transformer primary current Σ |
The relationship between i| and DC current idc is Σ|i|=2αidc
...We can obtain the following relational expression.

さて、以上の様な関係にある変圧器、順電力変
換装置の夫々の入―出力電流の関係を踏まえた上
で定常時の動作を述べてみるに、交流入力電流の
電圧波形が第4図ロに示す如き相順で順次移行し
て行くものとすれば、この電源電圧波形に応じて
順電力変換装置の各サイリスタを第4図イに示す
パターンで順次点弧すると、変圧器の二次側出力
電流、即ち順電力変換装置の相電流(サイリスタ
電流は)第4図ハ、変圧器の一次側巻線に流れる
電流は第4図ニ、交流入力電流の相電流は第4図
ホに夫々示す様な波形パターンとなり、さらに交
流入力電流の総和Σ|i|、即ち直流電流idcの
2α倍の電流は第4図ヘに示される。この様な電
流モードに於て、第3図に示す電流差動リレーA
及び相平衡の状態を監視するリレーBは、先ず始
めに交流入力電源の相電流ia,ib,icと直流電流
idcとを順次取り込んで、電流差動リレーAであ
れば加算回路9→第1の平均値算出回路10の経
路を介して第4図ロに示す電源電圧波形の各半波
(180゜)毎、或は1サイクル(360゜)に渡る交
流入力電流(第4図ヘに示す)の総和Σ|i|の
平均値を取出すと共に、同様に直流電流検出回路
11→第2の平均値算出回路12の経路を介して
電源電圧波形の半波期間或は1サイクルに渡る直
流電流idcの平均値を取出す。さらに相平衡の状
態を監視するリレーBにあつては、取出した交流
入力電流の相電流ia(t),ib(t),ic(t)と、これら相
電流の取出した時点より60゜前に取出した相電流
ia(t−60),ib(t−60゜),ic(t−60゜)と
で第4図トに示す様な演算を行なつて、当該相の
相電流と他方の相の60゜前の相電流との差(みか
け上の線間電流を示す)を取出し、この差電流値
を電源電圧波形の半波或は1サイクルに渡つて累
積しその平均値を平均値算出回路19より取出
す。同様に減算回路21と第4の平均値算出回路
22とで、取出した直流電流idc(t)と、この直流
電流より1サイリスルに渡つて前の直流電流idc
(t−360゜)とを減算して、この操作を電源電圧
波形の1サイクルに渡つて順次行つて累積し、こ
の累積した結果よりその平均値を取出す。以上の
様な方法で指定した電流の平均値が夫々算出され
ると、これら平均値出力を第3図に示す第1の判
定回路13〜第4の判定回路23に夫々入力し
て、第1の判定回路13では交流入力電流の総和
の平均値Σ|i|と直流電流の平均値に2αを乗
じた値k|idc|=2α|idc|とを減算して、こ
の減算した値と抑制量としての不感帯値Koとの
大小関係を比較しさらに第2の判定回路14では
動作量としてのΣ|i|−k|idc|なる演算結
果と、抑制量としてのkΣ|i|なる値との大小
関係を比較し、さらに第3の判定回路20と第4
の判定回路23では平均値算出回路19,22よ
り出力される信号値が「0」か“信号あり”かの
判別を行なう。この様な判別結果で第4図トに示
す電流モードより明らかな様に第3の平均値算出
回路19の出力は零であつて、さらに第4図ヘの
電流モードより明らかな様に第4の平均値算出回
路22の出力も零であるので、第3図のANDゲ
ート24のAND条件は成立せず保護対象の変圧
器及び順電力変換装置は共に正常である旨の判定
がなされる。これに対して電流差動リレーAの第
1及び第2の判定回路13,14では、第4図ヘ
に示す電流モードより明らかな様にΣ|i|とk
|idc|=2α|idc|とが同値であるので、その
電流差分を示す零値と各抑制量との大小関係は抑
制量が大となり変圧器、順電力変換装置共に正常
である旨の判定がなされる。なお、第3図に示す
終段のインヒビツト回路28の動作は始動時に変
圧器の突入励磁電流が流れるので、リレー接点2
6が閉路しインヒビツト28の入力信号の一方が
「0」となる。定時はリレー接点26が開路状態
にあるのでタイマ27よりインヒビツト28には
「1」の信号が入力されている。
Now, to describe the steady state operation based on the relationship between the input and output currents of the transformer and forward power converter, which have the above relationships, the voltage waveform of the AC input current is shown in Figure 4. Assuming that the transition occurs in phase order as shown in Fig. 4B, if each thyristor of the forward power converter is fired in sequence in the pattern shown in Fig. The side output current, that is, the phase current (thyristor current) of the forward power converter, is shown in Figure 4 C, the current flowing through the primary winding of the transformer is shown in Figure 4 D, and the phase current of the AC input current is shown in Figure 4 E. The waveform patterns are as shown in FIG. In such a current mode, the current differential relay A shown in Figure 3
Relay B, which monitors the state of phase balance, first detects the phase currents ia, ib, ic of the AC input power supply and the DC current.
In the case of current differential relay A, each half wave (180°) of the power supply voltage waveform shown in FIG. , or take out the average value of the total sum Σ|i| of the AC input current (shown in FIG. The average value of the DC current idc over a half-wave period or one cycle of the power supply voltage waveform is obtained through 12 paths. Furthermore, for relay B that monitors the state of phase balance, the phase currents ia(t), ib(t), and ic(t) of the AC input currents taken out and the phase currents 60° before the time when these phase currents were taken out are Phase current taken out to
Perform calculations as shown in Figure 4 (t) using ia (t-60), ib (t-60°), and ic (t-60°) to calculate the phase current of the relevant phase and the 60° of the other phase. The difference from the previous phase current (indicating the apparent line current) is taken out, this difference current value is accumulated over a half wave or one cycle of the power supply voltage waveform, and the average value is calculated from the average value calculation circuit 19. Take it out. Similarly, the subtraction circuit 21 and the fourth average value calculation circuit 22 calculate the extracted DC current idc(t) and the DC current idc before this DC current over one cycle.
(t-360°), this operation is performed sequentially over one cycle of the power supply voltage waveform and accumulated, and the average value is taken from the accumulated results. When the average values of the specified currents are calculated using the above method, these average value outputs are inputted to the first to fourth determination circuits 13 to 23 shown in FIG. The determination circuit 13 subtracts the average value Σ|i| of the total sum of AC input currents and the value k|idc|=2α|idc|, which is the average value of DC currents multiplied by 2α, and calculates this subtracted value and suppression. The second determination circuit 14 compares the magnitude relationship with the dead zone value Ko as an amount, and then calculates the calculation result of Σ|i|−k|idc| as the operation amount and the value of kΣ|i| as the suppression amount. The third judgment circuit 20 and the fourth judgment circuit 20
The determination circuit 23 determines whether the signal value output from the average value calculation circuits 19, 22 is "0" or "signal present". As a result of such discrimination, the output of the third average value calculation circuit 19 is zero, as is clear from the current mode shown in FIG. Since the output of the average value calculation circuit 22 is also zero, the AND condition of the AND gate 24 in FIG. 3 is not satisfied, and it is determined that both the transformer to be protected and the forward power conversion device are normal. On the other hand, in the first and second determination circuits 13 and 14 of the current differential relay A, Σ|i| and k
Since |idc|=2α|idc| is the same value, the magnitude relationship between the zero value indicating the current difference and each suppression amount is such that the suppression amount is large and it is determined that both the transformer and the forward power converter are normal. will be done. Note that the operation of the final-stage inhibit circuit 28 shown in FIG. 3 is such that the inrush excitation current of the transformer flows during startup, so
6 is closed and one of the input signals of the inhibit 28 becomes "0". Since the relay contact 26 is in an open state at a fixed time, a signal of "1" is input from the timer 27 to the inhibit 28.

さて、第5図は順電力変換装置の正極側のサイ
リスタTHAが逆方向の阻止能力を失つてアーム
短絡事故を生じた場合の電流モードを示したもの
で、サイリスタTHAが故障すると、第5図のt0
t1期間で電源電圧のVA相が電位が最も高く負荷
電流がサイリスタTHA→THB及びサイリスタ
THA→THCの経路を通して流れている間は、変
圧器の二次側電流(第5図ハに示す)及び第5図
ニに示す直流電流、第5図ホに示す交流入力電流
の総和Σ|i|の各電流波形は正常時と何ら変わ
りはなく、交流入力電流の総和Σ|i|より直流
電流に関連する信号k|idc|を減算した値は第
5図ヘに示す様に零で、同様に取り出した現時点
の相電流と60゜前に取り出した相手側の相電流と
の差分も第5図トに示す如く零値となつている。
この状態でt1点でサイリスタTHAよりサイリスタ
THBに転流すると、サイリスタTHAが逆方向の
阻止能力を失つているので、サイリスタTHB
通して流れる負荷電流(=変圧器の二次側電流)
iBは本来ならば負極側のサイリスタTHCを通して
流れるものが、故障したサイリスタTHAを通し
て電源側え流れる様になる。従つて直流電流idc
は第5図ニのt1以降に示す如く次第に減少して行
つて遂には零となり通流パターンがサイリスタ
THAに切換えるまで略々零の状態を保持する様
になる。一方、VA相とVB相の相電流iA,iBは
第5図ハに示す如く非常に増大して行くので交流
入力電流の総和Σ|i|も第5図ホに示す如く大
となり、これら関係より交流入力電流の総和Σ|
i|と直流電流に関連する信号k|idc|との差
分は第5図ヘに示す如く零値より次第に大きくな
つて、この点を第3図に示す電流差動リレーAの
第1及び第2の判定回路13,14が感知して所
定の比較―判定を行ない、ANDゲート15を通
して順電力変換装置が故障である旨を外部に報知
する。一方、相平衡の状態を監視するリレーBで
は、第5図トに示す様に当該相の相電流と、この
相電流より60゜前に取り出した相手側の相電流と
を減算した差電流が次第に零値より大なる方向に
移行するので、この変化を第3図に示す第3の判
定回路20と第4の判定回路23とが感知して
ANDゲート24を通して外部に順電力変換装置
が故障である旨を報知する様になる。ここで第3
図に示す電流差動リレーAと相平衡の状態を監視
するリレーBとがアーム短絡事故に於ては、共に
外部に所定の警報を発するものであるが、どちら
が先に警報を発するかは事故時の相電流の上昇或
は減衰度合と、直流電流の減衰度合と各リレー
A,Bの感知度合との兼合いによつて決定され
る。
Now, Figure 5 shows the current mode when the thyristor TH A on the positive side of the forward power converter loses its blocking ability in the reverse direction and an arm short circuit accident occurs. t 0 in Figure 5 -
During t 1 period, the V A phase of the power supply voltage has the highest potential and the load current changes from thyristor TH A → TH B and thyristor
While flowing through the path TH A → TH C , the sum of the secondary current of the transformer (shown in Figure 5 C), the DC current shown in Figure 5 D, and the AC input current shown in Figure 5 E The current waveforms of Σ|i| are no different from normal times, and the value obtained by subtracting the signal k|idc| related to DC current from the total sum of AC input currents Σ|i| is as shown in Figure 5. The difference between the current phase current taken out in the same way and the phase current on the other side taken out 60 degrees earlier also has a zero value, as shown in Figure 5.
In this state, thyristor TH A is connected to thyristor at point t .
When commutated to TH B , thyristor TH A has lost its reverse blocking ability, so the load current flowing through thyristor TH B (= secondary current of the transformer)
iB would normally flow through the negative side thyristor TH C , but now flows through the failed thyristor TH A to the power supply side. Therefore the direct current idc
As shown from t 1 in Fig. 5D, it gradually decreases and finally reaches zero, making the flow pattern similar to that of a thyristor.
It will maintain a state of approximately zero until it switches to TH A. On the other hand, since the phase currents iA and iB of the V A phase and V B phase increase significantly as shown in Figure 5 C, the total AC input current Σ|i| also increases as shown in Figure 5 E, From these relationships, the total sum of AC input current Σ |
The difference between i| and the signal k|idc| related to the DC current gradually becomes larger than the zero value as shown in FIG. The second judgment circuits 13 and 14 sense and perform a predetermined comparison and judgment, and notify the outside through the AND gate 15 that the forward power conversion device is out of order. On the other hand, in relay B that monitors the state of phase balance, the difference current obtained by subtracting the phase current of the relevant phase and the phase current of the other side taken 60 degrees before this phase current is calculated as shown in Figure 5. Since the value gradually shifts to a value greater than zero, the third determination circuit 20 and fourth determination circuit 23 shown in FIG. 3 sense this change.
The fact that the forward power converter is out of order is notified to the outside through the AND gate 24. Here the third
Current differential relay A and relay B that monitors the state of phase balance shown in the figure both issue a predetermined alarm to the outside in the event of an arm short circuit accident, but which one issues the alarm first depends on the accident. It is determined by the balance between the degree of rise or attenuation of the phase current, the degree of attenuation of the DC current, and the degree of sensing of each relay A, B.

第6図の実施例は順電力変換装置の正極側のサ
イリスタTHAが、ゲート制御部の故障等により
所定の点弧時点でゲート信号が供給されずに点弧
しない場合の、所謂“ゲート欠相”による事故時
の場合の動作パターンを示したもので、例えば第
6図ロのt0点〜t1点で電源電圧のVA相が最も高電
位にあつて前半の60゜期間はサイリスタTHA
サイリスタTHBの経路、後半の60゜期間はサイ
リスタTHA→サイリスタTHCの経路を通して負
荷電流が流れる様な場合、サイリスタTHAのゲ
ート信号が欠相しているので第6図ハ,ニに示す
如く変圧器の二次側電流、即ち順電力変換装置の
相電流iA,iB,iCと直流電流idcとが共にそう失
している。従つて、これら電流を取り込んで所定
の動作を行なう第3図の電流差動リレーA及び相
平衡の状態を監視するリレーBとは夫々OFF状
態にある。この状態でt1点よりt2点の期間で電源
電圧VB相が最も高電位となつてサイリスタTHB
に転流して前半の60゜幅の期間は、サイリスタ
THB→負荷→サイリスタTHCの経路で負荷電流
が流れ始める様になると、第6図ニ,ホの電流モ
ードで示される様に直流電流idcと交流入力電流
の総和Σ|i|とが共に略々定常電流値に復帰し
(これは過渡期の直流偏磁を無視した場合)、これ
ら直流電流idcと交流入力電流の総和Σ|i|と
に関連する信号によつて動作する第3図の電流差
動リレーAは定常時と同様にOFF状態にある。
これに対して相平衡の状態を監視するリレーBの
演算回路18は相電流iB(t),ic(t),を取り出した
時点と、この相電流を取り出した時点より60゜前
(第6図のt0′〜t1期間に相当する)のVC相の相電
流ic(t−60゜),VA相の相電流iA(t−60゜)
とを夫々減算して、この減算した結果が第6図ト
のt1〜t2点の期間に示す如く“信号あり”でこの
出力信号を第3の平均値算出回路19を通して第
3の判定回路20に入力する。第3の判定回路2
0は入力される“信号あり”の信号によつて直ち
に順電力変換装置が故障である旨の信号をAND
ゲート24に出力する。さて、相平衡の状態を監
視するリレーBの減算回路21は、第6図t1〜t2
点の期間に取出した直流電流idcに関連する信号
と、この取出した直流電流の信号より1サイクル
前(第6図のt1〜t2期間を示す)の直流電流idcと
を減算して、この減算した結果を第4の平均値算
出回路22を通して第4の判定回路23に入力す
る。この第4の判定回路23ではidc―idの値
が零ではない事を確認すると順電力変換装置が故
障である旨を示す信号をANDゲート24に出力
する。従つてANDゲート24は第3及び第4の
判定回路20,23より出力される信号でAND
条件が成立し、このAND条件の成立した信号を
以つてタイマー25→ORゲート17→インヒビ
ツト回路28の経路を通して順電力変換装置が故
障である旨を外部に報知するものである。この様
にゲート信号の欠相時に於ては電流差動リレーA
では検出できないが、他方の相平衡の状態を監視
するリレーBは確実にその故障を検出して外部に
報知する訳であるが、変圧器8の二次側の一相が
欠相した場合でも上記したゲート欠相の事故時と
全く同様な電流モードあるので確実に検出でき
る。さらに本実施例に於ては順電力変換装置の内
部事故で特にアーム短絡事故、ゲート欠相さらに
は電源欠相の場合のみを述べたが、例えば何らか
の原因で転流失敗して過電流が流れた場合や、さ
らには変圧器が層間短絡事故を生じて事故電流が
流れた場合は、本願ではこの種大きな事故電流を
電流差動リレーAと相平衡の状態を監視するリレ
ーBとが共に確実に検出できるので所定の保護を
行なわれるのは申す迄もなく、さらに地絡事故も
確実に検出できるものである。
The embodiment shown in FIG. 6 is a case where the thyristor TH A on the positive side of the forward power converter does not fire at a predetermined firing time because the gate signal is not supplied due to a failure of the gate control unit. For example, from point t 0 to point t 1 in Figure 6 B, the V A phase of the power supply voltage is at the highest potential, and the thyristor operates during the first half of the 60° period. TH
If the load current flows through the path of thyristor TH B , and the path of thyristor TH A → thyristor TH C during the second half of the 60° period, the gate signal of thyristor TH A is out of phase, so the situation shown in Fig. 6 C and D occurs. As shown, the secondary current of the transformer, that is, the phase currents iA, iB, iC of the forward power converter and the direct current idc are both lost. Therefore, the current differential relay A shown in FIG. 3, which takes in these currents and performs a predetermined operation, and the relay B, which monitors the state of phase balance, are both in the OFF state. In this state, the power supply voltage V B phase becomes the highest potential during the period from point t 1 to point t 2 , and the thyristor TH B
During the first half of the 60° width period, the thyristor
When the load current starts to flow in the path TH B → load → thyristor TH C , the DC current idc and the total sum of AC input current Σ |i | The current value returns to approximately the steady state value (this is when DC bias during the transient period is ignored) and is operated by a signal related to these DC currents idc and the sum of the AC input currents Σ|i| The current differential relay A is in the OFF state as in the normal state.
On the other hand, the arithmetic circuit 18 of relay B, which monitors the state of phase balance, operates at the time when phase currents iB(t), ic(t), and 60 degrees before the time when phase currents are taken out (6th Phase current ic of V C phase (t-60°), phase current iA of V A phase (t-60°) during period t 0 ′ to t 1 in the figure)
As shown in the period from t 1 to t 2 in FIG. input to circuit 20; Third judgment circuit 2
0 means that the input “signal present” signal immediately ANDs the signal indicating that the forward power converter is malfunctioning.
Output to gate 24. Now, the subtraction circuit 21 of relay B that monitors the state of phase balance is shown in Fig. 6 from t1 to t2.
By subtracting the signal related to the DC current idc taken out during the period of the point and the DC current idc one cycle before the extracted DC current signal (indicating the period t 1 to t 2 in Fig. 6), The result of this subtraction is input to the fourth determination circuit 23 through the fourth average value calculation circuit 22. When the fourth determination circuit 23 confirms that the value of idc-id is not zero, it outputs a signal to the AND gate 24 indicating that the forward power conversion device is malfunctioning. Therefore, the AND gate 24 ANDs the signals output from the third and fourth judgment circuits 20 and 23.
When the condition is met, a signal that satisfies this AND condition is used to notify the outside through the path of timer 25 -> OR gate 17 -> inhibit circuit 28 that the forward power conversion device is out of order. In this way, when the gate signal is out of phase, the current differential relay A
Although relay B, which monitors the state of the other phase balance, will surely detect the failure and notify the outside, even if one phase on the secondary side of transformer 8 is open, Since there is a current mode that is exactly the same as in the case of the gate open phase accident described above, it can be detected reliably. Furthermore, in this embodiment, only the cases of internal accidents in the forward power converter, such as arm short-circuit accidents, gate phase failures, and power supply phase failures, have been described, but for example, commutation fails for some reason and overcurrent flows. In this case, if a short circuit occurs in the transformer and a fault current flows, in this application, both the current differential relay A and the relay B that monitors the state of phase balance can reliably handle this kind of large fault current. Needless to say, it is possible to provide a certain amount of protection since ground faults can be detected, and ground faults can also be reliably detected.

以上の様に本発明は電流差動リレーと相平衡の
状態を監視するリレーとを有機的に組み合せて所
定の保護を行なうものであるからして、以下に示
す様に種々の効果を奏するものである。
As described above, since the present invention organically combines a current differential relay and a relay that monitors the state of phase balance to provide specified protection, it has various effects as shown below. It is.

順電力変換装置の事故は勿論の事、交流入力
側に設置される変圧器の事故をも確実に検出で
きるので交―直変換系そのものの信頼性が一層
向上する。
Not only faults in the forward power converter, but also faults in the transformer installed on the AC input side can be reliably detected, further improving the reliability of the AC-DC conversion system itself.

従来では不可能とされたゲート欠相、電源欠
相の事故も確実に検出できるので系そのものの
フエルセールが一段と向上する。
Accidents such as gate phase failure and power supply phase failure, which were previously considered impossible, can be reliably detected, further improving the fuel sales of the system itself.

電流差動リレー、相平衡の状態を監視するリ
レーは共にほとんどの事故を確実に検出できる
ので、一方のリレーが故障した場合でも他方の
リレーがその後備保護を行なう事ができ信頼性
が向上する。
Both current differential relays and phase balance monitoring relays can reliably detect most faults, so even if one relay fails, the other relay can provide backup protection, improving reliability. .

アナログであれデイジタルであれ共に実現で
きる構成ではあるが、特にデイジタルリレーで
あれば想定される汎ゆる事故を高精度で検出で
きる利点がある。
Although both analog and digital relays can be implemented, digital relays have the advantage of being able to detect a wide variety of conceivable accidents with high precision.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は変圧器を保護範囲としない従来の保護
方法を示す一具体例、第2図は本発明による保護
方法の基本的な構成を示す一具体例、第3図は本
発明による一実施例を示す具体的なブロツク構成
図、第4図は本保護方法を適用した場合の定常時
に於ける電流モードを示すタイムチヤート図、第
5図及び第6図はアーム短絡事故時、ゲート欠相
時に対して本保護方法を適用した場合の電流モー
ドを示すタイムチヤート図。 1は商用周波電源母線、3は変流器、4は順電
力変換装置、5は直流変流器、6は負荷、7及び
Aは電流差動リレー、8は変圧器、9は加算回
路、10,12及び19,22は平均値算出回
路、13,14及び20,23は判定回路、18
は演算回路、21は減算回路、15,24は
ANDゲート回路、16,25及び27はタイ
マ、17はORゲート、28はインヒビツト回
路、Bは相平衡を監視するリレー。
Fig. 1 is a specific example showing a conventional protection method that does not protect a transformer, Fig. 2 is a specific example showing the basic configuration of the protection method according to the present invention, and Fig. 3 is an implementation according to the present invention. A concrete block configuration diagram showing an example, Fig. 4 is a time chart showing the current mode in steady state when this protection method is applied, Figs. FIG. 4 is a time chart showing current mode when the present protection method is applied to time. 1 is a commercial frequency power supply bus, 3 is a current transformer, 4 is a forward power converter, 5 is a DC current transformer, 6 is a load, 7 and A are current differential relays, 8 is a transformer, 9 is an addition circuit, 10, 12, 19, 22 are average value calculation circuits, 13, 14, 20, 23 are judgment circuits, 18
is an arithmetic circuit, 21 is a subtraction circuit, 15 and 24 are
AND gate circuit, 16, 25 and 27 are timers, 17 is an OR gate, 28 is an inhibit circuit, and B is a relay for monitoring phase balance.

Claims (1)

【特許請求の範囲】 1 商用周波電源母線に接続される変圧器と順電
力変換装置とを含めた系の交―直変換装置を保護
するものにおいて、前記変圧器に流入する相電流
の絶対値の総和の平均値と、前記順電力変換装置
の直流出力瞬時値の絶対値の平均値とを求め、相
電流絶対値の総和の平均値より直流瞬時値の平均
値を減算してこの減算値を抑制量となる定数とを
比較判定し、更に前記減算値と相電流絶対値総和
の平均値とを比較判定し、各判定結果の論理積条
伴にて出力を発生する差動リレーと、 前記変圧器に流入する各相電流の瞬時値の絶対
値を順次サンプリングし、各相電流の現サンプリ
ング値より夫々他相の先にサンプリングされた瞬
時値の絶対値を減算した後、各減算値を加算して
平均値を求めて相電流に関連する不平衡信号の有
無を判定すると共に、前記順電力変換装置の直流
出力電流を順次サンプリングして得られた瞬時値
を任意数累積して順次平均値を求め、現在の平均
値と先の平均値とを減算し、この減算値の任意数
の平均値を求めて信号の有無判断し、この信号と
前記相電流に関連する不平衡信号との論理積条件
にて出力を発生する相平衡を監視するリレーとを
備えたことを特徴とする交―直変換装置の保護装
置。
[Claims] 1. In the protection of an AC-DC converter in a system including a transformer and a forward power converter connected to a commercial frequency power supply bus, the absolute value of the phase current flowing into the transformer. and the average value of the absolute values of the DC output instantaneous values of the forward power converter, and subtract the average value of the DC instantaneous values from the average value of the sum total of the phase current absolute values to obtain this subtracted value. a differential relay that compares and determines the subtraction value with a constant serving as a suppression amount, further compares and determines the subtracted value with an average value of the sum of absolute phase current values, and generates an output based on the logical product of each determination result; After sequentially sampling the absolute value of the instantaneous value of each phase current flowing into the transformer, and subtracting the absolute value of the instantaneous value sampled before each other phase from the current sampled value of each phase current, each subtracted value is calculated. The presence or absence of an unbalanced signal related to the phase current is determined by summing up the average value and determining the presence or absence of an unbalanced signal related to the phase current, and accumulating an arbitrary number of instantaneous values obtained by sequentially sampling the DC output current of the forward power converter and sequentially Find the average value, subtract the current average value and the previous average value, find the average value of an arbitrary number of subtracted values to determine the presence or absence of a signal, and compare this signal with the unbalanced signal related to the phase current. 1. A protection device for an AC-DC converter, comprising: a relay for monitoring phase balance that generates an output under a logical product condition.
JP5226279A 1979-04-27 1979-04-27 Method of protecting ac*dc converter Granted JPS55144728A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5226279A JPS55144728A (en) 1979-04-27 1979-04-27 Method of protecting ac*dc converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5226279A JPS55144728A (en) 1979-04-27 1979-04-27 Method of protecting ac*dc converter

Publications (2)

Publication Number Publication Date
JPS55144728A JPS55144728A (en) 1980-11-11
JPS6132901B2 true JPS6132901B2 (en) 1986-07-30

Family

ID=12909843

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5226279A Granted JPS55144728A (en) 1979-04-27 1979-04-27 Method of protecting ac*dc converter

Country Status (1)

Country Link
JP (1) JPS55144728A (en)

Also Published As

Publication number Publication date
JPS55144728A (en) 1980-11-11

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