JPS6139656B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to a device for setting photographing information such as shutter speed and aperture value in a camera, and more particularly to a camera having a photographing information setting device in which information is set and changed electrically by operating a push button switch or the like. It is something. In a camera equipped with an exposure control circuit, conventionally, in order to set photographing information in the variable elements of the circuit, the variable elements are linked to these by manual operation of a mechanical information setting mechanism such as a shutter dial, aperture ring, etc. I was doing this by changing the position of the Therefore, in providing a so-called dual-priority camera, two types of information setting devices are required: an aperture preset ring for setting aperture information and a shutter dial for setting shutter time information. The present invention has been made in view of this point, and includes a mode selection means for selecting a shutter priority mode or an aperture priority mode, and a brightness information and setting information input section when the shutter priority mode is selected by the mode selection means. The aperture value is calculated based on the setting information input into the setting information input section, and when the aperture priority mode is selected, the shutter speed value is calculated based on the brightness information and the setting information input into the setting information input section. In an information setting device for a dual-priority arithmetic circuit that is equipped with an arithmetic circuit for calculation, the same operating switch (corresponding to SW ₂ in FIG. 1) that is operated when setting information for shutter and aperture priority; , a digital signal forming circuit (embodiment, corresponding to 2 in FIG. 1) is provided which performs a digital value update operation using an operation signal formed by operating the switch, and when priority is given to the shutter, the digital signal forming circuit of the signal forming circuit is provided. The shutter speed value is set as the shutter speed value, the aperture value is set as the digital value of the signal forming circuit in the case of aperture priority, and the output of the signal forming circuit is set as the digital value of the signal forming circuit.
This corresponds to 3 in the figure. ) By connecting to the setting information input section of the present invention, it is an object of the present invention to provide an information setting device that can preset shutter or aperture information with a single operation switch and a single digital signal forming circuit. The present invention will be explained in detail below with reference to the drawings. FIG. 1 is a block circuit diagram showing an embodiment of an electronic photographic information setting and display method according to the present invention. The figure is a block diagram of a device for setting and displaying photographic information in a camera, and each input and output terminal in the figure indicates a transmission terminal for input and output signals from each part of the digitally controlled camera. In the figure, the Vc attached to each terminal indicates one pole of the camera's power supply, and the other poles are connected to the part indicated by the ground symbol. Ia is the input terminal of the circuit for switching the direction of increasing or decreasing the set value, and becomes logic “1” when switch Sw1 is on.
is sent to the transmission path 9, and "0" is sent out when it is off.
When the up/down counter 2 constituting the digital signal forming means receives the input from this 9, it is counted up in steps when it is "1", and in the down direction when it is "0". Terminal Ib is a terminal for controlling the clock pulse of the above-mentioned count, and is
When Sw2 is turned on, a "0" signal is sent to the transmission path 17, and when it is turned off, a "1" signal is sent to the transmission path 17. The clock pulses are generated by a clock pulse generator of 7, and set values and other values change stepwise at the cycle. The clock pulse generated at step 7 is passed through the clock input controller 1 to the CP of the up/down counter 2.
It is applied to the input and is counted in steps according to the up/down direction indication from line 9. Also
A clock input control signal from Ib is passed through a line 17 to a counter control device 4 and a display control device 5.
It is also transmitted to The terminal Ic constitutes the power supply circuit of the up/down counter 2, and the self-holding action of the timer 8 inserted in this allows the power supply to the counter 2 to be maintained for a certain period of time even if the power to the device is turned off. It's summery. Reference numeral 3 denotes a central control unit (CPU) constituting an exposure calculation circuit, into which brightness information from a photometer including a light receiving element, a priority command signal from a terminal Id, and an output signal 15 of a counter 2 are inputted, and the brightness information and the counter 2 are Exposure calculation is performed based on the exposure information set in , and control signals to the shutter control and diaphragm control sections as well as various signals as shown are sent to the display control device 5 as outputs. The switch Sw3 of the Id circuit is a priority mode changeover switch that serves as a mode selection means for selecting shutter priority or aperture priority mode. When Sw3 is on, the camera operates in shutter priority mode, and when it is off, the camera operates in aperture priority mode. When the switch Sw3 is on, the CPU 3 calculates the information set by the counter 2 and the brightness information, outputs the calculation output as an aperture control signal to an aperture control circuit (not shown), and outputs the counter setting value as a shutter control signal. It is output to a shutter speed control circuit (not shown). Therefore, when Sw3 is on, that is, in the shutter priority mode, by setting the shutter time information in the counter, aperture control is performed based on the preset time information and brightness, and photography is performed in the shutter priority mode. Also Sw
3 is off, the CPU 3 calculates the information on the counter 2 and the brightness information, outputs the calculation output as a shutter control signal to a shutter time control circuit (not shown), and outputs the set value of the counter as an aperture control signal (not shown). Output to the aperture control circuit. Then,
If you turn off Sw3 and set aperture information in counter 2, aperture-priority shooting will be performed. Among the signals sent from the CPU 3 to the display control device 5, the shutter digit signal and the aperture digit signal passing through the lines 10 and 11 are transmitted through a gate controlled by a signal from the terminal Ie, and are displayed by turning Sw4 on and off. stops or flashes. Note that a warning signal (“1” signal) for displaying various warnings such as that the calculated output value has reached the control limit for the exposure value of the camera is sent to the linear display control device 5 via the line 12, and the display segment The signal is
It is sent directly from the CPU to the display device 6. Atsupu・
The output 15 of the down counter 2 is input to the CPU and also to the counter control circuit 4.
The circuit 4 is also applied with the clock control signal 17 to the clock input control device 1 and outputs at its output a counter control signal which is sent to the parallel presetable input terminal of the up/down counter 2. The output 16 of 4 is also sent to the clock input control device 1 and the display control device 5 to turn on and off their control operations. Display control device 5
As shown in the figure, the clock pulses from the clock pulse generator 7, the signal 16 from the counter control device 4, and the signal from the line 17 are inputted, and the signals are processed according to various commands 10, 11, and 14 from the CPU. It performs control functions for various displays, and outputs a shutter seconds signal 18 and an aperture signal 19. These display signals are input to the display device 6, and various information displays are displayed in the viewfinder, for example, according to display segment commands from the CPU. The display device is composed of a combination of known segment and digit drivers, 7-segment LEDs, and other display elements. The configuration and operation of the electronic photographing information setting and display device according to the present invention have been explained above with reference to FIG. This will be explained in detail below. In the following drawings, the same parts as in FIG. 1 are designated by the same reference numerals. FIG. 2 is a circuit diagram showing an embodiment of the clock input control device 1 in FIG. 1, and FIG. 3 is a curve diagram showing an example of a timing chart of the device shown in FIG. In the figure, the pulses from the clock pulse generator 7 have a waveform as shown in FIG. 3A. Reference numeral 23 denotes a frequency divider composed of a circuit such as a flip-flop, and a signal having a waveform as shown in FIG. 3B is obtained at its output. All clocks are synchronized at the falling edge of the pulse, and the output of counter 21
Q ₄ is connected to AND gate 24 via inverter 27
21 outputs _Q4 and at the same time inhibits clock input. FIG. 3C shows the input of the clock input control device 1 and the switch Sw2.
When it is off, it is “1” and when it is on, it is “0”. This signal also serves as the reset input of counter 21 and
It becomes the CP input of the up/down counter 2 via the OR gate 25 and the AND gate 26. The _Q4 output of the counter 21 becomes the second input of the AND gate 22, which is ANDed with the divided output of the clock and input to the CP of the up/down counter 2 via OR25 and AND26 to control the count of the up/down counter 2. Change by 1 step. Note that a control signal from a counter control device shown at 4 in FIG. 1 is input as a second input of the AND 26, and the clock to the counter 2 is controlled to be turned on or off. In Fig. 3, ho shows a case where the clock input control switch Sw2 is on for a long time. In this case, when the _Q4 output of the counter 21 becomes "1" (Fig. Down counter 2 starts counting. This shortens the time between each step after the second step when continuing to operate the set value, and the operation switch
If Sw2 is kept in the operating state (on), the contents of the counter as a digital signal forming means will be sequentially updated, and the digital value as its output will be sequentially updated. Figure 4 shows the counter control device 4 in Figure 1.
FIG. 2 is a circuit configuration diagram showing one embodiment of the present invention. In the figure, the outputs C ₁ to _{C 5} of the up/down counters 2 are input to the CPU 3 via a line 15 and are also sent to the OR gates 28 and 29 of the counter control device. The outputs of OR gates 28 and 29 are output from OR gate 3 along with the up/down direction switching signal from line 9.
0 and 31, and the outputs of OR gates 30 and 31 are ANDed by AND gate 33 and output to line 16 as a counter control output via OR gate 34. Note that a clock input control signal (C or H in FIG. 3) is input from the line 17 to the OR 34. Assuming that the output of the up/down counter 2 has now reached "00000", that is, the upper limit of the setting range, and the direction command from the track 9 is "0" indicating down, the output of the OR 28 is "0",
The output of OR29 becomes "1". At this time, the signals input to OR30 and 31 are “0” in 30,
“0” and 31 become “1” and “1”, and the output of OR30 becomes “0”, and the output of OR31 becomes “1”, so the output of AND33 becomes “0”, and the line 1
When the signal from 7 becomes "0", the counter control output 16 becomes "0", which is sent to the clock input control device 1, and the input of the clock to the up/down counter 2 is stopped. Further, when the output of the counter 2 reaches "1, 0, 0, 0, 1", that is, the lower limit of the setting range, and the command from the line 9 is "1" indicating up, the output of the OR gate 28 is The outputs of "1" and 29 become "0", and similarly to the above case, the counter control output 16 becomes "0" and the clock is stopped. In all other cases, the counter control output is "1" and the clock changes stepwise in response to an UP or DOWN command from the line 9.

[Table] Table 1 shows the output of up-down counter 2 and
This shows the correspondence between shutter priority and aperture priority control outputs in the CPU, and uses 18 of the 5-bit counter output combinations _C5 to _C1 to determine the shutter speed or aperture step required for actual shooting. You're getting a change. FIG. 5 is a circuit diagram showing an embodiment of the display control device 5 in FIG. 1. As shown, the device is
Consisting of AND, OR, NAND gates and inverters, the clock pulse generator 7 provides a clock pulse, the line 16 provides a canter control output, the line 17 provides a clock input control signal, and the line 1
0, 11, 12, and 14 input command signals from the CPU for shutter digit, aperture digit, warning, and priority setting, respectively, to device 5, and the output from 5 is transmitted to the display device via lines 18 and 19. The shutter speed, aperture value, etc. are displayed. To explain an example of the operation of the device shown in the figure,
When the counter output input to the CPU 3 is within the appropriate exposure setting range, the input from the CPU 16 becomes "1", and the warning input 12 from the CPU becomes "0". If we now consider the case where the priority setting is set to shutter priority mode, the line 14 becomes "1", the outputs of AND gates 30 and 31 become "0" due to these inputs, the output of AND gate 34 becomes "0", and the line 14 becomes "1". Because 16 is “1”
The output of the NAND gate 33 becomes "1". Also
The output of the NAND gate 32 also becomes “1”, and the AND
Since the inputs of gate 36 are all "1" except shutter digit signal 10, the input to output 18 of AND35 is
A shutter digit signal 10 from the CPU is output and sent to the display device 6 to display the shutter seconds. Similarly, in the case of aperture priority mode, the inputs of the AND gate 46 are all "1" except for the aperture digit signal 11, and the output 19 of the AND gate 45 is sent to the CPU's aperture digit signal 11.
is output. As is clear from the circuit blocks shown in the first to fifth diagrams above, in the shutter priority mode, by turning on the switch Sw3 shown in the first diagram and turning on the switch Sw2, the input control device shown in the second diagram is turned on. The pulses are counted by the counter 2, and a digital value as shutter time information is set in the counter 2. This is transmitted to the display device 6 via the display control circuit shown in FIG. 5, and the shutter time is displayed as the set value. It is done. Also, at this time, the CPU calculates the set shutter time and brightness, calculates the aperture value, and performs aperture control using the calculated aperture value. In the aperture priority mode, if the switch Sw3 is turned off and the switch Sw2 is turned on, a digital value as aperture information is similarly set in the counter 2, and this is displayed on the display device.
Also, the calculation of the aperture value and brightness set at this time is
This is performed by the CPU, and the shutter time value is calculated, and the shutter control is performed using the calculated time value. Next, FIG. 6 is a perspective view showing the appearance of an embodiment of a camera using the photographing information setting display method according to the present invention.
Sw1 to Sw4 are arranged on the top and front surface of the camera body, and it is desirable to arrange them optimally for the photographing operation. FIGS. 7 and 8 are perspective views showing one embodiment of the structure of the operation button (or lever) provided on the camera body and each switch inside the camera body in the method of the present invention. In the figure, reference numeral 101 denotes an operation button for setting information, which is rotatably supported by a switch board 102 by a mechanism not shown.
Sw1 and Sw2 are the up/down direction command switches and clock input control switches shown in FIG. 1, and by pressing the right or left protrusion of the button 101, the up or down step operation of the setting information is performed. 103 is a push button for operating the display control switch Sw4.
In the arrangement shown in Figure 8, this display control switch Sw4
can be activated either by operating the button 103 or by using the setting button 101.The first stroke of the button 101 turns on the display switch Sw4, and the second stroke of the button 101 turns on the display switch Sw4. It is configured to turn on Sw1 and Sw2. As described above, in the present invention, since exposure information is set by providing a digital signal forming means that performs digital signal forming and updating operations by operating a push button, etc., a single information setting is required. The aperture and shutter speed values can be set using the device, making it suitable as an information setting device for dual-priority cameras.

[Brief explanation of the drawing]

FIG. 1 is a block circuit diagram showing an embodiment of the photographing information setting display method according to the present invention, FIG. 2 is a circuit configuration diagram showing an embodiment of the clock input control device in FIG. 1, and FIG. A curve diagram showing an example of the timing chart of the circuit shown in the figure, FIG. 4 is a circuit configuration diagram showing an example of the counter control device in FIG. 1, and FIG. 6 is a perspective view showing the external appearance of a camera to which the present invention is applied, and FIGS. 7 and 8 are circuit diagrams.
The figure is a perspective view showing an example of the configuration of operation buttons and changeover switches provided on the outer surface of the camera. 1... Clock input control device, 2... Up/down
Down counter, 3...Central control unit (CPU), 4...Counter control device, 5...Display control device, 6...Display device, 7...Clock signal generator, 8...Self-holding timer.

Claims (1)

[Claims] 1 mode selection means for selecting shutter priority mode or aperture priority mode, and an aperture value based on brightness information and setting information input to a setting information input section when shutter priority mode is selected by the mode selection means; and, when the aperture priority mode is selected, calculates the shutter time value based on the brightness information and the setting information input to the setting information input section. In the information setting device for shutter and aperture priority, the same operation switch is operated when setting information for shutter and aperture priority, and a digital signal forming circuit is provided for updating the digital value by the operation signal formed by the operation of the switch. When prioritizing, a shutter speed value is set as a digital value of the signal forming circuit, and when giving aperture priority, an aperture value is set as a digital value of the signal forming circuit, and the output of the signal forming circuit is sent to the setting information input section of the arithmetic circuit. An information setting device characterized by being connected to.