JPS6139766B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an amplifier, and more particularly to a balanced transformerless (hereinafter referred to as BTL) amplifier.

A BTL amplifier consists of two SEPP (single-ended push-pull) amplifiers connected in parallel to the power supply and in series to the load to provide high output at a relatively low voltage. It was designed to obtain Figure 1 shows a schematic circuit diagram of such a BTL amplifier, where 1 is the first-stage differential amplifier, which includes differential transistors Q ₂₀ , Q ₂₁ , emitter resistors R _E1 , R _E2 , collector resistors R _C1 , R _C2 and current source
Consists of I ₀ . The bases of both transistors Q ₂₀ and Q ₂₁ are connected directly or via a resistor R _B to a reference potential point, and the input signal IN is input to the base of the transistor Q ₂₁ via a capacitor C ₁ .

The differential outputs of the differential amplifier 1, which are in an antiphase relationship with each other, are applied to a pair of output amplifiers 2 and 3, respectively, for power amplification, and the outputs OUT1 and OUT2 of both amplifiers 2 and 3 are connected in series through a common load RL. The output amplifiers 2 and 3 are provided with negative feedback sections 2a and 3a, respectively, to improve various characteristics.

However, the first-stage phase inversion differential amplifier 1 is located outside the negative feedback loop of each output amplifier 2 and 3, causing problems in terms of distortion and S/N.

Therefore, the present invention provides a BTL with improved distortion and S/N.
The purpose is to provide an amplifier.

The BTL amplifier according to the present invention provides negative feedback by inputting each output of a pair of output amplifiers driven by mutually opposite phase outputs of the differential amplifier to the emitter connection point of the transistor constituting the first stage differential amplifier. It is characterized by the fact that

The present invention will be explained below with reference to the drawings.

FIG. 2 is a diagram showing an embodiment circuit of the present invention,
Parts equivalent to those in FIG. 1 are designated by the same reference numerals. The first stage differential amplifier 1 is a PNP transistor
Q ₁ , Q ₂ and Q ₃ , Q ₄ are configured by Darlington connection, and the emitters of transistors Q ₂ and Q ₃ are commonly connected via emitter resistors R ₁ and R ₃ , and connected to this common connection point. Transistor Q ₅ between point (E)
and a current mirror circuit 4 consisting of _Q6 . Transistor in diode configuration
The collector of _Q6 is connected to the positive power supply Vcc through three series connected diodes D and a resistor _R5 .
Then, an input signal IN is applied to the base of transistor _Q1 . Note that the bases of the transistors Q ₄ and Q ₁ are grounded directly and via a resistor R _B .

Collector loads R _C1 and R _C2 of this differential amplifier 1
is applied to the pair of output amplifiers 2 and 3. These output amplifiers include drive transistors Q ₈ , Q ₁₁ to which inputs are applied to their bases, and mutually complementary transistors Q ₉ , Q ₁₀ and Q ₁₂ , Q ₁₃ that are push-pull driven by the collector outputs of these drive transistors, A common emitter output OUT1 of transistors Q ₉ and Q ₁₀ and a common emitter output OUT2 of transistors Q ₁₂ and Q ₁₃ are connected in series via a load RL. Note that diodes D ₁ , D ₂ and D ₃ , D ₄ are output transistors.
This is a bias circuit of Q ₉ , Q ₁₀ and Q ₁₂ , Q ₁₃ , and operating currents are supplied by current sources I ₀₁ and I ₀₂ , respectively.

Furthermore, each output OUT1 of output amplifiers 2 and 3,
OUT2 is applied to the emitters of transistors Q ₃ and Q ₂ of differential amplifier 1 via feedback resistors R ₄ and R _2, respectively, to provide negative feedback.

In such a configuration, considering the gain of the output amplifier 2, since the feedback resistor _R4 is connected to the emitter of the transistor _Q3 , the gain is _R4 /( _R1
+R ₃ ), and the gain of the other output amplifier 3 is 1+R ₂ /(R ₁ +R ₃ ) because the feedback resistor R ₂ is connected to the emitter of the transistor Q ₂ .
Here, R ₂ ≫ _{R 1} + R ₃ , R ₄ ≫ _{R 1} + R ₃ and R ₂ =
If R ₄ is selected, the gains of both amplifiers will be equal, and signals with opposite phases and the same level will be obtained at the outputs OUT1 and OUT2. In this way, the negative feedback loop
As a result, distortion and S/N ratio can be improved.

Next, consider bias when using a DC amplifier configuration. The steady value of the emitter voltage of transistors _Q3 and _Q2 is 2V _BE ( _VBE is the voltage between the base and emitter of each transistor), and the outputs OUT1 and OUT2 are 1/2Vcc. Therefore, since the voltage drop across the feedback resistors R ₂ and R ₄ is 1/2Vcc - 2V _BE , the negative feedback current I _NF is becomes. Here, for simplicity, we will use a transistor
If we set the emitter currents of Q ₂ and Q ₃ to be extremely small compared to the feedback current in equation (1) and ignore the emitter currents, I _NF in equation (1) is all due to the current mirror circuit 4. It will flow into transistor _Q5 . Therefore, the collector current of transistor _Q5 is
Since it becomes 2I _NF , by flowing 2I _NF to the transistor Q ₆ , the potentials of the outputs OUT1 and OUT2 are both kept at the midpoint potential of 1/2 Vcc.

Such a state must always be maintained even if the power supply Vcc fluctuates, and for this purpose, the current I _R5 of the current mirror circuit 4 must always be proportional to _2INF . Therefore, as shown in the figure, a diode D is provided in series so that I _R5 =(Vcc-4V _BE )/ _R5 (2). Therefore, the equation (2) becomes I _R5 ∝2 (1/2Vcc-2V _BE )=2I _NF (3), and the current mirror current can always be proportional to 2I _NF . Therefore, input terminal IN and
The voltage between OUT1 and OUT2 is always OV during normal operation, making it possible to use the amplifier as a DC amplifier even though it is a single power supply type amplifier.

As mentioned above, since the first stage amplifier is included in the negative feedback loop, signal distortion and S/N are improved, resulting in a good BTL amplifier. Furthermore, by using the circuit shown in FIG. 2, a single power source type DC amplifier can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of a conventional BTL amplifier, and FIG. 2 is a circuit diagram of an embodiment of the present invention. Explanation of symbols of main parts, 1...Differential amplifier,
2, 3...Output amplifier, _R2 , _R4 ...Negative feedback resistor.

Claims (1)

[Scope of Claims] 1. A differential amplifier constituted by first and second transistors whose emitters are connected to each other via a series circuit consisting of first and second impedances connected in series; a first push-pull amplifier that receives the collector voltage of one transistor; a second push-pull amplifier that receives the collector voltage of the second transistor; and an output of each of the first and second push-pull amplifiers. A balanced transformerless amplifier having a load circuit supplied with the power, and a negative feedback circuit that feeds back each output of the first and second push-pull amplifiers to the emitters of the first and second transistors, respectively. A balanced transformerless amplifier comprising a current source that draws a predetermined current from a connection point between the first impedance and the second impedance. 2. The balanced circuit according to claim 1, wherein the current source is a current mirror circuit in which a current corresponding to the power supply voltage flows through one current path and the predetermined current flows through the other current path.・Transformerless amplifier.