JPS6142865B2 - - Google Patents
Info
- Publication number
- JPS6142865B2 JPS6142865B2 JP54073181A JP7318179A JPS6142865B2 JP S6142865 B2 JPS6142865 B2 JP S6142865B2 JP 54073181 A JP54073181 A JP 54073181A JP 7318179 A JP7318179 A JP 7318179A JP S6142865 B2 JPS6142865 B2 JP S6142865B2
- Authority
- JP
- Japan
- Prior art keywords
- chip carrier
- wiring board
- hole
- semiconductor element
- refrigerant
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W40/00—Arrangements for thermal protection or thermal control
- H10W40/40—Arrangements for thermal protection or thermal control involving heat exchange by flowing fluids
- H10W40/47—Arrangements for thermal protection or thermal control involving heat exchange by flowing fluids by flowing liquids, e.g. forced water cooling
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Description
【発明の詳細な説明】
本発明は半導体装置の構造に関し、特に半導体
素子の放熱を効果的に行うための構造に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to the structure of a semiconductor device, and particularly to a structure for effectively dissipating heat from a semiconductor element.
一般に半導体素子に発生する熱を放熱するため
には液冷式と空冷式とがある。 In general, there are liquid-cooling types and air-cooling types for dissipating heat generated in semiconductor elements.
液冷式では半導体素子を収容したチツプキヤリ
アをセラミツク等からなる多層配線板の一表面に
取付け、この配線板の他表面にはコールドプレー
トと呼ばれる冷却器を取付け、その中に水等の冷
媒を流すことによつて半導体素子に生じた熱を放
熱させる。 In the liquid cooling type, a chip carrier containing semiconductor elements is attached to one surface of a multilayer wiring board made of ceramic or the like, and a cooler called a cold plate is attached to the other surface of this wiring board, and a coolant such as water is flowed through it. In this way, the heat generated in the semiconductor element is radiated.
一方、空冷式では液冷式と同様に配線板のチツ
プキヤリアを取付けた側とは反対側の表面に放熱
フインを設けて半導体素子に生じた熱を放熱させ
る。 On the other hand, in the air-cooled type, as in the liquid-cooled type, heat radiation fins are provided on the surface of the wiring board opposite to the side on which the chip carrier is attached to radiate heat generated in the semiconductor element.
従来、このような水冷式および空冷式のいずれ
においても半導体素子において発生した熱は半導
体素子を収容するチツプキヤリアおよび配線板を
介して裏面の放熱器に達しており、配線板の熱抵
抗が大きいために放熱が効果的に行われないとい
う欠点があつた。 Conventionally, in both water-cooled and air-cooled systems, the heat generated in the semiconductor element reaches the radiator on the back side via the chip carrier that houses the semiconductor element and the wiring board, and the heat resistance of the wiring board is large. The disadvantage was that heat dissipation was not effective.
本発明は従来のこのような欠点を解決し、半導
体素子において発生した熱をより効果的に放熱す
ることを目的とする。 SUMMARY OF THE INVENTION An object of the present invention is to solve these conventional drawbacks and more effectively dissipate heat generated in a semiconductor device.
このような本発明の特徴は一表面から他表面へ
貫通する穴部を有する配線板と、該配線板の配線
に接続すべく形成された導体パターンを有し該穴
部を覆うように該一表面に取付けられ、半導体素
子を搭載するチツプキヤリヤと、該穴部を覆うよ
うに該他表面に取付けられ、流入部と流出部を有
する放熱器とを具備し、該流入部より冷媒を流入
して該穴部において該チツプキヤリヤの熱をうば
い該流出部より該冷媒を流出させることにある。 The features of the present invention include a wiring board having a hole penetrating from one surface to the other surface, a conductor pattern formed to connect to the wiring of the wiring board, and a conductor pattern formed to cover the hole. A chip carrier is attached to the surface and has a semiconductor element mounted thereon, and a radiator is attached to the other surface so as to cover the hole and has an inflow part and an outflow part. The purpose is to absorb the heat of the chip carrier in the hole and allow the refrigerant to flow out from the outlet.
以下本発明を図面を参照して説明する。 The present invention will be explained below with reference to the drawings.
第１図は本発明による半導体装置の一実施例の
断面図である。 FIG. 1 is a sectional view of an embodiment of a semiconductor device according to the present invention.
図において、半導体素子１はチツプキヤリア３
に固着され、蓋４によつて気密封止されている。
チツプキヤリア３には導体膜５が形成されており
導体膜５と半導体素子１とはワイヤ２によつて接
続されている。 In the figure, a semiconductor element 1 is connected to a chip carrier 3.
and is hermetically sealed with a lid 4.
A conductor film 5 is formed on the chip carrier 3, and the conductor film 5 and the semiconductor element 1 are connected by a wire 2.
このようなチツプキヤリア３は穴部９を有する
例えばセラミツク多層配線板８に鉛Pb、錫Snの
合金からなるソルダ材６，７により接着される。
なお、前記導体膜５はソルダ材７を介して配線板
８内部に形成された配線と接続されている。 Such a chip carrier 3 is bonded to, for example, a ceramic multilayer wiring board 8 having a hole 9 with solder materials 6 and 7 made of an alloy of lead Pb and tin Sn.
Note that the conductor film 5 is connected to wiring formed inside a wiring board 8 via a solder material 7.
一方、配線板８のチツプキヤリア３とは反対側
には放熱器１０が取付けられており、この放熱器
１０には水等の冷媒１３の流入部１１と流出部１
２とが設けられている。 On the other hand, a radiator 10 is attached to the side of the wiring board 8 opposite to the chip carrier 3, and this radiator 10 has an inlet 11 and an outlet 1 for a refrigerant 13 such as water.
2 is provided.
この流入部１１からは前記冷媒１３が図示しな
いポンプにより送り込まれるので冷媒１３は半導
体素子１において発生しチツプキヤリア３の底面
に伝達された熱をうばい取つて流出部１２より放
出される。このように熱抵抗の大きい配線板８に
穴部９を設けて冷媒が直接チツプキヤリアと接触
する構造としたので従来よりも放熱の効果が著し
く向上する。 Since the refrigerant 13 is fed from the inflow portion 11 by a pump (not shown), the refrigerant 13 absorbs the heat generated in the semiconductor element 1 and transferred to the bottom surface of the chip carrier 3, and is discharged from the outflow portion 12. Since the hole 9 is provided in the wiring board 8 having a high thermal resistance so that the refrigerant comes into direct contact with the chip carrier, the heat dissipation effect is significantly improved compared to the conventional structure.
第２図ａは第１図に示すチツプキヤリア３の配
線板側の導体パターン、第２図ｂは第１図に示す
配線板８のチツプキヤリア側の導体パターンをそ
れぞれ示す。 2a shows a conductor pattern on the wiring board side of the chip carrier 3 shown in FIG. 1, and FIG. 2b shows a conductor pattern on the chip carrier side of the wiring board 8 shown in FIG. 1.
図から明らかなように、チツプキヤリア３のシ
ール用の導体パターン６′は基板の導体パターン
６″とソルダ材６を介して冷媒１３をシールする
ように接着される。またチツプキヤリア３の導体
パターン（端子パツド）７′は配線板８の導体パ
ターン７″とソルダ材７を介して接続され半導体
素子１と配線板８内部の配線とは電気的に接続さ
れる。 As is clear from the figure, the sealing conductor pattern 6' of the chip carrier 3 is bonded to the conductor pattern 6'' of the board through the solder material 6 so as to seal the refrigerant 13. The pad 7' is connected to the conductor pattern 7'' of the wiring board 8 via the solder material 7, and the semiconductor element 1 and the wiring inside the wiring board 8 are electrically connected.
第３図は本発明の他の実施例を示す断面図で第
１図と同じ番号は同じものを示す。 FIG. 3 is a sectional view showing another embodiment of the present invention, and the same numbers as in FIG. 1 indicate the same parts.
本実施例が第１図の実施例と異なるのはチツプ
キヤリアの底面にセラミツクより熱伝導性の良い
モリブデンMoあるいは銅Cuからなる金属板１４
を設け、ここに半導体素子を固着した点にあり、
このような構造とすることによつて半導体素子に
生じた熱は一層効果的に放熱させることができ
る。 The difference between this embodiment and the embodiment shown in FIG. 1 is that the bottom surface of the chip carrier has a metal plate 14 made of molybdenum Mo or copper Cu, which has better thermal conductivity than ceramic.
is provided, and the semiconductor element is fixed here.
With such a structure, the heat generated in the semiconductor element can be dissipated more effectively.
なお、チツプキヤリア３と金属板１４との接着
はソルダ材あるいはエポキシ系の樹脂を用いて行
なうことができる。また以上の実施例では１個の
チツプキヤリアに対して１個の放熱器を設けた場
合を示したが、１個の放熱器を複数個のチツプキ
ヤリアに対して設けてもよい。 Note that the chip carrier 3 and the metal plate 14 can be bonded using a solder material or an epoxy resin. Further, in the above embodiment, one radiator is provided for one chip carrier, but one radiator may be provided for a plurality of chip carriers.
以上、説明した通り本発明によればチツプキヤ
リアが取付けられる配線板に穴部を設け冷媒とチ
ツプキヤリアあるいは半導体素子が接着された金
属板とが直接接触するので半導体素子に生じた熱
は簡単な構造で効果的に放熱させることができ
る。また本発明による構造の半導体装置では放熱
器内を流れる冷媒を外部から制御できるので発熱
量に応じて冷媒の温度を変えるなどして効率よく
放熱を行うことができる。 As explained above, according to the present invention, a hole is provided in the wiring board to which the chip carrier is attached, and the refrigerant and the chip carrier or the metal plate to which the semiconductor element is bonded come into direct contact, so that the heat generated in the semiconductor element can be removed with a simple structure. Heat can be dissipated effectively. Furthermore, in the semiconductor device having the structure according to the present invention, since the refrigerant flowing inside the radiator can be controlled from the outside, heat can be efficiently radiated by changing the temperature of the refrigerant depending on the amount of heat generated.
第１図は本発明の一実施例を示す断面図、第２
図は第１図の実施例においてチツプキヤリアと基
板に設けられた導体パターンを示す図、第３図は
本発明の他の実施例を示す断面図である。
図において、１は半導体素子、３はチツプキヤ
リア、８は配線基板、９は穴部、１０は放熱器、
１１は流入部、１２は流出部、１３は冷媒を示
す。
FIG. 1 is a cross-sectional view showing one embodiment of the present invention, and FIG.
This figure is a diagram showing a conductor pattern provided on a chip carrier and a substrate in the embodiment of FIG. 1, and FIG. 3 is a sectional view showing another embodiment of the present invention. In the figure, 1 is a semiconductor element, 3 is a chip carrier, 8 is a wiring board, 9 is a hole, 10 is a heat sink,
Reference numeral 11 indicates an inlet, 12 an outlet, and 13 a refrigerant.
Claims (1)
線板と該配線板の配線に接続すべく形成された導
体パターンを有し該穴部を覆うように該一表面に
取付けられ、半導体素子を搭載するチツプキヤリ
アと、該穴部を覆うように該他表面に取付けら
れ、流入部と流出部を有する放熱器とを具備し、
該流入部より冷媒を流入して該穴部において該チ
ツプキヤリアの熱をうばい該流出部より該冷媒を
流出させることを特徴とする半導体装置。1. A wiring board having a hole penetrating from one surface to the other surface, and a conductor pattern formed to connect to the wiring of the wiring board, which is attached to the one surface so as to cover the hole, and carrying a semiconductor element. A chip carrier mounted thereon, and a radiator attached to the other surface so as to cover the hole and having an inlet and an outlet,
A semiconductor device characterized in that a refrigerant flows in through the inflow portion, absorbs heat of the chip carrier in the hole, and flows out through the outflow portion.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7318179A JPS55165659A (en) | 1979-06-11 | 1979-06-11 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7318179A JPS55165659A (en) | 1979-06-11 | 1979-06-11 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS55165659A JPS55165659A (en) | 1980-12-24 |
| JPS6142865B2 true JPS6142865B2 (en) | 1986-09-24 |
Family
ID=13510705
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7318179A Granted JPS55165659A (en) | 1979-06-11 | 1979-06-11 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS55165659A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5349498A (en) * | 1992-12-23 | 1994-09-20 | Hughes Aircraft Company | Integral extended surface cooling of power modules |
| CN107316852B (en) * | 2017-08-08 | 2019-09-27 | 苏州能讯高能半导体有限公司 | Heat dissipation structure of a semiconductor device and semiconductor device |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5599752A (en) * | 1979-01-25 | 1980-07-30 | Chiyou Lsi Gijutsu Kenkyu Kumiai | Structure for fitting ic chip |
-
1979
- 1979-06-11 JP JP7318179A patent/JPS55165659A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS55165659A (en) | 1980-12-24 |
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