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JPS6145771B2 - - Google Patents
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JPS6145771B2 - - Google Patents

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Publication number
JPS6145771B2
JPS6145771B2 JP4345578A JP4345578A JPS6145771B2 JP S6145771 B2 JPS6145771 B2 JP S6145771B2 JP 4345578 A JP4345578 A JP 4345578A JP 4345578 A JP4345578 A JP 4345578A JP S6145771 B2 JPS6145771 B2 JP S6145771B2
Authority
JP
Japan
Prior art keywords
film
liquid crystal
insulating film
nematic liquid
sio
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP4345578A
Other languages
Japanese (ja)
Other versions
JPS54134986A (en
Inventor
Sunao Nishioka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP4345578A priority Critical patent/JPS54134986A/en
Publication of JPS54134986A publication Critical patent/JPS54134986A/en
Publication of JPS6145771B2 publication Critical patent/JPS6145771B2/ja
Granted legal-status Critical Current

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  • Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)
  • Investigating Or Analyzing Materials By The Use Of Electric Means (AREA)
  • Liquid Crystal (AREA)

Description

【発明の詳細な説明】 本発明は絶縁膜の膜質評価法、とくに液晶の動
的散乱現象を応用した二層絶縁膜の膜質評価法に
係る。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for evaluating the film quality of an insulating film, and particularly to a method for evaluating the film quality of a two-layer insulating film that applies the dynamic scattering phenomenon of liquid crystal.

半導体基板上の絶縁膜の膜質は、半導体装置の
製造歩留、信頼性に極めて大きい影響をおよぼ
す。例えばピンホール欠陥の存在している不良膜
質の絶縁膜を用いては、高い製造歩留と高信頼性
の半導体装置の製造は望めない。したがつて、半
導体工業においては、ピンホール欠陥などのない
成膜技術が要求される訳だが、その成膜技術の向
上のためには詳しく膜質を評価する必要がある。
The film quality of an insulating film on a semiconductor substrate has an extremely large effect on the manufacturing yield and reliability of semiconductor devices. For example, if an insulating film of poor quality with pinhole defects is used, it is impossible to manufacture a semiconductor device with high manufacturing yield and high reliability. Therefore, in the semiconductor industry, there is a need for a film formation technology that is free from pinhole defects, but in order to improve the film formation technology, it is necessary to evaluate the film quality in detail.

絶縁膜の膜質評価法の一つとしてネマチツク液
晶の動的散乱現象を応用する評価法があり、これ
は絶縁膜中に存在するピンホール欠陥などを高感
度でかつ欠陥存在箇所を直視できる長所がある。
One of the methods for evaluating the film quality of insulating films is an evaluation method that applies the dynamic scattering phenomenon of nematic liquid crystals, and this has the advantage of being highly sensitive to pinhole defects that exist in insulating films, and allowing direct visualization of the defect locations. be.

以下シリコン (Si)基板上の二酸化ケイ素
(SiO2)膜・窒化ケイ素 (Si3N4)膜の二層膜を例
にとつて液晶の動的散乱を利用した従来の絶縁膜
の膜質評価法を説明する。
Below is silicon dioxide on a silicon (Si) substrate.
A conventional method for evaluating the film quality of an insulating film using dynamic scattering of liquid crystals will be explained using a two-layer film of a (SiO 2 ) film and a silicon nitride (Si 3 N 4 ) film as an example.

第1図は、二層の絶縁膜を有する被評価試料の
断面図である。被評価試料100はSi基板1、
SiO2膜2、Si3N4膜3から構成されており、SiO2
膜2にはSiO2膜ピンホール欠陥42、Si3N4膜3
にはSi3N4膜ピンホール欠陥43を含んでいるも
のとする。
FIG. 1 is a cross-sectional view of a sample to be evaluated having a two-layer insulating film. The sample to be evaluated 100 is a Si substrate 1,
It is composed of a SiO 2 film 2 and a Si 3 N 4 film 3 .
Film 2 has SiO 2 film pinhole defect 42, Si 3 N 4 film 3
It is assumed that a Si 3 N 4 film pinhole defect 43 is included in the Si 3 N 4 film.

液晶による絶縁膜の膜質評価法では、絶縁膜上
にネマチツク液晶膜を形成し、さらにネマチツク
液晶膜に接触させて透明導電膜を載置し、Si基板
のごとき半導体基板と透明導電膜との間に直流電
圧を印加しながら、ピンホール欠陥などの所在箇
所上の液晶膜中に発生した動的散乱現象を観測す
る。
In the method for evaluating the quality of insulating films using liquid crystals, a nematic liquid crystal film is formed on the insulating film, a transparent conductive film is placed in contact with the nematic liquid crystal film, and a transparent conductive film is placed between the semiconductor substrate such as a Si substrate and the transparent conductive film. While applying a DC voltage to the area, the dynamic scattering phenomenon that occurs in the liquid crystal film at locations such as pinhole defects is observed.

第2図は、液晶法の従来方法を説明するための
断面図および電源回路図である。
FIG. 2 is a sectional view and a power supply circuit diagram for explaining the conventional liquid crystal method.

図においては、Si3N4膜のない参考試料200
のSiO2膜2の上にネマチツク液晶膜5が形成さ
れ、さらにネマチツク液晶膜5と接触して透明導
電膜6が載置されている。透明導電膜6は薄膜な
ので支持体としてのガラス板7の面に形成されて
いる。
In the figure, reference sample 200 without Si 3 N 4 film is shown.
A nematic liquid crystal film 5 is formed on the SiO 2 film 2, and a transparent conductive film 6 is placed in contact with the nematic liquid crystal film 5. Since the transparent conductive film 6 is a thin film, it is formed on the surface of a glass plate 7 serving as a support.

透明導電膜6とSi基板1の間には直流電源8に
より直流電圧V0が印加されている。この直流電
圧V0はネマチツク液晶膜5の電位差V1とSiO2
2の電位差V2の和から成立つている。
A DC voltage V 0 is applied between the transparent conductive film 6 and the Si substrate 1 by a DC power supply 8 . This DC voltage V 0 is formed from the sum of the potential difference V 1 of the nematic liquid crystal film 5 and the potential difference V 2 of the SiO 2 film 2.

ここで、V0がネマチツク液晶膜5を動的散乱
モードに至らせるしきい値電圧Vthであるなら
ば、SiO2膜2に含まれているSiO2膜ピンホール
欠陥42の箇所でのみV2=0であるからV1=V0
=Vthとなつて第2図のごとく、局部的な動的散
乱モードが発生する。この動的散乱モード発生領
域9はSiO2膜ピンホール欠陥42の寸法よりも
大きいので、動的散乱モード発生領域9を観測す
ることにより、微小なSiO2膜ピンホール欠陥4
2を検出でき、しかもその所在位置をも知ること
ができる。
Here, if V 0 is the threshold voltage V th that brings the nematic liquid crystal film 5 into the dynamic scattering mode , V Since 2 = 0, V 1 = V 0
=V th and a local dynamic scattering mode is generated as shown in FIG. Since this dynamic scattering mode generation region 9 is larger than the size of the SiO 2 film pinhole defect 42, by observing the dynamic scattering mode generation region 9, the minute SiO 2 film pinhole defect 4 can be detected.
2 can be detected, and its location can also be known.

しかし従来、液晶による絶縁膜の評価法を適用
する場合には、対象とする絶縁膜として単一種類
の単層膜に限られるのが通常であつた。これは、
2種類の絶縁膜からなる二層膜へ液晶による評価
法を適用すると、二層膜としての評価はできるも
のの、それぞれの種類の絶縁膜に対しての評価
を、二層膜としての評価結果から判断しがたいた
めであつた。膜質を向上させる成膜技術の改善に
は、それぞれの種類の絶縁膜の評価を必要とする
が、それぞれの種類の単層膜を個々に評価する
と、評価作業能率の悪くなる欠点があるばかりで
なく、それぞれの単層膜の評価結果を重ね合わせ
て二層膜の評価結果となし得るものかどうかの疑
問のつきまとう恐れがある。例えば、Si基板上に
SiO2膜を形成し、さらにその上にSi3N4膜を形成
した二層絶縁膜の評価の場合、従来法で検出され
たピンホール欠陥は、SiO2膜に存在するのは、
Si3N4膜に存在するのか判定が困難である。ま
た、Si基板上のSiO2膜と、Si基板上のSi3N4膜を
個々に評価すると、評価試料として2種類を要し
評価作業能率が悪くなる。また、Si基板上のSiO2
膜の試料で得られたピンホール欠陥密度とSi基板
上のSi3N4膜の試料で得られたピンホール欠陥密
度との単純な算術和で、Si基板上のSiO2膜・
Si3N4膜の二層膜のピンホール欠陥密度と判断し
てよいものでもない。Si3N4膜の形成においては
熱処理を伴うのが通常であるから、Si3N4膜の下
地のSiO2膜での新らたな欠陥発生や、Si基板上の
Si3N4膜の欠陥とは違つたSiO2膜上のSi3N4膜での
新らたな欠陥発生があり得るからである。
However, conventionally, when applying a method for evaluating an insulating film using liquid crystal, the target insulating film is usually limited to a single type of monolayer film. this is,
If a liquid crystal evaluation method is applied to a two-layer film consisting of two types of insulating films, it can be evaluated as a two-layer film, but it is difficult to evaluate each type of insulating film from the evaluation results as a two-layer film. This was because it was difficult to judge. Improving film formation technology to improve film quality requires evaluation of each type of insulating film, but evaluating each type of single-layer film individually has the disadvantage of decreasing evaluation work efficiency. However, there is a risk of doubts as to whether the evaluation results for each single-layer film can be combined to form the evaluation results for a two-layer film. For example, on a Si substrate
In the case of evaluation of a two-layer insulating film in which a SiO 2 film is formed and a Si 3 N 4 film is further formed on top of it, the pinhole defects detected by the conventional method are due to the fact that the pinhole defects present in the SiO 2 film are
It is difficult to determine whether it exists in the Si 3 N 4 film. Furthermore, if the SiO 2 film on the Si substrate and the Si 3 N 4 film on the Si substrate are evaluated individually, two types of evaluation samples are required, which deteriorates the efficiency of the evaluation work. Also, SiO 2 on Si substrate
A simple arithmetic sum of the pinhole defect density obtained for the film sample and the pinhole defect density obtained for the Si 3 N 4 film sample on the Si substrate,
It cannot be determined that this is the pinhole defect density of the two-layer Si 3 N 4 film. Since the formation of a Si 3 N 4 film usually involves heat treatment, new defects may occur in the SiO 2 film underlying the Si 3 N 4 film, or defects may occur on the Si substrate.
This is because new defects may occur in the Si 3 N 4 film on the SiO 2 film, which are different from defects in the Si 3 N 4 film.

本発明は、上記の点に鑑みてなされたものであ
り、二層絶縁膜を形成している各絶縁膜の膜質を
液晶の動的散乱を用いて評価することを可能にす
る絶縁膜の膜質評価法を提供することを目的とし
たものである。
The present invention has been made in view of the above points, and provides a film quality of an insulating film that makes it possible to evaluate the film quality of each insulating film forming a two-layer insulating film using dynamic scattering of liquid crystal. The purpose is to provide an evaluation method.

第3図は、本発明による膜質評価法を説明する
ための補助的な断面図および電源回路図である。
図においては、V0をV0>Vth+V2としている。こ
の場合には、SiO2膜ピンホール欠陥42の有無
にかかわらず、SiO2膜2上のすべての位置にお
いてネマチツク液晶膜5の電位差V1はV1>Vth
あるから、図のごとくネマチツク液晶膜5の全体
が動的散乱モードとなる。ここで、このネマチツ
ク液晶膜5全体が動的散乱モードとなる最低の
V0の値を、SiO2膜2に対してV02としておく。
FIG. 3 is an auxiliary cross-sectional view and a power supply circuit diagram for explaining the film quality evaluation method according to the present invention.
In the figure, V 0 is set as V 0 >V th +V 2 . In this case, regardless of the presence or absence of the SiO 2 film pinhole defect 42, the potential difference V 1 of the nematic liquid crystal film 5 at all positions on the SiO 2 film 2 is V 1 >V th , so the nematic liquid crystal film 5 is The entire liquid crystal film 5 is in dynamic scattering mode. Here, the entire nematic liquid crystal film 5 is in the dynamic scattering mode.
The value of V 0 is set to V 02 for the SiO 2 film 2.

第3図で説明したようなネマチツク液晶膜5の
全体が動的散乱モードとなる状態は、SiO2膜2
をSi3N4膜に置き代えた場合にも作り出すことが
できる。このSi3N4膜の場合のネマチツク液晶膜
5全体が動的散乱モードとなる最低のV0の値を
V03としておく。ただし、このSi3N4膜の場合にお
いても、ネマチツク液晶膜5の膜厚はSiO2膜2
の場合と同じ膜厚としておく。
The state where the entire nematic liquid crystal film 5 is in the dynamic scattering mode as explained in FIG .
It can also be created when replacing with a Si 3 N 4 film. In the case of this Si 3 N 4 film, the lowest value of V 0 at which the entire nematic liquid crystal film 5 is in dynamic scattering mode is determined.
Set it as V 03 . However, even in the case of this Si 3 N 4 film, the film thickness of the nematic liquid crystal film 5 is the same as that of the SiO 2 film 2.
The film thickness is set to be the same as in the case of .

V02、V03の大小関係は、それぞれの膜厚によつ
て異なるが、一般に半導体工業で用いられる
SiO2膜2、Si3N4膜3の場合はV02≠V13である。
The magnitude relationship of V 02 and V 03 differs depending on the thickness of each film, but it is generally used in the semiconductor industry.
In the case of the SiO 2 film 2 and the Si 3 N 4 film 3, V 02 ≠V 13 .

ここでは、V02はV03より小さくしておく。 Here, V 02 is set smaller than V 03 .

第4図は二層絶縁膜に対する本発明の膜質評価
法を説明するための断面図および電源回路図であ
る。液晶膜の膜厚は第3図の場合に用いた液晶膜
の膜厚と同一にしておく。二層絶縁膜23にはそ
れぞれSiO2膜ピンホール欠陥42、Si3N4膜ピン
ホール欠陥43を含んでいる。本発明の膜質評価
法では、まず、透明導電膜6とSi基板1の間に直
流電圧V02を印加する。この時には第4図aに示
すごとく、Si3N4膜ピンホール欠陥43のところ
のネマチツク液晶膜5だけがSi3N4膜欠除のため
動的散乱モード発生領域9となる。つづいて透明
導電膜6とSi基板1の間に直流電圧V03を印加す
る。この時には第4図bに示すごとく、Si3N4
ピンホール欠陥43のところのネマチツク液晶膜
5だけでなく、SiO2膜ピンホール欠陥42のと
ころのネマチツク液晶膜5もSiO2欠除のため動
的散乱モード発生領域9となる。したがつて、透
明導電膜6とSi基板1の間に印加する直流電圧を
V02またはV03として、現出する動的散乱モード発
生領域9を観測しその観測結果を対比することに
より、Si3N4膜ピンホール欠陥43またはSiO2
ピンホール欠陥42を検知でき、かつそれら欠陥
の所在位置をも知ることができる。Si3N4膜ピン
ホール欠陥43とSiO2膜ピンホール欠陥42の
所在位置が一致することは極めてまれである。
FIG. 4 is a cross-sectional view and a power supply circuit diagram for explaining the film quality evaluation method of the present invention for a two-layer insulating film. The thickness of the liquid crystal film is set to be the same as the thickness of the liquid crystal film used in the case of FIG. The two-layer insulating film 23 includes a SiO 2 film pinhole defect 42 and a Si 3 N 4 film pinhole defect 43, respectively. In the film quality evaluation method of the present invention, first, a DC voltage V 02 is applied between the transparent conductive film 6 and the Si substrate 1. At this time, as shown in FIG. 4a, only the nematic liquid crystal film 5 at the Si 3 N 4 film pinhole defect 43 becomes a dynamic scattering mode generating region 9 because the Si 3 N 4 film is missing. Subsequently, a DC voltage V 03 is applied between the transparent conductive film 6 and the Si substrate 1. At this time, as shown in FIG. 4b, not only the nematic liquid crystal film 5 at the Si 3 N 4 film pinhole defect 43 but also the nematic liquid crystal film 5 at the SiO 2 film pinhole defect 42 are affected by SiO 2 deficiency. Therefore, it becomes a dynamic scattering mode generation region 9. Therefore, the DC voltage applied between the transparent conductive film 6 and the Si substrate 1 is
By observing the dynamic scattering mode generation region 9 that appears as V 02 or V 03 and comparing the observation results, it is possible to detect the Si 3 N 4 film pinhole defect 43 or the SiO 2 film pinhole defect 42, Moreover, the locations of these defects can also be known. It is extremely rare for the Si 3 N 4 film pinhole defect 43 and the SiO 2 film pinhole defect 42 to coincide in location.

以上は、二層絶縁膜としてSiO2膜とSi3N4膜と
からなるものを例示したが、成膜工程の異なる2
種類のSiO2膜のごとき二層絶縁膜にも適用で
き、絶縁膜としてのアルミナ(Al2O3)膜などに
も適用できる。また、半導体基板としてSi基板を
例示したが、ヒ化ガリウム(GaAs)基板、ゲル
マニウム(Ge)基板などの半導体基板、または
金(Au)、モリブデン(Mo)などの導電性基板
にも適用できる。印加直流電圧の極性については
特定しなかつたが、確実に絶縁膜の欠除したピン
ホール欠陥を検出する場合には、半導体基板また
は導電性基板を電位、透明導電膜を電位とす
れば極めて正確にピンホール欠陥が検出できる絶
縁膜の膜質評価法となる。
The above example shows a two-layer insulating film consisting of an SiO 2 film and a Si 3 N 4 film.
It can also be applied to two-layer insulating films such as SiO 2 films of various types, and also to alumina (Al 2 O 3 ) films as insulating films. Further, although a Si substrate has been exemplified as a semiconductor substrate, it is also applicable to semiconductor substrates such as gallium arsenide (GaAs) substrates, germanium (Ge) substrates, or conductive substrates such as gold (Au) and molybdenum (Mo). Although we did not specify the polarity of the applied DC voltage, in order to reliably detect pinhole defects where the insulating film is missing, it is extremely accurate to set the potential on the semiconductor substrate or conductive substrate and the potential on the transparent conductive film. This is a film quality evaluation method for insulating films that can detect pinhole defects.

以上詳しく説明したように、本発明の二層絶縁
膜の膜質評価法は、それぞれの絶縁膜の膜質を独
立に評価でき、しかも欠陥所在位置を知ることの
できる簡便な方法である。それぞれの絶縁膜に対
する既述の例えばV02、V03は、それぞれの絶縁
膜、ネマチツク液晶の固有電気抵抗、膜厚、ネマ
チツク液晶のしきい値電圧が分かれば、容易に算
出できるものである。したがつて、半導体工業に
おける絶縁膜のごとき、種類、膜厚の異なること
の多い二層絶縁膜の膜質評価に好適である。それ
ゆえ本発明の膜質評価法によつて、成膜技術の向
上、ひいては高い製造歩留と高信頼性の半導体装
置の製造を期待できる。
As described above in detail, the method for evaluating the film quality of a two-layer insulating film of the present invention is a simple method that allows the film quality of each insulating film to be evaluated independently and also allows the location of defects to be known. For example, the above-mentioned V 02 and V 03 for each insulating film can be easily calculated if the specific electrical resistance, film thickness, and threshold voltage of each insulating film, nematic liquid crystal, and nematic liquid crystal are known. Therefore, it is suitable for evaluating the film quality of two-layer insulating films, which often have different types and thicknesses, such as insulating films in the semiconductor industry. Therefore, by using the film quality evaluation method of the present invention, it can be expected that film forming technology will be improved and that semiconductor devices with high manufacturing yield and high reliability will be manufactured.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は二層の絶縁膜を有する被評価試料の一
例の断面図、第2図は従来の液晶法を説明するた
めの断面図および電源回路図、第3図は本発明に
よる膜質評価法を説明するための補助的な断面図
および電源回路図、第4図a,bは本発明による
膜質評価法を説明するための断面図および電源回
路図である。 図において、1はSi基板(半導体基板)、2は
SiO2膜(第1の絶縁膜)、23は二層絶縁膜、3
はSi3N4膜(第2の絶縁膜)、42はSiO2膜ピンホ
ール欠陥、43はSi3N4膜ピンホール欠陥、5は
ネマチツク液晶膜、6は透明導電膜、7はガラス
板、8は直流電源、9は動的散乱モード発生領
域、100は被評価試料である。なお、図中同一
符号はそれぞれ同一または相当部分を示す。
Fig. 1 is a cross-sectional view of an example of a sample to be evaluated having a two-layer insulating film, Fig. 2 is a cross-sectional view and power supply circuit diagram for explaining the conventional liquid crystal method, and Fig. 3 is a film quality evaluation method according to the present invention. FIGS. 4a and 4b are auxiliary cross-sectional views and power supply circuit diagrams for explaining the film quality evaluation method according to the present invention. In the figure, 1 is a Si substrate (semiconductor substrate), 2 is a
SiO 2 film (first insulating film), 23 is a double-layer insulating film, 3
is a Si 3 N 4 film (second insulating film), 42 is a pinhole defect in the SiO 2 film, 43 is a pinhole defect in the Si 3 N 4 film, 5 is a nematic liquid crystal film, 6 is a transparent conductive film, and 7 is a glass plate. , 8 is a DC power supply, 9 is a dynamic scattering mode generation region, and 100 is a sample to be evaluated. Note that the same reference numerals in the figures indicate the same or corresponding parts.

Claims (1)

【特許請求の範囲】[Claims] 1 半導体基板または導電性基板の上に第1の絶
縁膜、第2の絶縁膜が順次形成された二層絶縁膜
の上記第2の絶縁膜上にネマチツク液晶膜を形成
し、このネマチツク液晶膜に透明導電膜を接触さ
せた後、上記第1および第2の絶縁膜のうち第1
の絶縁膜のみが存在する場合に上記ネマチツク液
晶膜が全面にわたつて動的散乱モードとなる第1
の直流電圧または第2の絶縁膜のみが存在する場
合に上記ネマチツク液晶膜が全面にわたつて動的
散乱モードとなる第2の直流電圧を上記半導体基
板または上記導電性基板と上記透明導電膜との間
に印加し、上記第1の直流電圧および上記第2の
直流電圧のそれぞれに対して上記二層絶縁膜上の
上記ネマチツク液晶膜が動的散乱モードとなる箇
所を観測してその観測結果を対比することを特徴
とする絶縁膜の膜質評価法。
1. A nematic liquid crystal film is formed on the second insulating film of a two-layer insulating film in which a first insulating film and a second insulating film are sequentially formed on a semiconductor substrate or a conductive substrate. After bringing the transparent conductive film into contact with the transparent conductive film, the first of the first and second insulating films is
When only an insulating film exists, the nematic liquid crystal film becomes in a dynamic scattering mode over the entire surface.
or a second DC voltage at which the nematic liquid crystal film enters the dynamic scattering mode over the entire surface when only the second insulating film is present, is applied to the semiconductor substrate or the conductive substrate and the transparent conductive film. Observe the locations where the nematic liquid crystal film on the two-layer insulating film enters the dynamic scattering mode with respect to each of the first DC voltage and the second DC voltage applied during A method for evaluating the film quality of an insulating film, which is characterized by comparing.
JP4345578A 1978-04-12 1978-04-12 Appreciation method of film quality of insulating film Granted JPS54134986A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4345578A JPS54134986A (en) 1978-04-12 1978-04-12 Appreciation method of film quality of insulating film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4345578A JPS54134986A (en) 1978-04-12 1978-04-12 Appreciation method of film quality of insulating film

Publications (2)

Publication Number Publication Date
JPS54134986A JPS54134986A (en) 1979-10-19
JPS6145771B2 true JPS6145771B2 (en) 1986-10-09

Family

ID=12664168

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4345578A Granted JPS54134986A (en) 1978-04-12 1978-04-12 Appreciation method of film quality of insulating film

Country Status (1)

Country Link
JP (1) JPS54134986A (en)

Also Published As

Publication number Publication date
JPS54134986A (en) 1979-10-19

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