JPS6148780B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device container, and particularly to a semiconductor device container in which electrical insulators are formed in a layered structure.

In recent years, there are cases in which a semiconductor device is used for, for example, optical fiber communication by housing a semiconductor element chip in a container having a laminated ceramic structure. In such a case, it is necessary to irradiate the center of the element chip with a light beam. Furthermore, in the diode array structure, it is necessary to accurately position not only the center but also the directionality of the chip.

However, the conventional laminated ceramic container has three ceramic layers (first layer 1, second layer 2, and third layer 3) laminated as shown in the plan view in Figure 1a and the cross-sectional view in Figure 1b. , a first metal layer 4 on which a semiconductor chip is to be attached at the center of the surface of the first layer;
A second metal layer 5 extends from the surface of the layer to the bottom of the first layer via the side surface and contributes to bonding wire connection for electrical connection with the chip and electrical connection with external lead terminals 6. have When placing a chip in a container having such a structure, use a microscope to place the chip on the ceramic layer 1 using the outer periphery or inner periphery of the third ceramic layer 3 shown in FIG. 1a as a reference.
It was mounted on the upper metal layer 4. Therefore, the third
An error occurred in the focal length of the microscope by the thickness of layer 3 and second layer 2, making it extremely difficult to place the chip accurately in the center of the container. In particular, in optical fiber communications, etc., a container is installed in an optical communication system using the outer periphery of the container as a reference, and a light beam is irradiated from outside the container to the chip inside the container, so the position of the chip may shift relative to the outer periphery of the container. However, in the case where the chip was used, there was a drawback that the light beam could not be irradiated accurately to the center of the chip. The accuracy of chip displacement for normal light beam irradiation is required to be several tens of microns or less.

SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor device container in which a chip can be placed without misalignment with respect to a reference line on the outer periphery of the container.

In order to achieve the above object, the basic structure of the semiconductor device container of the present invention is that, in the semiconductor device container obtained by laminating electrical insulators, a semiconductor device chip is placed on the first main surface of the insulator. A positioning mark for mounting the semiconductor element chip is provided.

According to the semiconductor device container of the present invention, since positioning marks for placement are provided on the surface of the insulator on which the semiconductor chip is to be placed, it is possible to determine the placement position on the container using a microscope. It is possible to ensure a focal length with no errors. Therefore, the chips can be accurately placed in the center of the container without causing any displacement.

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

FIG. 2 shows an embodiment of the present invention.
A represents a plan view, and b represents a perspective view.

In the figure, three layers of electrical insulators (ceramics in this embodiment) 10, 11, and 12 are laminated, and on the surface of the lower ceramic layer 10 there is a metallized layer 15 for mounting a semiconductor chip and a chip positioning mark 16. is formed, and furthermore, a metal pattern 1 is formed on the surface of the intermediate ceramic layer 11 as a bonding line connection area from the electrode pad on the chip.
External lead terminals 14 are provided extending to the bottom of the ceramic layer 10 via the side surfaces of the intermediate ceramic layer 11 and the lower ceramic layer 10.
electrically and mechanically connected to the Furthermore, a reference position mark 17 is provided at the end of the lower ceramic layer 10.
is formed, and openings 1 are provided in the intermediate and upper ceramic layers 11 and 12 so that the mark 17 is visible.
8 is provided. Here, lower ceramic layer 1
The metallized layer 15 for mounting a chip, the positioning mark 16, and the reference position mark 17 provided on the substrate 0 are formed in the same process. That is, the positioning mark 16 and the reference position mark 17 can be formed at the same time as forming the metal thin film on the entire surface of the lower ceramic layer 10 by vapor deposition or the like, and then forming the chip placement pattern 15 by etching or the like. . This can be done by simply changing the etching mask pattern. Further, the positioning mark 16 may be one having a convex portion or a concave portion in the cross direction as shown in FIG. That's fine.

In this way, according to this embodiment, since the chip placement positioning mark 16 is provided on the same plane as the chip placement surface, the focus of the microscope is set using this positioning mark 16 as a reference when placing the chip. If you align them, you can place the chips accurately in the center of the container. Furthermore, after the chip is mounted, a mask sheet is provided to cover the upper ceramic layer 12 to protect the semiconductor chip from the external atmosphere, and in some cases, this mask sheet is made of metal to provide a ground potential. In particular, if a shielding effect is provided, the chip installed inside the container will be difficult to see from the outside. however,
The chip position can be easily determined by the reference position mark 17 provided at the end of the container, that is, the end of the lower ceramic layer 10, which is on the same plane as the chip mounting surface, and the chip position can be easily determined, and the light beam can be accurately directed in optical fiber communication, etc. Chips can be irradiated.

In addition, when cutting the ceramic sheet to divide it into containers after laminating the three ceramic layers 10, 11, and 12, the reference position mark 17 can be used as a cutting positioning mark, so that the relative position of the chip to the outer periphery of the container can be adjusted at the time of cutting. It can be divided into individual containers without positional errors.

FIG. 3 shows still another embodiment of the present invention, in which a shows a side sectional view and b shows a perspective view. In the figure, two upper and lower ceramic layers 20 and 21 are laminated, and a metal pattern 25 for placing a chip, a chip positioning mark 25, a reference position mark 26, an external lead terminal 22, and a connecting part 23 are provided on the lower ceramic layer 20. It is a structure.

Also in the figure, it is clear that each metal pattern on the lower ceramic layer 20 is obtained by the same process and has the effects described above. Further, in this embodiment, since the upper ceramic layer 21 is formed smaller than the lower ceramic layer 20, an opening for detecting the reference position mark is not required.

As described above, according to the present invention, since the chip placement positioning mark is provided on the same surface as the chip placement surface, the center of the container can be accurately positioned without causing an error in the focal length (depth of focus) of the microscope, etc. Chips can be placed on the container, and even after the container is hermetically sealed, the container can be cut and the light beam can be irradiated using the reference mark at the end of the container as a reference. can be eliminated.

Furthermore, if a semiconductor element chip is placed in alignment with the chip positioning mark, the center and direction of the element will automatically be aligned at a certain position and direction with respect to the outer periphery of the container and the reference mark, making it easier to attach the container to optical equipment, etc. It is only necessary to attach the reference mark so that it is in a fixed position, and it can be adjusted very easily.

Further, the shape and position of the tip positioning mark and reference mark may be freely designed without being limited to this embodiment, and when the container is assembled so that the relative position of the tip with respect to the outer periphery of the container is maintained constant. In this case, it is sufficient to irradiate a light beam or the like with reference to the outer periphery of the container, and in this case, a reference mark is unnecessary.

[Brief explanation of the drawing]

FIG. 1 shows a conventional semiconductor device container, and FIG. 2 shows an embodiment of the present invention, and FIG. The figures show another embodiment, and FIGS. 4a and 4b show a cross-sectional view and a perspective view, respectively, and FIGS. 4a and 4b show an embodiment of the chip positioning mark and chip placement part of the present invention. 1, 2, 3, 10, 11, 12, 20, 21...
... Ceramic layer, 4, 15, 24... Chip placement part, 5, 13, 23... External lead terminal connection part,
6, 14, 22... External lead terminal, 18... Opening part, 17, 26... Reference mark, 16, 25...
...Chip positioning mark.

Claims (1)

[Claims] 1. In a semiconductor device container obtained by laminating electrical insulators, a metallized layer is provided on the main surface of the insulator on which a semiconductor chip is placed, and each line of the cross line passing through the center of the metallized layer is provided. Convex or concave positioning marks for placing the semiconductor chip are provided along the main surface, and position reference marks used after the semiconductor chip is sealed are provided at each of the four corners of the main surface. A semiconductor device container.