JPS6153745B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to a swap-type buffer storage control method that intentionally destroys stored data if a failure occurs during data storage from buffer storage to main storage. It is something.

Technical Background When processing data in a computer, it is rare that all the data in the main storage is used evenly, and there are many cases where some data is repeatedly used temporarily. Therefore, it is convenient to store recently used data in another small-capacity storage instead of storing it in the main storage each time.
This is a swap-type buffer storage, and the operation of storing new data from the main storage to the buffer storage is performed by a move-in cycle, and the storage operation in the opposite direction is performed by a move-in cycle.
It is done in an out-cycle.

Prior Art and Problems In such swap-based buffer storage, even if a failure that affects the store cycle of a swap operation occurs, the store address does not necessarily match the address space being used by the program currently being executed. Therefore, even if the software is notified, it cannot be easily processed. For example, if you want to use data that is not on the buffer storage, you should eject unnecessary data from the buffer storage to the main storage and import the necessary data from the main storage instead. is running in an unrelated address space, so even if the software is notified that an error has been detected in the evicted data, no appropriate action will be taken.

OBJECTS OF THE INVENTION In the present invention, when an error is detected during a store cycle from buffer storage to main storage, subsequent processing is continued by simply intentionally making the store data incorrect, and error processing is left to the subsequent processing.

Composition of the Invention The present invention provides a swap-type buffer storage control method in which part of the data stored in the buffer storage is returned to the main memory and new data is stored in the vacant storage area. When a failure occurs during a store cycle to the storage, the stored data is irreparably destroyed and stored in the main storage, and then when the data is read from the main storage, error handling is performed. This will be explained in detail with reference to the illustrated embodiment.

Embodiment of the invention The drawing is a lock diagram showing an embodiment of the invention.
is buffer storage (BS), 2 is error correction code (ECC) generation circuit, 3 is store data (SD) register, 4 is main storage (MS), 5 is fetch data (FD) register, 6 is single error correction ( SEC)/Double Error Detect (DED) type ECC circuit, 7 and 8 are exclusive OR (EOR) gates. The store data read from the BSI is temporarily stored in the register 3, and at this time an error correction code ECC by the ECC generation circuit 2 is added. Since the EOR gates 7 and 8 are in a through state when the error detection signal ERR is 0 during normal operation, the data SD in the register 3 is stored as is in the MS4, while the data read out from the MS4
The FD is fetched into the BSI through the register 5 and the ECC circuit 6. At this time, the ECC circuit 6 corrects a 1-bit error and notifies the program of 2-bit or more errors as an uncorrectable error.

The above operation is the same as the conventional one, but in this example, even if an error or failure is detected in the store cycle, the program is not notified of it, and the store data is intentionally made erroneous by 2 bits and stored in the MS4. Specifically, the level of the error detection signal ERR is set to 1, and the EOR gates 7 and 8 invert 2 bits in the store data (deliberately make them erroneous). This 2-bit error is only noticeable when the same data or MS4 is read out next time, but this does not pose a particular problem. Since the program that was running at this time is not notified of the error, it does not stop, and continues to run through the steps. After that, when the data stored with the above 2-bit error is read out from the MS4 (I don't know when, but this is when the program is run), the ECC circuit 6 detects the 2-bit error mentioned above. Detect errors. Since the address space used by the program in this fetch cycle is related to the storage address space for the data with the 2-bit error, error handling is easy. This error cannot be corrected with ECC, so
Error handling involves separating the space, dropping the job using it, etc.

In addition, in this example, the ECC circuit 6 for double error detection
Since this is used, a 2-bit error occurs in gates 7 and 8, but if the error detection configuration is different from this, data destruction is performed in accordance with the configuration. For example, in a system that simply adds a parity bit in units of bytes, it is sufficient to cause a 1-bit error in the stored data.

Effects of the Invention As described above, according to the present invention, even if a failure occurs during data storage from the buffer storage to the main storage in a computer system that uses swap-type buffer storage, the error handling is performed as follows. This is done when the same data is retrieved from the main storage, so there is no problem with operation for the time being, and error handling becomes easier.

[Brief explanation of the drawing]

The drawing is a block diagram showing one embodiment of the present invention. In the figure, 1 is a buffer storage, 4 is a main storage, 6 is an ECC circuit, and 7 and 8 are gate circuits for destroying stored data.

Claims (1)

[Claims] 1. In a swap-type buffer storage control method in which a part of buffer storage data is returned to the main memory and new data is stored in the free storage area, a store cycle from the buffer storage to the main storage is performed. Swap-type buffer storage control characterized in that when a failure occurs, stored data is irreparably destroyed and stored in the main storage, and then error handling is performed when the data is read from the main storage. Method.