JPS6155683B2 - - Google Patents

Description

[Detailed Description of the Invention] (a) Description of the Technical Field The present invention relates to a storage device having a battery backup memory used in a computer system, and particularly takes into account protection in the event of abnormal battery voltage and battery maintenance during operation. Regarding storage devices.

(b) Description of the Prior Art In recent years, battery backup memories, which use batteries to retain data during power outages, have been used as writable storage devices used in computer systems.

FIG. 1 is a block diagram showing the structure of a conventional general battery backup memory. 1 is a data bus, 2 is an address bus and control signals,
3 is a control signal from the control circuit 4 that operates the bus driver 5; 6 is a control signal and an address signal for the memory device 7; 8 is a data signal for the memory device 7; 9 is a power source for the memory device 7 for battery backup; 10 is a control signal for operating the bus driver 5; battery, 11 is the power supply circuit, Vcc is the power supply of the computer system, 12 is the battery 10
A voltage detection circuit detects a voltage abnormality in the circuit, and reference numeral 13 indicates its detection signal.

In the figure, a control circuit 4, a bus driver 5, and a memory element 7 operate under the management of an address bus and a control signal 2, similar to a general computer. The power supply circuit 11 switches between the power supply Vcc to the computer system and the battery 10, and is switched to the battery side in the event of a power outage.

In this conventional battery backup memory, if there is an abnormality in the battery 10 and the computer system operates with the contents of the memory element 7 lost, it would be dangerous, so a voltage detection circuit 12 is provided to check the battery voltage. Detection signal 13
The computer system is prevented from malfunctioning by reading the data as input data and checking the data using the computer system software.

However, this conventional method has the disadvantage that when replacing an existing core memory, wire memory, etc., it requires the addition of an input point for reading the detection signal 13 and software for processing the read data.

(c) Object of the Invention The object of the present invention has been made in view of the above-mentioned drawbacks, and is a means of preventing malfunctions due to battery voltage abnormalities, which eliminates the need to read voltage abnormality detection signals as input data, and provides a voltage detection system that eliminates the need to read voltage abnormality detection signals as input data. An object of the present invention is to provide a battery backup memory storage device that does not require special software for storage.

(d) Structure of the Invention FIG. 2 shows an embodiment of the battery backup memory according to the present invention, and the same parts as in FIG.

In the figure, 14 is a system reset signal output when the computer system is powered on, LEVL15 is a voltage level signal of the battery 10, and STS13 is a status signal obtained by converting the voltage level signal 15 determined by the voltage detection circuit 12 into a logic signal. , LS16 is a latch signal in which the status signal STS13 is held in the latch circuit 17 by the reset signal 14, and PE18 is an output control signal of the parity error logic circuit 19.

FIG. 3 is a timing chart illustrating the operation of the present invention in FIG. 2. In the figure, ref indicates a reference voltage for voltage drop determined by the voltage detection circuit 12.

(e) Effect of the Invention In FIG. 2, when the computer system is not operating, that is, when the computer system power supply Vcc is not supplied, the data in the memory element 7 is transferred from the battery 10 through the power supply circuit 11. A voltage necessary for storage is applied from a power supply 9 to the memory element 7. When the power supply Vcc of the computer system is supplied, power supply circuit 1
1 automatically turns on the computer system.
The point of switching to the Vcc side is the same as the case in FIG.

If an abnormality occurs in the battery 10 such as a voltage drop, the data content of the memory element 7 is no longer guaranteed in the event of a power outage. If there is such an abnormality,
The computer system is powered on at time _t1 , and the system reset signal 14 is activated at time _t2.
At the time when the latch is released, the latch circuit 17 holds the status signal STS13 indicating that the voltage level signal LEVL15 of the battery 10 is lower than the voltage drop reference signal ref shown in FIG. 3, and the state of the latch signal LS16 is determined. Next, a parity error output control signal PE18 of the parity error logic circuit 19 is outputted from the latch signal LS16, and a certain parity error output control signal PE18 is output from the control circuit 4 through the bus driver 5 in response to a data read request from the computer. Only data corresponding to the following data is output to data bus 1 of the computer system.

Therefore, the computer side detects a parity error and stops execution, so there is no risk of runaway or malfunction.

Also, in the above state, the battery is 10 at time _t3 .
Even if the battery 10 is removed and a new normal battery 10 is inserted at time _t4 , the latch signal LS16 does not change, so operation cannot be started.

Therefore, the computer does not read the contents of the memory device 7 and start execution while the contents of the memory device 7 are uncertain.

Furthermore, even if the battery 10 is normal, if the battery 10 is to be replaced due to periodic maintenance, the battery 10 will be replaced while the contents of the memory element 7 are saved while the computer system is operating, using the reverse logic as described above. Can be exchanged.

(f) Effects of the Invention As explained above, the battery backup memory according to the present invention has a protection circuit against battery voltage abnormalities, and does not require special software for voltage detection and can be used with existing cores.・It can be used in the same way as memory, wire memory, etc.

Further, since the battery can be easily replaced while the data in the memory element is preserved, it is possible to provide a storage device that is easy to maintain.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a conventional battery backup memory, FIG. 2 is a block diagram showing a battery backup memory according to an embodiment of the present invention, and FIG. 3 is a block diagram showing a battery backup memory according to an embodiment of the present invention. This is a timing chart. 1...Data bus, 2...Address bus and control signal, 3...Control signal, 4...Control circuit, 5...
... bus driver, 6 ... control signal and address signal, 7 ... memory element, 8 ... data signal, 9 ...
...Power supply, 10...Battery, 11...Power supply circuit,
12... Voltage detection circuit, 13... Voltage detection status signal, 14... Reset signal, 15... Battery voltage level signal, 16... Latch signal, 1
7... Latch circuit, 18... Parity error control signal, 19... Parity error logic circuit.

Claims (1)

[Scope of Claims] 1. In a storage device that uses a battery to retain data during a power outage, a voltage detection circuit for detecting voltage abnormality of the battery is provided, and a detection signal of the voltage detection circuit is detected at the timing when the power is turned on. A storage device equipped with a holding circuit that rewrites and holds data. 2. In a storage device that uses a battery to retain data during a power outage, a voltage detection circuit is provided to detect an abnormal voltage of the battery, and when this voltage detection circuit detects an abnormal voltage of the battery, the system data is A storage device equipped with a parity error logic circuit that generates a parity error in response to a read request.