JPS6155798B2 - - Google Patents

Description

[Detailed Description of the Invention] The present invention relates to an IC used in electronic equipment such as a computer.
Or, it relates to a method for forming wiring connection holes in a high-density multilayer wiring board for LSI mounting.

Conventional connection holes for multilayer wiring are made by screen-printing an insulating paste on a board with a conductor pattern through silk or stainless steel mesh so that the connection part with the upper layer conductor of the conductor pattern can be removed, then drying it and heating it at high temperature. It is formed by firing and sintering the insulating paste.

However, in this forming method, screen printing is performed through silk or stainless steel mesh, so for patterns with a wide printing area such as insulating layers, the connection hole size is about 200 μφ (micron diameter) in mass production. This is the limit, and smaller dimensions are difficult. For this reason, there is a drawback that the wiring pattern cannot be made high-density. Furthermore, since the control of the connection hole size and the leveling time after printing is strictly regulated depending on the characteristics of the insulating paste, there is also the drawback that pinhole defects occur in the insulating layer.

An object of the present invention is to provide a method for forming connection holes for high-density multilayer wiring, which can achieve high density and has extremely few pinhole defects in the insulating layer.

The forming method of the present invention includes a first step of applying a photoresist to the surface of a heat-resistant insulating substrate having a conductor pattern, and then selectively removing the photoresist other than the connection portion with the upper layer conductor; A second step of printing an insulating paste over the entire surface of the board formed in the step and drying it, and applying a photoresist to the entire surface of the board formed in the second step and applying it to the connection part with the upper layer conductor. The third step is to selectively remove the photoresist and at the same time also remove the semi-solid insulating paste in this area.
and a fourth step of incinerating the photoresist and sintering the semi-solid insulating paste by firing the substrate formed in the third step at a high temperature.

Next, the present invention will be explained in detail with reference to the drawings.

1 to 6 show process cross-sectional views for explaining one embodiment of the method for forming connection holes for high-density multilayer wiring according to the present invention.

In the first step shown in FIG. 1, gold (Au), silver/palladium (Ag/
A conductive paste such as Pb) or copper (Cu) is printed, and a conductive pattern 2 having a desired pattern is formed by high-temperature firing or selective partial plating. In the second step shown in FIG. 2, the photoresist 3 is formed only on the portion of the conductor pattern 2 that connects to the upper layer conductor (the portion that will become a connection hole in the step described later).

That is, a photoresist is applied to the entire surface of the heat-resistant insulating substrate 1 and the conductive pattern 2 shown in FIG. 1, and only desired areas are irradiated with light energy through a mask (not shown) for exposure and development. By this, the photoresist 3 can be formed. In the third step shown in Fig. 3, the insulating paste is printed so as to cover all of the substrate surfaces 1 and 3 shown in Fig. 2, and after sufficient leveling, it is heated at 100°C to 120°C for 10 to 15 minutes. Dry about
A semi-solid insulating paste 4 is formed. Note that in this step, since leveling after printing can be carried out over a sufficient amount of time, pinhole defects can be suppressed as much as possible.

In the fourth step shown in FIG. 4, a photoresist 5 is applied to the surface of the semi-solid insulating paste 4.

In the fifth step shown in FIG. 5, only desired portions of the photoresist 5 are irradiated with light energy through a mask (not shown), and then an organic solvent such as 1.1.1 trichloroethane is used. As a result, the connection hole portion of the photoresist 5 is removed. At the same time, the semi-solid insulating paste 4 in this portion is also removed to form the connection hole 6. In this step, it is difficult to control the removal of the semi-solid insulating paste 4, and for example, it is practically impossible to uniformly drill the many connection holes scattered within the same substrate. As a result, variations within the board become a problem, such as connection holes being extremely gouged in some areas but not completely removed in other areas. Therefore, if all numbers were to be completely removed, some parts would become very large.

For this reason, it is possible to avoid this problem by increasing the size of the connection hole or by increasing the spacing between the wiring patterns, but this becomes a major obstacle to higher density.

Therefore, by forming the photoresist 3, over-removal of the semi-solid insulating paste 4 is minimized, making it possible to form more uniform connection holes, and preventing shorts with adjacent wiring patterns. In addition, the hole diameter and wiring pattern pitch can be significantly miniaturized, making it suitable for high-density applications.

Furthermore, since the semi-solid insulating paste 4 is removed at the same time as the photoresist 5 is developed, the thinner the insulating paste is, the more uniformly shaped the connection hole can be formed. Another reason for forming the photoresist 3 is that if you remove the insulating paste directly above the photoresist 3 in FIG.
This means that it is possible to form an insulating layer that is thicker by the thickness of , making it possible to reduce pinhole defects.

This is because the photoresist 3 is incinerated by high-temperature firing in the next step and is lost.

In the sixth step shown in FIG. 6, the substrates 1 to 5 shown in FIG. is sintered to form an insulating layer 7 having a connection hole 6 with the upper layer conductor. The present invention has the advantage that dimensional accuracy can be improved to achieve higher density, and pinhole defects in the insulating layer can be reduced to an extremely low level.

[Brief explanation of the drawing]

1 to 6 are process sectional views showing one embodiment of the present invention. 1 to 6, 1...heat-resistant insulating substrate, 2...conductor pattern, 3...photoresist, 4
... Insulating paste in semi-solid state, 5... Photoresist, 6... Connection hole with upper layer conductor, 7... Insulating layer having connection hole.

Claims (1)

[Scope of Claims] 1. A first step of applying a photoresist to the surface of a heat-resistant insulating substrate having a conductor pattern and then selectively removing the photoresist in areas other than the connection portion with the upper layer conductor; A second step of printing an insulating paste over the entire surface of the board formed in the step and drying it, and applying a photoresist to the entire surface of the board formed in the second step and applying it to the connection part with the upper layer conductor. The third step is to selectively remove the photoresist and at the same time also remove the semi-solid insulating paste in this area.
and a fourth step of incinerating the photoresist and sintering the semi-solid insulating paste by firing the substrate formed in the third step at a high temperature. A method for forming connection holes for high-density multilayer wiring.