JPS6159530B2 - - Google Patents
Info
- Publication number
- JPS6159530B2 JPS6159530B2 JP57118939A JP11893982A JPS6159530B2 JP S6159530 B2 JPS6159530 B2 JP S6159530B2 JP 57118939 A JP57118939 A JP 57118939A JP 11893982 A JP11893982 A JP 11893982A JP S6159530 B2 JPS6159530 B2 JP S6159530B2
- Authority
- JP
- Japan
- Prior art keywords
- contact
- photoresist
- wafer
- terminal
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
Landscapes
- Measuring Leads Or Probes (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Description
【発明の詳細な説明】
本発明は半導体ウエフアーのテストに用いるプ
ローブカードの製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a probe card used for testing semiconductor wafers.
中心部に顕微鏡による観察のための穴を有する
絶縁基板に、その穴を取り囲んで放射状に探針を
配設した従来形式のプローブカードは、その製造
に当たつて、上記の穴から、その下に置かれたテ
ストすべき半導体ウエフアーの端子、または、端
子の配列位置を画いた図形を観察しながら、探針
の先端がウエフアーの端子の配列位置に一致する
よう、各探針の位置調整を行う必要がある。この
作業は、特に最近、ウエフアーの端子数が増大す
るにおよんで、ますます長時間を要する複雑な作
業となりつつあるだけでなく、このような方法で
製造されたプローブカードは、取り扱い上の僅か
な不注意により探針の位置が変わり、探針位置の
再調整を要するなどの欠点がある。 Conventional probe cards have an insulating substrate with a hole in the center for microscopic observation, and probes are arranged radially surrounding the hole. Adjust the position of each probe so that the tip of the probe matches the arrangement position of the terminals on the wafer while observing the terminals of the semiconductor wafer to be tested placed on the wafer or the diagram depicting the arrangement position of the terminals. There is a need to do. Not only is this process becoming more and more time-consuming and complex, especially as the number of terminals on wafers increases, but probe cards manufactured in this way are also less difficult to handle. There are disadvantages such as the position of the probe changes due to carelessness, requiring readjustment of the probe position.
本発明は、以上のような欠点を取り除き、ウエ
フアーの端子数や、端子配列パターンの複雑性に
関係なく一定の作業工程で、ウエフアー端子への
接触片間の相対的位置関係がずれることのない、
しかも、端子がバンプ型であつても接触子に滑り
を生じない、プローブカードの製造方法を提供す
ることを目的としている。 The present invention eliminates the above-mentioned drawbacks and prevents the relative positional relationship between the contact pieces to the wafer terminals from shifting during a certain work process regardless of the number of terminals on the wafer or the complexity of the terminal arrangement pattern. ,
Moreover, it is an object of the present invention to provide a method for manufacturing a probe card in which the contacts do not slip even when the terminals are of a bump type.
以上の目的のために本発明は、フオトレジスト
を塗布した基板上にテストすべき半導体ウエフア
ーの端子パターンを焼き付けた後、端子パターン
部のフオトレジストを除去してそこに所定の厚さ
に金属を付着させてウエフアー端子への接触子を
形成する工程と、接触子にリード線を電気接続す
る工程と、上記リード線を外部に引き出した状態
で上記接触子を弾性体でモールドする工程と、弾
性体による接触子のモールド後、上記基板を除去
する工程と、上記接触子をモールドした上記弾性
体を所定の強度を有する板に固着する工程とから
成つている。 For the above purpose, the present invention involves baking a terminal pattern of a semiconductor wafer to be tested on a substrate coated with photoresist, then removing the photoresist in the terminal pattern area and depositing metal thereon to a predetermined thickness. a step of attaching the contact to the wafer terminal; a step of electrically connecting a lead wire to the contact; a step of molding the contact with an elastic body with the lead wire pulled out to the outside; After the contact is molded by the body, the method includes a step of removing the substrate, and a step of fixing the elastic body on which the contact is molded to a plate having a predetermined strength.
以下に本発明の実施例を図面に基づいて説明す
る。 Embodiments of the present invention will be described below based on the drawings.
まず、第1図に示すように、厚さ0.2mmの銅の
基板1、感光した部分が現像液に溶解するフオト
レジスト2として例えばコダツク社のマイクロレ
ジスト752を塗り、それにテストすべき半導体ウ
エフアーの端子パターン3を焼付けた後、現像し
て端子パターン部のフオトレジストを除去する。
この場合の焼付けは、端子パターン以外の部分を
感光させるように行う。第2図はこの段階におけ
る銅基板上のフオトレジストの付着状態を、第1
図のラインLに沿つた断面について示している。
次に、端子パターンを有する側から銅基板1に金
の電気メツキをほどこし、第3図に示すように、
端子パターン部3の所に金4を0.01〜0.005mmの
厚さに付着させてウエフアー端子への接触子4を
形成した後、第4図に示すように端子パターン部
以外の部分に残留するフオトレジスト2を溶剤、
例えばコダツク社のマイクロレジスト除去液を用
いて溶解除去し、接触子4にリード線5を熔接す
る。その後、接触子4のまわりに枠6を組み立
て、リード線5を外部に引き出した状態で枠6の
中へゴムを流し込んで固化させ、接触子を弾性体
7でモールドし、続いてその上にエポキシ樹脂を
流し込んで補強板8を固化形成し、その後で枠6
を取りはずす(第6図)。次に接触子の接触面が
充分に露出する程度に、四塩化炭素に弾性体をエ
ツチングする。これを第7図に示すようにガラス
エポキシ樹脂板9に固着して、本発明の製造方法
によるプローブカードが得られる。 First, as shown in Fig. 1, a copper substrate 1 with a thickness of 0.2 mm is coated with, for example, Kodak Microresist 752 as a photoresist 2 whose exposed areas are dissolved in a developer, and a semiconductor wafer to be tested is coated on it. After the terminal pattern 3 is baked, it is developed and the photoresist on the terminal pattern portion is removed.
In this case, the baking is performed in such a way that parts other than the terminal pattern are exposed to light. Figure 2 shows the adhesion state of the photoresist on the copper substrate at this stage.
A cross section taken along line L in the figure is shown.
Next, gold electroplating is applied to the copper substrate 1 from the side with the terminal pattern, as shown in FIG.
After depositing gold 4 to a thickness of 0.01 to 0.005 mm on the terminal pattern part 3 to form a contact 4 to the wafer terminal, the photo remaining on the part other than the terminal pattern part as shown in FIG. Resist 2 with solvent,
For example, it is dissolved and removed using a micro-resist removal solution manufactured by Kodak Co., Ltd., and the lead wire 5 is welded to the contact 4. Thereafter, a frame 6 is assembled around the contact 4, and with the lead wire 5 pulled out, rubber is poured into the frame 6 and solidified, the contact is molded with an elastic body 7, and then The reinforcing plate 8 is solidified by pouring epoxy resin, and then the frame 6
(Figure 6). Next, the elastic body is etched in carbon tetrachloride to the extent that the contact surface of the contact is sufficiently exposed. This is fixed to a glass epoxy resin plate 9 as shown in FIG. 7 to obtain a probe card according to the manufacturing method of the present invention.
以上のように、本発明によれば、テストすべき
ウエフアーの端子への接触子が、端子の数や配列
パターンの複雑性に関係なく、一定の写真焼付工
程を通じて得られ、接触子相互間にずれを生ずる
こともない。また、本発明に基づく方法で製造さ
れたプローブカードを用いれば、ウエフアーのテ
ストに当たつての、接触子とウエフアー端子との
間の位置整合に際しても、ウエフアーとプローブ
カードの2次元的位置関係を一度決定しておけば
よく、従来のプローブカードの場合のように、顕
微鏡により探針とウエフアー端子間の接触を、各
探針毎に監視、調整する必要がない。 As described above, according to the present invention, the contacts to the terminals of the wafer to be tested are obtained through a constant photoprinting process regardless of the number of terminals or the complexity of the arrangement pattern, and the contacts between the contacts are No deviation occurs. Furthermore, by using the probe card manufactured by the method based on the present invention, the two-dimensional positional relationship between the wafer and the probe card can be adjusted even when aligning the positions between the contacts and the wafer terminals during wafer testing. need only be determined once, and there is no need to monitor and adjust the contact between the probe and wafer terminal for each probe using a microscope, as is the case with conventional probe cards.
第1図は本発明実施例において、半導体ウエフ
アーの端子の配列を銅基板上のフオトレジストに
焼き付けた状態を示す図である。第2図は第1図
に示した基板上のフオトレジストに現像を行つた
状態を示す断面図、第3図は第2図に示す現像さ
れた端子パターンに、ウエフアー端子への接触子
となる金属を付着させた状態を示す図、第4図は
接触子にリード線を接続すると共に、銅基板上の
残留フオトレジストを除去した状態を示す図であ
る。第5図は接触子を弾性体でモールドし補強板
を設ける過程を説明するための図である。第6図
は弾性体でモールドされ、補強板が設けられた接
触子のユニツトの断面を示す。第7図は本実施例
により製造されたプローブカードの断面を示す図
である。
1…銅基板、2…フオトレジスト、3…端子パ
ターン、4…接触子、5…リード線、6…枠、7
…弾性体、8…補強板、9…ガラスエポキシ樹
脂。
FIG. 1 is a diagram showing a state in which the arrangement of terminals of a semiconductor wafer is printed onto a photoresist on a copper substrate in an embodiment of the present invention. Figure 2 is a cross-sectional view showing the developed photoresist on the substrate shown in Figure 1, and Figure 3 shows the developed terminal pattern shown in Figure 2, which will become a contact to the wafer terminal. FIG. 4 shows a state in which metal is attached, and FIG. 4 shows a state in which lead wires are connected to the contacts and the remaining photoresist on the copper substrate is removed. FIG. 5 is a diagram for explaining the process of molding the contact with an elastic body and providing a reinforcing plate. FIG. 6 shows a cross section of a contact unit molded with elastic material and provided with a reinforcing plate. FIG. 7 is a diagram showing a cross section of a probe card manufactured according to this example. DESCRIPTION OF SYMBOLS 1...Copper board, 2...Photoresist, 3...Terminal pattern, 4...Contactor, 5...Lead wire, 6...Frame, 7
... Elastic body, 8... Reinforcement plate, 9... Glass epoxy resin.
Claims (1)
べき半導体ウエフアーの端子パターンを写真焼付
した後、上記端子パターンのフオトレジストを除
去してその部分に上記基板の表面を露出させ、そ
こへ所定の厚さに金属を付着させて上記半導体ウ
エフアーの端子への接触子を形成し、上記接触子
にリード線を電気接続した上、上記リード線を外
部に引き出した状態で上記接触子を弾性体でモー
ルドすると共に上記基板を除去し、上記接触子を
モールドした上記弾性体を所定の強度を有する板
に固着させることによりプローブカードを形成す
るプローブカードの製造方法。1 After photoprinting the terminal pattern of the semiconductor wafer to be tested on a substrate coated with photoresist, the photoresist of the terminal pattern is removed to expose the surface of the substrate in that area, and a predetermined thickness is applied thereto. A contact to the terminal of the semiconductor wafer is formed by attaching metal to the semiconductor wafer, a lead wire is electrically connected to the contact, and the contact is molded with an elastic material while the lead wire is pulled out. and a method of manufacturing a probe card, which comprises removing the substrate and fixing the elastic body having the contact molded thereon to a plate having a predetermined strength.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57118939A JPS599935A (en) | 1982-07-07 | 1982-07-07 | Manufacture of probe card |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57118939A JPS599935A (en) | 1982-07-07 | 1982-07-07 | Manufacture of probe card |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS599935A JPS599935A (en) | 1984-01-19 |
| JPS6159530B2 true JPS6159530B2 (en) | 1986-12-17 |
Family
ID=14748965
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57118939A Granted JPS599935A (en) | 1982-07-07 | 1982-07-07 | Manufacture of probe card |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS599935A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3128199B2 (en) * | 1996-06-28 | 2001-01-29 | 信越ポリマー株式会社 | Inspection probe |
-
1982
- 1982-07-07 JP JP57118939A patent/JPS599935A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS599935A (en) | 1984-01-19 |
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