JPS6218094B2 - - Google Patents
Info
- Publication number
- JPS6218094B2 JPS6218094B2 JP11223480A JP11223480A JPS6218094B2 JP S6218094 B2 JPS6218094 B2 JP S6218094B2 JP 11223480 A JP11223480 A JP 11223480A JP 11223480 A JP11223480 A JP 11223480A JP S6218094 B2 JPS6218094 B2 JP S6218094B2
- Authority
- JP
- Japan
- Prior art keywords
- relay
- contact
- coil
- resistor
- relays
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000010586 diagram Methods 0.000 description 3
- 125000004122 cyclic group Chemical group 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K23/00—Pulse counters comprising counting chains; Frequency dividers comprising counting chains
- H03K23/74—Pulse counters comprising counting chains; Frequency dividers comprising counting chains using relays
Landscapes
- Relay Circuits (AREA)
Description
【発明の詳細な説明】
本発明は、リレーをスイツチ要素とするパルス
分周回路に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a pulse frequency dividing circuit using a relay as a switch element.
従来から、遠方監視制御システムにおけるサイ
クリツク式信号伝送装置では、サイクリツク伝送
させるためにパルス信号をラツチ回路に保持した
り、あるいは入力パルス信号の１サイクル毎に
「１」→「０」、「０」→「１」に変化するパルス
分周回路が使用されている。こうしたパルス分周
回路や一般の制御継電器に使用されるリレーをス
イツチ要素とする分周回路の従来回路は第１図に
示す構成にされていた。 Conventionally, in cyclic signal transmission devices used in remote monitoring and control systems, pulse signals are held in latch circuits for cyclic transmission, or the pulse signals are changed from "1" to "0" and "0" every cycle of the input pulse signal. → A pulse frequency divider circuit that changes to “1” is used. Conventional circuits of such pulse frequency divider circuits and frequency divider circuits using relays as switch elements used in general control relays have the configuration shown in FIG.
第１図において、リレーＡは、メークビフオア
ブレーク（コンチニユアス）接点A1とａ接点の
出力接点A2を有し、接点A1のメーク側を経て正
極Ｐ側に接続され抵抗R1を経て負極Ｎ側に接続
される。一方、リレーＢは切換（トランスフア）
接点B1を有し、接点A1のメーク側を経て正極Ｐ
側に接続され、抵抗R2を経て負極Ｎ側に接続さ
れ、切換接点B1は抵抗R1，R2と夫々のリレー
Ａ，Ｂ側接続点に固定接点が接続されて可動接点
が接点A1のブレーク側に接続されると共にパル
ス入力接点（もしくはスイツチ）Ｃを経て正極Ｐ
側に接続される。 In Fig. 1, relay A has a make-before-or-break (continuous) contact A 1 and an output contact A 2 which is an a contact, and is connected to the positive terminal P side via the make side of contact A 1 and is connected to the positive terminal P side via a resistor R 1 . Connected to the negative pole N side. On the other hand, relay B is switched (transfer)
It has contact B 1 , and the positive electrode P passes through the make side of contact A 1 .
The switching contact B 1 is connected to the negative pole N side via the resistor R 2 , and the fixed contact is connected to the resistors R 1 and R 2 and the connection points of the relays A and B, respectively, and the movable contact is the contact A. Connected to the break side of 1 and connected to the positive terminal P via pulse input contact (or switch) C
connected to the side.
この構成において、図示状態からパルス入力接
点Ｃの１回目のメークにはリレーＡが付勢される
がリレーＢは接点B1によつて両端が同電位にあ
つて付勢されない。そして、リレーＡの付勢で接
点A2がメーク及び接点A1がメークされた後のブ
レーク動作にはリレーＡは付勢継続されて自己保
持され、リレーＢは復帰状態に維持される。この
状態は接点Ｃの復帰でリレーＡは自己保持される
が、リレーＢは付勢されて切換接点B1が図示状
態から切換わる。接点Ｃの２回目のメークにはリ
レーＡが復帰して接点A1，A2が図示状態に戻
り、リレーＢは接点Ｃを経て付勢の継続され、接
点Ｃが復帰することで該リレーＢは消勢されて接
点B1が図示の状態に戻り、上述の初期状態に戻
る。従つて、接点Ｃの２回の操作でリレーＡの接
点A2が交互にメークとブレーク動作する分周回
路が実現される。 In this configuration, from the illustrated state, relay A is energized for the first make of pulse input contact C, but relay B is not energized because both ends thereof are at the same potential due to contact B1 . When relay A is energized, contact A 2 is made and contact A 1 is made, and in a break operation, relay A is kept energized and is self-held, and relay B is maintained in the reset state. In this state, when contact C returns, relay A is self-held, but relay B is energized and switching contact B1 is switched from the illustrated state. For the second make of contact C, relay A returns, contacts A 1 and A 2 return to the state shown in the figure, relay B continues to be energized via contact C, and as contact C returns, relay B is deenergized and contact B1 returns to the state shown, returning to the initial state described above. Therefore, by operating contact C twice, a frequency dividing circuit is realized in which contact A2 of relay A alternately performs make and break operations.
しかし、上述の従来回路は、リレーＡとして特
殊なコンチユニアス接点を必要とし、分周回路を
構成するのに一般のリレーに持たない極く限られ
た種類のリレーを用意する必要がある。従つて、
この分周回路を既設の装置に付加する場合や新た
に設計するにおいても、特殊なリレーを装着する
ための取付構造及び雰囲気を確保する必要がある
し、高価な分周回路になる欠点があつた。 However, the above-mentioned conventional circuit requires a special continuous contact as relay A, and it is necessary to prepare a very limited type of relay that is not included in a general relay to configure the frequency dividing circuit. Therefore,
When adding this frequency dividing circuit to existing equipment or designing a new one, it is necessary to secure a mounting structure and atmosphere for installing a special relay, and there is a drawback that it becomes an expensive frequency dividing circuit. Ta.
本発明の目的は、通常の接点を持つリレーを使
用して従来回路と同じ機能を持つ汎用性の高い分
周回路を提供するにある。 An object of the present invention is to provide a highly versatile frequency divider circuit that uses relays with ordinary contacts and has the same functions as conventional circuits.
第２図は本発明の一実施例を示す回路図であ
る。リレーＡは電源オン・オフ用のメーク接点
A1と出力用メーク接点A2を有し、リレーＢはト
ランスフア接点B1を有する。これらリレーＡ，
Ｂ及び入力用接点Ｃの接続関係は、リレーＡ，Ｂ
はその両端に並列に電源とは逆電極にダイオード
Di1，Di2を有し、リレーＡのメーク接点A1を経て
正極Ｐ側に一端が接続され、他端は夫々抵抗
R1，R2を経て負極Ｎ側に接続される。リレーＢ
のトランスフア接点B1はリレーＡ，Ｂと夫々の
抵抗R1，R2の接続点に固定接点が接続され、可
動接点は入力用接点Ｃを経て正極Ｐ側に接続され
る。 FIG. 2 is a circuit diagram showing one embodiment of the present invention. Relay A is a make contact for power on/off
The relay B has a make contact A 1 and an output make contact A 2 , and the relay B has a transfer contact B 1 . These relays A,
The connection relationship between B and input contact C is relay A, B.
is a diode in parallel with the opposite electrode from the power supply.
Di 1 and Di 2 , one end is connected to the positive electrode P side through the make contact A 1 of relay A, and the other end is connected to each resistor.
It is connected to the negative electrode N side via R 1 and R 2 . Relay B
The fixed contact of the transfer contact B1 is connected to the connection point of the relays A and B and the respective resistors R1 and R2 , and the movable contact is connected to the positive electrode P side via the input contact C.
この構成の分周動作は第３図のタイムチヤート
で説明される。リレーＡ，Ｂ共に付勢されていな
い図示の初期状態において、接点Ｃがオン（時刻
t1）すると、該接点Ｃ―接点B1―ダイオードDi2―
リレーＡ―抵抗R1の経路で電流i1（第２図中に矢
印で示す）が流れてリレーＡが付勢される。この
リレーＡの付勢によつて接点A1が閉じて該リレ
ーＡは自己保持されると共に接点A2がオンす
る。このとき、接点Ｃが閉じている時刻t2までは
リレーＢは両端同電位で付勢されない。接点Ｃが
開放される時刻t2ではリレーＢも付勢され、その
トランスフア接点B1が図示の状態からリレーＡ
側に切換わる。次に、２回目の時刻t3の接点Ｃの
閉じ動作では、リレーＡの両端が同電位になつて
その自己保持が解除され、接点A2もオフにな
る。このとき、リレーＢには接点Ｃ―接点B1―
ダイオードDi1―リレーＢ―抵抗R2の経路で付勢
電流i2が流れ続ける自己保持がなされ、この状態
は接点Ｃが開放される時刻t4まで続き、該時刻t4
でリレーＢも消勢され、次の接点Ｃの閉路時、即
ち初期状態に戻る。従つて、接点Ｃのオン・オフ
周期に対してリレーＡの出力接点A2は1/2分周し
たパルス信号源になる分周回路になる。 The frequency division operation of this configuration will be explained with the time chart in FIG. In the initial state shown in the figure, in which both relays A and B are not energized, contact C is on (at the time
t 1 ) Then, the contact C - contact B 1 - diode Di 2 -
A current i 1 (indicated by an arrow in FIG. 2) flows through the path between relay A and resistor R 1 and relay A is energized. Due to this energization of relay A, contact A1 closes, relay A is self-held, and contact A2 is turned on. At this time, relay B is not energized with the same potential at both ends until time t2 when contact C is closed. At time t 2 when contact C is opened, relay B is also energized, and its transfer contact B 1 changes from the state shown in the figure to relay A.
Switch to the side. Next, in the second closing operation of contact C at time t3 , both ends of relay A become at the same potential, the self-holding is released, and contact A2 is also turned off. At this time, relay B has contact C - contact B 1 -
Self-retention is achieved in which the energizing current i 2 continues to flow in the path of diode Di 1 - relay B - resistor R 2 , and this state continues until time t 4 when contact C is opened, and at that time t 4
Then, relay B is also deenergized, and the next time contact C is closed, that is, the state returns to the initial state. Therefore, output contact A2 of relay A becomes a frequency dividing circuit that becomes a pulse signal source whose frequency is divided by 1/2 with respect to the on/off period of contact C.
なお、ダイオードDi1，Di2はリレーＡ，Ｂのコ
イルの逆起電圧吸収機能も持つものである。 Note that the diodes Di 1 and Di 2 also have the function of absorbing the back electromotive force of the coils of the relays A and B.
以上のとおり、本発明による分周回路は、２回
路のメーク接点を持つ第１のリレーＡと、１回路
のトランスフア接点を持つ第２のリレーＢと、付
勢電流をリレーをバイパスさせるダイオード２個
と、２つの抵抗によつて構成できるため、従来回
路のように特殊な接点を持つリレーを必要とせ
ず、一般の低廉なリレーを使用した回路構成が可
能で、既設の盤（例えば開放盤、閉鎖盤、電力
盤）に分周回路を増設する場合にもその盤構造を
変更することを必要とせず簡単に装備することが
できる。また、接点構造が簡単なリレーを使用で
きるため、該リレーの設置雰囲気が制限されるこ
となく信頼性の高い分周回路構成が可能となる。
また、各接点は回路しや断に火花が発生すること
がなく、その接点寿命を延ばすことができる。 As described above, the frequency divider circuit according to the present invention includes a first relay A having two circuits of make contacts, a second relay B having one circuit of transfer contacts, and a diode that allows the energizing current to bypass the relays. Since it can be configured with two relays and two resistors, there is no need for relays with special contacts like in conventional circuits, and it is possible to configure the circuit using ordinary inexpensive relays. When adding a frequency dividing circuit to a panel, closed panel, power panel), it can be easily installed without changing the structure of the panel. Furthermore, since a relay with a simple contact structure can be used, a highly reliable frequency dividing circuit configuration is possible without any restrictions on the atmosphere in which the relay is installed.
Further, each contact does not generate sparks when the circuit breaks or breaks, and the life of the contact can be extended.
第１図は従来の分周回路図、第２図は本発明の
一実施例を示す回路図、第３図は第２図の動作を
説明するためのタイムチヤートである。
Ａ，Ｂ…リレー、Ｃ…入力用リレー接点、
R1，R2…抵抗、Di1，Di2…ダイオード。
FIG. 1 is a conventional frequency dividing circuit diagram, FIG. 2 is a circuit diagram showing an embodiment of the present invention, and FIG. 3 is a time chart for explaining the operation of FIG. 2. A, B...Relay, C...Input relay contact,
R1 , R2 ...Resistor, Di1 , Di2 ...Diode.
Claims (1)
れたコイルの一端は抵抗を介して直流電源の一端
に接続され該コイルの他端は自己のメーク接点を
介して直流電源の他端に接続され出力用の接点を
持つ第１のリレーＡと、付勢方向と逆方向にダイ
オードが並列接続されたコイルの一端は抵抗を介
して直流電源の一端に接続され該コイルの他端は
上記第１のリレーのメーク接点を介して直流電源
の他端に接続され該コイルと抵抗の接続点と上記
第１のリレーのコイルと上記抵抗の接続点とを固
定接点とするトランスフア接点を持つ第２のリレ
ーＢと、この第２のリレーのトランスフア接点の
固定接点と上記第１のリレーのメーク接点側直流
電源端子との間に接続した入力用オン・オフスイ
ツチとを備えたことを特徴とするパルス分周回
路。1 One end of a coil with diodes connected in parallel in the opposite direction to the energizing direction is connected to one end of a DC power source via a resistor, and the other end of the coil is connected to the other end of the DC power source via its own make contact. A first relay A having an output contact and a coil having a diode connected in parallel in a direction opposite to the energizing direction have one end connected to one end of a DC power source via a resistor, and the other end of the coil A second relay is connected to the other end of the DC power supply via a make contact of the relay, and has a transfer contact having a connection point between the coil and the resistor and a connection point between the coil of the first relay and the resistor as fixed contacts. relay B; and an input on/off switch connected between the fixed contact of the transfer contact of the second relay and the make contact side DC power terminal of the first relay. Pulse frequency divider circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11223480A JPS5737933A (en) | 1980-08-14 | 1980-08-14 | Pulse frequency dividing cirucit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11223480A JPS5737933A (en) | 1980-08-14 | 1980-08-14 | Pulse frequency dividing cirucit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5737933A JPS5737933A (en) | 1982-03-02 |
| JPS6218094B2 true JPS6218094B2 (en) | 1987-04-21 |
Family
ID=14581591
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11223480A Granted JPS5737933A (en) | 1980-08-14 | 1980-08-14 | Pulse frequency dividing cirucit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5737933A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH067446Y2 (en) * | 1984-12-20 | 1994-02-23 | アルプス電気株式会社 | Magnetic head |
-
1980
- 1980-08-14 JP JP11223480A patent/JPS5737933A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5737933A (en) | 1982-03-02 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS6087678A (en) | Control circuit for inverter | |
| JPS6218094B2 (en) | ||
| US1751263A (en) | Electrical switching system | |
| US3158761A (en) | Logic circuit utilizing a latch type switching device as a permanent memory element | |
| US3678460A (en) | Code-responsive control receiving system | |
| US3365625A (en) | Capacitor discharge operated relay flip-flop | |
| US2434948A (en) | Impulse actuated electromagnetic relay with time delay | |
| JPS582512B2 (en) | Dial pulse sending circuit | |
| US3723767A (en) | Reed relay type permanent nor memory circuit | |
| SU1173460A1 (en) | Time relay | |
| US2432276A (en) | Frequency determining circuit for telephone ringing current and the like | |
| US3365622A (en) | Capacitor controlled relay flip-flop | |
| SU502338A1 (en) | Electric automatic recording device | |
| JPS6019517Y2 (en) | Motor forward/reverse switching circuit | |
| KR100956449B1 (en) | Actuator switch circuit for driving dark current | |
| US2286846A (en) | Vibrator current-converting system | |
| SU1723665A1 (en) | Commutator | |
| JPH0432820Y2 (en) | ||
| US2975337A (en) | Slow acting relay-transistor combination | |
| JPS5816076Y2 (en) | Pulse Shingou Henkansouchi | |
| RU1792864C (en) | Input device for logic circuits of railway automatic equipment | |
| SU1451729A1 (en) | Scanning converter | |
| SU1228263A1 (en) | Relay flip-flop | |
| US3370206A (en) | Relay flip-flop | |
| SU1088131A1 (en) | Relay flip-flop |