JPS6221476B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a time division digital switch, and more particularly to a communication path system control system in a time division switch.

The purpose of the present invention is to microcontrol both the control of the central processing system and the control of the communication path system, thereby integrating the control of both, eliminating redundancy in both control functions, and improving the control of the communication path of the time division switch. To provide a time-sharing exchange control method that variably sets the execution cycle of control microprograms for both devices by making use of the fact that various control memories in the system are driven in a regular periodic manner, thereby simplifying the device configuration. There is a particular thing.

According to the present invention, the communication path control memory and the signal processing memory of the communication path system device of the time-division digital exchange are directly connected to the bus circuit of the main storage device of the central processing system by storage program control, and the communication path system control and the central processing control are performed. In a system in which the same microprocessor controls the microinstructions, a time-division switch control method is provided, which is characterized in that the execution cycle of microinstructions is variably assigned to the communication path system and the central processing system within a fixed cycle. It will be done.

Next, the present invention will be explained with reference to the drawings.
FIG. 1 is a block diagram showing one embodiment of the present invention. In the figure, the central processing system has microprograms and data stored in the control memory CM shown in the figure. On the other hand, the processing program (instruction words) and data necessary for the exchange process are stored in the main memory shown in the figure.
The instruction words and data are stored in the MM, and the instruction words and data are retrieved sequentially by microcontroller from the instruction register.
The instruction is read into the IR and buffer register BR, and a predetermined operation (for example, inter-register operation) corresponding to the instruction is performed. In this case, data used in these operations is read from the register group, operated on by the arithmetic circuit ALU via the data bus in the figure, and returned to the register group REG via the data bus.
All of these operations are executed by microinstructions stored in the microprocessor and control memory CM.

On the other hand, in the communication line equipment of a time-division exchange, signals of subscriber lines and interrupted lines are generally scanned at regular intervals and the results are stored in a part of the scanning memory of the signal processing memory SCM. In addition, the time-division communication path uses a communication path maintenance memory (NCM) that is accessed at regular intervals.
The call path holding memory NCM stores the read/write memory address (in the case of a time switch memory) or the highway number (in the case of a space switch) of call data in each allocated time. Data for transmitting signals on trunks and subscriber lines is sent to the subscriber circuit or trunk circuit at regular intervals from a control memory (part of the SCM) assigned to each subscriber line or trunk.
Each control memory of these communication path devices is operated according to a certain procedure, so this operation sequence is determined by the control memory of the microprocessor.
It is stored as a microinstruction in the CM. Therefore, the microinstructions stored in the control memory CM are of two independent types: one for controlling the central processing system and one for controlling the communication path, but which one to execute is decided at a fixed period by the task distribution circuit TDST shown in the figure. The settings of the variable values in the task distribution circuit, which variably allocates execution microinstructions within the task distribution circuit, are calculated and set by a call processing program (for example, a traffic observation program) within the central processing unit.

As explained above, the present invention micro-controls the control logic of the communication path system with the control logic of the central processing system, shares the micro-control and arithmetic circuits, and unifies the functions of the control parts. By variably allocating the execution cycle of each microinstruction group in the system) in accordance with the traffic volume, for example, when the switching load increases, the scanning cycle for detecting subscriber calls can be lengthened, and the central processing system can be By allocating the microprogram completion for the call processing program, etc., flexibility can be achieved in the processing capacity of the exchange.

[Brief explanation of the drawing]

The figure is a block diagram showing one embodiment of the present invention. MM...Main memory, BR...Data buffer register, MAR...Memory address register,
IR...Instruction register, REG...Register group,
ALU...Arithmetic circuit, CAM...Micro instruction address register, CM...Micro instruction memory,
MIR...micro-instruction register, SCM...signal control memory for time-division exchange, NCM...time-division exchange channel control memory, TDNW...time-division channel, SUB...subscriber terminal, TRK...relay trunk, BUS...Data bus, TM...Timing circuit, TDST...Task distribution circuit.

Claims (1)

[Claims] 1 Directly connect the channel control memory and signal processing memory of the channel system device of the time-division digital exchange under storage program control to the path circuit of the main storage device of the central processing system, so that the channel system control and the central processing control can be performed under the same system. In a system controlled by a microprocessor, a time division switch control method is characterized in that the execution cycle of microinstructions is variably assigned to the call path system and the central processing system within a fixed cycle.