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JPS6222268B2 - - Google Patents
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JPS6222268B2 - - Google Patents

Info

Publication number
JPS6222268B2
JPS6222268B2 JP58122428A JP12242883A JPS6222268B2 JP S6222268 B2 JPS6222268 B2 JP S6222268B2 JP 58122428 A JP58122428 A JP 58122428A JP 12242883 A JP12242883 A JP 12242883A JP S6222268 B2 JPS6222268 B2 JP S6222268B2
Authority
JP
Japan
Prior art keywords
substrates
ceramic substrate
ceramic
thickness direction
cracks
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP58122428A
Other languages
Japanese (ja)
Other versions
JPS5925251A (en
Inventor
Takao Doi
Tomoshi Nomura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP58122428A priority Critical patent/JPS5925251A/en
Publication of JPS5925251A publication Critical patent/JPS5925251A/en
Publication of JPS6222268B2 publication Critical patent/JPS6222268B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00Arrangements for protection of devices
    • H10W42/121Arrangements for protection of devices protecting against mechanical damage
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass

Landscapes

  • Structure Of Printed Boards (AREA)

Abstract

PURPOSE:To prevent crackings and breakings due to the mutual collisions of the ceramic substrates by forming projecting sections, angle sections thereof are curve-formed so that stepped differences are formed in the end surfaces of the outer circumferences of the ceramic substrates. CONSTITUTION:The projecting section 3 is formed so that the stepped difference 4 is formed in the end surface in the thickness direction in the ceramic substrate 2. The angle section 5 of the projecting section 3 is formed curvedly as a round- shaped protrudent section. The nose of the projecting section 3 is positioned at the center of the end surface in the thickness direction. When the substrates 2 in which such projecting sections are formed in the end surfaces in the thickness directions collide mutually, the application of impact force to corner sections in which cracking, breaking, etc. are liable to be generated can be avoided because the end surfaces 3, 3' of the outer circumferences of the substrates 2, 2 collide mutually.

Description

【発明の詳細な説明】[Detailed description of the invention]

本発明はセラミツク基板に関し、特に半導体集
積回路素子を載置し、収納するためのパツケージ
用基板或いは印刷配線基板等に好適に用いられる
セラミツク基板に関するものである。 従来周知のように、セラミツクは絶縁特性、耐
摩耗性に優れ、化学的に安定、高硬度、熱膨張率
が小さい等の特性により、とりわけ半導体集積回
路素子を収納するためのパツケージ用基板の材料
として極めて優れたものであり多用されている。
しかしながら、セラミツクは耐衝撃性に弱いとい
う欠点があるため、例えば第1図に示すセラミツ
ク基板のように、厚み方向端面1′が一平面状を
成している場合、セラミツク基板1同志が衝突し
た際に、厚み方向端面1′同志或いは一方の基板
の厚み方向端面1′と他の基板のコーナー部Rと
が衝突することによつて、これらセラミツク基板
1にひび、割れ、欠けなどを生ずることが極めて
多い。 特に、半導体集積回路素子をセラミツク基板1
上に取付けたり、ワイヤーボンデイングしたりす
る多くの作業を含む半導体素子の実装工程を自動
化した組立ラインで行うような場合、セラミツク
基板1をライン上で順次、移動させる際に、傾斜
面を自重落下させたり、或いは圧縮空気を吹き付
けて強制移動させるために、該セラミツク基板1
同志が激しく衝突を繰り返し、これらセラミツク
基板1にひび、割れ等が多発し、その結果、製品
の歩留りや信頼性を低下させる等大きな支障を来
たしていた。 このようなセラミツク基板同志の衝突による割
れや欠けが発生する原因としては、(1)プレス成形
による場合では上下の圧縮比の相違、(2)焼成時の
温度条件、(3)外表面粗さ、(4)原料の粒径や配合比
等多くの要素が絡んでいるが、本発明者等は種々
実験した結果、セラミツク基板1の厚み方向端面
1′同志が正面衝突しても割れや欠けの発生は少
ないが、傾斜状に衝突した場合、即ち前方で静止
しているセラミツク基板の厚み方向端面1′に、
後続のセラミツク基板のコーナー部Rが衝突した
時に、該コーナー部Rにひび、割れ、欠けが頻発
することが判明し、この結果からセラミツク基板
の外周厚み方向端面の形状を調整することによつ
て、ひび、割れ、欠けを有効に防止できることを
知見した。 従つて、本発明の目的は上記の知見に基づき、
ひび、割れ、欠けを最大限に防止するように成し
たセラミツク基板を提供することにある。 本発明のセラミツク基板は、基板の外周厚み方
向端面に段差を形成するように突出部が形成さ
れ、且つ該突出部の稜部が曲線状に形成されてい
ることを特徴とするものである。 本発明は、半導体集積回路素子を上面に搭載す
るようにした平板状のセラミツク基板、上面中央
部に素子搭載用の凹部を形成するように成形され
たセラミツク基板又は複数枚の生セラミツクシー
トを積層して焼結一体化されたセラミツク基板、
その他印刷配線用の単層又は多層状のセラミツク
基板等のように基板のひび、割れ、欠けが製品の
信頼性の面で致命的欠陥となるものに対して特に
有効に適用される。 以下、本発明を添付図面に示す実施例に基づき
詳細に説明する。 第2図のセラミツク基板は半導体集積回路素子
を上面に搭載するためのセラミツク基板の例を示
し、セラミツク基板2における厚み方向端面に段
差4を形成するように突出部3が形成されてい
る。この突出部3は丸形状の膨らみ部のように、
その稜部5が曲線状に形成されていればよい。 第2図における突出部3の先端は厚み方向端面
中央に位置し、突出高Dは基板2の厚さTとも関
連し、厚さT=1.52mmの場合、突状高D=0.02〜
0.1mm程度でD/T≒0.013〜0.066が適当であることが 実験上判明した。即ち、図においては、理解を容
易にするために、突出部が誇張されて示されてい
るが、実際には厚さの約1/100乃至7/100程度の突
出高さで所期の目的が達成されることが判明し
た。 このような突出部を厚み方向端面に形成した基
板2が互いに衝突する場合、例えば第3図に示す
ように、基板2,2の外周厚み方向端面の突出部
3,3′同志が衝突することにより、割れ、欠け
等の起こり安いコーナー部に衝撃力が加わるのを
回避することができる。 更に、多少傾斜状に衝突しても、突出部3,
3′が段差4を形成するように設けられ、且つそ
の稜部5が曲線状に形成されていることにより、
割れ、欠けの原因となる基板の稜部への衝撃力を
緩和することができ、セラミツク基板2,2′の
ひび、割れ、欠けが有効に防止される。なお、第
3図に示すように、基板2,2のコーナー部Ra
を0.3mm程度の曲率半径の曲面にしておくと、こ
の効果は増大される。 次に本発明を実験例に基づいて説明する。 一例として第2図に示したような断面形状を有
する24.0mm×24.0mmの方形状で、厚みT=1.52
mm、コーナーRaの曲率半径0.381mmの基板に、異
なる突出高Dを有する突出部3を形成したセラミ
ツク基板と、端面が一平面状の従来のセラミツク
基板についての衝突テストを行い、その結果を表
1に示す。この衝突テストの条件としては、長さ
100cm、傾斜70゜のトレイの上部50cm区間にテス
トグループとして1グループ20個の各基板を平面
状に連接して並べ、自重でもつてトレイの下端に
設置したナイロンストツパーに向けて滑降(落
下)させる。このような滑降を10回繰り返すが、
9回までの滑降時にひび、割れ、欠けの発生した
ものは滑降させた回ごとに新規の基板と入れ替
え、A及至Iのテストグループの10回の滑降後に
おける初期の基板20個についてのひび、割れ、欠
けの発生した個数を集計した。
The present invention relates to a ceramic substrate, and particularly to a ceramic substrate suitably used as a package substrate or a printed wiring board on which a semiconductor integrated circuit element is mounted and housed. As is well known, ceramics have excellent insulating properties, wear resistance, chemical stability, high hardness, and low coefficient of thermal expansion, making them especially suitable materials for packaging substrates for housing semiconductor integrated circuit devices. It is extremely excellent and is widely used.
However, ceramic has the disadvantage of being weak in impact resistance, so if the end faces 1' in the thickness direction are flat, as in the ceramic substrate shown in Fig. 1, the ceramic substrates 1 may collide with each other. At this time, cracks, cracks, chips, etc. may occur in these ceramic substrates 1 due to collision between the thickness direction end surfaces 1' or the thickness direction end surfaces 1' of one substrate and the corner portion R of the other substrate. are extremely common. In particular, semiconductor integrated circuit elements are mounted on a ceramic substrate 1.
When the semiconductor device mounting process, which includes many operations such as mounting on top and wire bonding, is carried out on an automated assembly line, when the ceramic substrate 1 is moved sequentially on the line, it may fall under its own weight on an inclined surface. In order to move the ceramic substrate 1 or forcibly move it by blowing compressed air,
As the comrades repeatedly collided violently, cracks, cracks, etc. occurred frequently in the ceramic substrates 1, resulting in major problems such as lowering the yield and reliability of the product. The causes of cracks and chips caused by collisions between ceramic substrates include (1) differences in the compression ratio between the upper and lower parts in the case of press forming, (2) temperature conditions during firing, and (3) outer surface roughness. , (4) Although many factors are involved, such as the particle size and compounding ratio of raw materials, the inventors have conducted various experiments and found that even if the end surfaces 1' of the ceramic substrate 1 in the thickness direction collide head-on, no cracking or chipping occurs. Although the occurrence of this is rare, in the case of an inclined collision, that is, on the end face 1' in the thickness direction of the ceramic substrate stationary in front,
It has been found that when the corner R of a subsequent ceramic substrate collides with the corner R, cracks, cracks, and chips frequently occur in the corner R. From this result, by adjusting the shape of the end face in the thickness direction of the outer periphery of the ceramic substrate. It was discovered that cracks, splits, and chips can be effectively prevented. Therefore, the purpose of the present invention is based on the above findings,
To provide a ceramic substrate designed to prevent cracks, cracks, and chips to the maximum extent possible. The ceramic substrate of the present invention is characterized in that a protrusion is formed so as to form a step on the end face in the thickness direction of the outer periphery of the substrate, and the ridge of the protrusion is formed in a curved shape. The present invention includes a flat ceramic substrate on which a semiconductor integrated circuit element is mounted, a ceramic substrate shaped to form a recess for mounting the element in the center of the upper surface, or a lamination of a plurality of raw ceramic sheets. integrated sintered ceramic substrate,
It is particularly effectively applied to substrates such as single-layer or multi-layer ceramic substrates for printed wiring, where cracks, breaks, or chips in the substrate can be a fatal defect in terms of product reliability. Hereinafter, the present invention will be described in detail based on embodiments shown in the accompanying drawings. The ceramic substrate shown in FIG. 2 is an example of a ceramic substrate on which a semiconductor integrated circuit element is mounted, and a protrusion 3 is formed on the end face in the thickness direction of the ceramic substrate 2 so as to form a step 4. This protrusion 3 is like a round bulge,
It is sufficient that the ridge portion 5 is formed in a curved shape. The tip of the protrusion 3 in Fig. 2 is located at the center of the end face in the thickness direction, and the protrusion height D is also related to the thickness T of the substrate 2. When the thickness T = 1.52 mm, the protrusion height D = 0.02 ~
It has been experimentally found that D/T≈0.013 to 0.066 is appropriate at about 0.1 mm. That is, in the figure, the protrusion is exaggerated for ease of understanding, but in reality, the protrusion height is about 1/100 to 7/100 of the thickness, and the desired purpose is achieved. was found to be achieved. When the substrates 2 having such protrusions formed on the end faces in the thickness direction collide with each other, for example, as shown in FIG. This makes it possible to avoid applying impact force to the corners where cracks, chips, etc. are likely to occur. Furthermore, even if the collision occurs in a somewhat inclined manner, the protrusion 3,
3' is provided so as to form a step 4, and the ridge 5 is formed in a curved shape, so that
The impact force on the edge of the substrate, which causes cracking and chipping, can be alleviated, and cracking, splitting, and chipping of the ceramic substrates 2, 2' can be effectively prevented. In addition, as shown in FIG. 3, the corner portion Ra of the substrates 2,
This effect is enhanced by making the surface a curved surface with a radius of curvature of about 0.3 mm. Next, the present invention will be explained based on experimental examples. As an example, it is a rectangular shape of 24.0 mm x 24.0 mm with a cross-sectional shape as shown in Figure 2, and the thickness T = 1.52.
Collision tests were conducted on a ceramic substrate in which protrusions 3 with different protrusion heights D were formed on a substrate with a corner Ra radius of curvature of 0.381 mm, and a conventional ceramic substrate with a flat end surface, and the results are presented. Shown in 1. The conditions for this collision test are that the length
A test group of 20 test boards were lined up in a flat section on the top 50cm of a 100cm tray with an inclination of 70°, and the boards were allowed to slide (fall) under their own weight toward a nylon stopper installed at the bottom of the tray. let Repeat this downhill 10 times,
Those that developed cracks, splits, or chips during up to 9 downhill runs were replaced with new boards after each downhill run. The number of cracked or chipped pieces was counted.

【表】【table】

【表】 上記テスト結果から明らかなように、セラミツ
ク基板の厚さT=1.52mmの場合、基板厚み方向端
面に突出高Dを0.02mm以上の突出部を形成してお
くことによつて基板同志の衝突によるひび、割
れ、欠け等の発生を、従来の基板の場合に比して
大幅に低減することが可能となる。 なお、厚さT=1.52mmのセラミツク基板の場合
に、突出高Dが0.1mm以上になるとひび、割れ、
欠け等を防止する効果はむしろ大きくなり基板の
使用条件によつては、0.1mm以上の突出部を形成
してもよい。しかし、突出高Dが大きくなるにつ
れて基板の形状、特に端面形状が正規の方形状の
ものから変形したものとなり、また基板の成形が
面倒になる傾向がある。 このようなセラミツクより成る基板の成形法と
しては粉体プレス法、ドクターブレード法による
グリーン(生)シートからの打抜き法その他押出
法で成形した後、厚み方向端面に突出部を成形し
たり、或いは焼結後に研摩加工して突出部を成形
する等、それぞれに最も適した方法を用いればよ
い。 以上のように、本発明のセラミツク基板によれ
ば、セラミツク基板同志が衝突した場合でも、ひ
び、割れ、欠け等の発生を大幅に低減させること
が可能となり、自動化された組立ラインによる組
立工程等苛酷な条件下においても歩留りを顕著に
向上させることができ、合わせて品質、信頼性を
向上させることができるため、半導体装置等に好
適に使用される。
[Table] As is clear from the above test results, when the thickness of the ceramic substrate is T = 1.52 mm, by forming a protrusion with a protrusion height D of 0.02 mm or more on the end face in the thickness direction of the substrate, it is possible to This makes it possible to significantly reduce the occurrence of cracks, cracks, chips, etc. caused by collisions with other substrates, compared to the case of conventional substrates. In addition, in the case of a ceramic substrate with a thickness T = 1.52 mm, if the protrusion height D exceeds 0.1 mm, cracks, cracks,
The effect of preventing chipping and the like is even greater, and depending on the usage conditions of the substrate, a protrusion of 0.1 mm or more may be formed. However, as the protrusion height D becomes larger, the shape of the substrate, especially the shape of the end face, becomes deformed from a normal rectangular shape, and molding of the substrate tends to become troublesome. Methods for molding such ceramic substrates include powder pressing, punching from a green sheet using a doctor blade method, and other extrusion methods, and then forming protrusions on the end faces in the thickness direction. The most suitable method may be used, such as polishing after sintering to form the protrusion. As described above, according to the ceramic substrate of the present invention, even if ceramic substrates collide with each other, it is possible to significantly reduce the occurrence of cracks, cracks, chips, etc., and the assembly process using an automated assembly line, etc. It is suitable for use in semiconductor devices and the like because it can significantly improve yield even under severe conditions and can also improve quality and reliability.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図イ,ロは従来のセラミツク基板の平面図
と側面図、第2図は本発明実施例によるセラミツ
ク基板の部分断面図、第3図は本発明によるセラ
ミツク基板の衝突態様例を説明するための図であ
る。 1,2,2′:セラミツク基板、3,3′:突出
部、4:段差。
1A and 1B are a plan view and a side view of a conventional ceramic substrate, FIG. 2 is a partial sectional view of a ceramic substrate according to an embodiment of the present invention, and FIG. 3 is an illustration of an example of a collision mode of a ceramic substrate according to the present invention. This is a diagram for 1, 2, 2': ceramic substrate, 3, 3': protrusion, 4: step.

Claims (1)

【特許請求の範囲】[Claims] 1 セラミツクより成る基板の外周厚み方向端面
に、段差を形成するように突出部を形成すると共
に、該突出部の稜部を曲線状に形成したことを特
徴とするセラミツク基板。
1. A ceramic substrate, characterized in that a protruding portion is formed to form a step on an end face in the outer circumferential thickness direction of a ceramic substrate, and the ridge portion of the protruding portion is formed in a curved shape.
JP58122428A 1983-07-07 1983-07-07 Ceramic substrate Granted JPS5925251A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58122428A JPS5925251A (en) 1983-07-07 1983-07-07 Ceramic substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58122428A JPS5925251A (en) 1983-07-07 1983-07-07 Ceramic substrate

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP14579478A Division JPS5572064A (en) 1978-11-25 1978-11-25 Ceramic substrate

Publications (2)

Publication Number Publication Date
JPS5925251A JPS5925251A (en) 1984-02-09
JPS6222268B2 true JPS6222268B2 (en) 1987-05-16

Family

ID=14835589

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58122428A Granted JPS5925251A (en) 1983-07-07 1983-07-07 Ceramic substrate

Country Status (1)

Country Link
JP (1) JPS5925251A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2740917B2 (en) * 1989-03-15 1998-04-15 京セラ株式会社 Ceramic substrate

Also Published As

Publication number Publication date
JPS5925251A (en) 1984-02-09

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