JPS6222295B2 - - Google Patents

Description

[Detailed Description of the Invention] (a) Technical Field of the Invention The present invention relates to encryption and decoding on the sending and receiving sides of a line encryption device installed between a data line termination device at each end of a communication path and a data terminal or computer. The present invention relates to a cryptographic device that has very little data delay, strong encryption strength, and simple software for a line cryptographic device when transmitting an initialization vector necessary for synchronization.

This initialization vector is an encryption method represented by the Data Encryption Standard (DES) established by the US Department of Commerce.
Before decoding, the encrypting side sends the data to the decoding side,
This is a cryptographic synchronization code that takes the cycle of the start of encryption and decryption operations.

In other words, on the encryption side, the plaintext is further encrypted using the cipher output, and on the decryption side, the received cipher is decrypted using the cipher output that was first encrypted using the initialization vector. ing.

(b) Prior art and problems FIG. 1 is a block diagram showing an example of the configuration of a data communication system equipped with a line encryption device, and FIG. 2 is a frame configuration diagram of the conventional example.

In the figure, 1 is a computer, 2 and 6 are line encryption devices, and 3 and 5 are modems (data line termination device 1).
4 is a communication path, 7 is a data terminal, 8 is a flag area indicating the beginning of the frame, 9 is an initialization vector area, 10 is an address area, 11 is a control signal area, 12 is a text area, 13 is a parity area A check area 14 indicates a flag area indicating the end of the frame.

In FIG. 1, computer 1 and data terminal 7
When communicating encrypted text between computers, an example of transmitting it from the computer 1 side is that the text from the computer 1 is encrypted by the line encryption device 2, and sent to the line via the modem 3, communication path 4, and modem 5. The text is input to the encryption device 6, decrypted by the line encryption device 6, and input to the data terminal 7 as the original text. In this case, computer 1 may be a data terminal, and data terminal 7 may be a computer. Here, the line encryption device 6 is informed of where the encryption started in the line encryption device 2, and when the line encryption device 6 decrypts, it is necessary to decrypt from the point where the encryption started. An initialization vector is sent at the beginning of encryption.

The conventional method of transmitting an initialization vector includes a flag area 8 indicating the beginning of the frame, an initialization vector area 9 into which an initialization vector is inserted, an address area 10, and a control signal area 11, as shown in the frame configuration example of FIG. control signal areas such as, a text area 12 for inserting text, a check bit area 13,
In a frame configuration consisting of a flag area 14 indicating the end of the frame, an initialization vector is inserted into the initialization vector area 9 next to the flag area 8 and transmitted, and the address area 10 and subsequent areas are encrypted and transmitted. For this reason, there is a delay in the data due to the insertion of the initialization vector, and as a line encryption device, the sending side monitors the data and needs to find the position to insert the initialization vector and the receiving side needs to find the initialization vector. The disadvantage is that the clothing is complicated. Also, in order to strengthen the encryption strength, the initialization vector is changed every time text is sent, but since it is known that the initialization vector is next to flag area 8, which indicates the beginning of the frame sent in plain text, the encryption The disadvantage is that the strength is somewhat weakened.

(c) Object of the Invention The object of the present invention is to eliminate the above-mentioned drawbacks, and to provide an encryption device with very little data delay, strong encryption strength, and simple software for the line encryption device.

(d) Structure of the Invention In order to achieve the above object, the present invention provides a first computer or It is equipped with a circuit for detecting a change point in a control signal indicating transmission permission from the attached data line terminating device with respect to a control signal indicating a transmission request from the terminal and reading the control signal, and a circuit for reading the control signal. After the second computer detects the transmit enable control signal from the circuit and sends an initialization signal, the transmit enable control signal is sent to the first computer or data terminal via a newly installed flip-flop. There is no need to provide an initialization vector area in the data frame structure, and by encrypting the various control signals in the frame structure, the position in the text frame structure cannot be determined. The present invention is characterized in that it is possible to eliminate the need for software that monitors the position at which the initialization vector is inserted during configuration and the data for finding the initialization vector from the frame configuration on the receiving side.

(e) Embodiment of the invention An embodiment of the invention will be described below with reference to the drawings. FIG. 3 is a block diagram showing the circuit configuration of the main part of the embodiment of the present invention, and FIG. 4 is a time chart showing the time relationship between the transmission request signal and the transmission enable signal in the case of FIG. 3. A is the transmission request signal. (Rs), B indicates a transmittable signal (Cs ₁ ) from the line terminating device, C indicates a transmittable signal (Cs ₂ ) from the line encryption device, and D indicates a signal.

FIG. 5 is a frame configuration diagram of transmission data in an example corresponding to FIG. 2 in the case of the present invention.

Components in FIG. 5 that have the same functions as those in FIG. 2 are indicated by the same symbols. In Figure 3, 15 is a central processor (hereinafter referred to as CPU), 16 is an address decoder, and 17
18 is an interrupt generation circuit, 18 is a bus driver, 19 is a bus receiver, and 20 is a D-type flip-flop (hereinafter referred to as
(referred to as FF), 21 is a receiver, 22 is a driver,
23 indicates an initialization vector, and 24 indicates encrypted data.

Since the configuration of the data communication system is the same as the conventional one in the case of the present invention, it is the first system.
This will be explained using figures. The interfaces between computer 1 and modem 3 and between data terminal 7 and modem 5 are V24 or V28 as determined by the International Telegraph and Telephone Advisory Committee.
shall apply. In FIG. 1, the case of transmission from the computer 1 side and the case of transmission from the data terminal 7 are the same, so the case of transmission from the computer 1 side will be explained. When transmitting from computer 1, first, as shown in Figure 4A, Rs.
When the signal is turned on, this signal passes through the line encryption device 2 and reaches the modem 3, and the modem 3 transfers to the fourth modem 4 as soon as it is ready.
As shown in Figure B, the send enable signal Cs ₁ is turned on. When the transmit enable signal Cs ₁ is turned on, the turned-on signal is input to the interrupt generation circuit 17 and bus driver 18 in the line encryption device 2 via the receiver 21 shown in FIG. The interrupt generation circuit 17 then sends the interrupt signal IRQ to the CPU 15. CPU15
recognizes that an interrupt has occurred, and sends signals corresponding to various addresses via the address decoder 16 in order to find out which bus driver the interrupt signal is generated from, and determines which bus driver corresponds to this signal. Make the output input to the data bus. When the output of the bus driver 18 is inputted to the data bus in this way, the CPU 15 knows that the Cs ₁ signal is turned on.

As a result, the CPU 15 sends an on signal to the bus receiver 19, and also sends an initialization vector 23 to the opposing line encryption device 6 as shown in FIG. 4D. Address decoding circuit 1 at the point when the sending is finished
6 to the clock terminal of the FF 20, and a signal with the signal Cs ₂ turned on is transmitted to the computer 1 of FIG. 1 via the driver 22, as shown in FIG. 4C. When this Cs ₂ signal turns on, the computer 1 is allowed to transmit data. Therefore, when the computer 1 sends out a signal with a frame structure as shown in FIG. 5, the line encryption device 2 encrypts it from the beginning as shown in the encrypted data 24 in FIG. 4D since the initialization vector has already been sent. and transmits it to the opposite line encryption device 6.
In the conventional case, the output of the receiver 21 is directly connected to the driver 22, so when the transmission enable signal _Cs1 is turned on, this signal is directly sent from the driver 22 to the computer 1.

By doing the above, the delay of the transmitted data is much smaller than when the initialization vector shown in Figure 2 is inserted into the frame structure, and since the transmitted data is encrypted from the beginning, the beginning of the frame is The strength of the encryption will be increased because the flags shown will not be understood. Furthermore, since the initialization vector is not inserted into the frame structure of the transmitted data, the line cryptographic device does not need to monitor the transmitted data on both the transmitting and receiving sides, and the software becomes simpler.

(f) Effects of the Invention As explained in detail above, according to the present invention, the line cryptographic device transmits the initialization vector during the response time when the transmission clear signal arrives in response to the transmission request signal when viewed from the computer or data terminal. Therefore, the delay in sending data is extremely small. Also, since the line encryption device encrypts from the beginning, the strength of the encryption is strong, and since the initialization vector is not inserted into the frame structure of the transmitted data, the line encryption device needs to monitor the transmitted data on both the sending and receiving sides. gone,
The software has the effect of being simple.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of a configuration example of a data communication system in which a line encryption device is installed, Fig. 2 is a frame configuration diagram of transmission data in a conventional example, and Fig. 3 is a circuit configuration of the main part of an embodiment of the present invention. Block diagram shown, No. 4
This figure is a time chart showing the time relationship between the transmission request signal and the transmission enable signal in FIG. 3, and FIG. 5 is a frame configuration diagram of transmission data in an example corresponding to FIG. 2 in the case of the present invention. In the figure, 1 is a computer, 2 and 6 are line encryption devices, 3 and 5 are modems, 4 is a communication path, 7 is a data terminal, 8 is a flag area indicating the beginning of a frame, 9 is an initialization vector area, and 10 is an address area, 11
1 is a control signal area, 12 is a text area, 13 is a parity check area, 14 is a flag area indicating the end of a frame, 15 is a central processor, 1
6 is an address decoder, 17 is an interrupt generation circuit,
18 is a bus driver, 19 is a bus receiver, 20
is a D-type flip-flop, 21 is a receiver, 22
is a driver, 23 is an initialization vector, and 24 is encrypted data.

Claims (1)

[Claims] 1. When transmitting the initialization vector necessary for synchronizing encryption and decoding on the sending and receiving sides in a line encryption device installed between the data line termination device at each end of the communication path and the data terminal or computer. , a means for detecting a control signal indicating permission for transmission from an affiliated data line terminating device in response to a control signal indicating a transmission request from a computer or a data terminal, and a vector for transmitting an initialization vector based on a signal from the detection means. Sending Means A line encryption device comprising control signal sending means for sending a transmission permission control signal to the computer or data terminal after the sending of the initialization vector is completed.