JPH0365699B2 - - Google Patents

Description

[Detailed Description of the Invention] (a) Technical Field of the Invention The present invention relates to a data communication encryption device, and particularly to a data communication encryption device.
The present invention relates to a time-minute encryption method for an encryption device that uses a common calculation unit for reception encryption and decryption.

(b) Prior art and problems A data communication encryption device is usually installed between a data termination device at each end of a communication path and a host computer or data terminal device, and is used to encrypt and transmit/receive communication data. .

A conventional data communication encryption device (hereinafter referred to as an encryption device) has a separate arithmetic unit for encrypting the plain text of transmitted data and an arithmetic unit for converting the cipher text of received data into plain text.

The conventional cryptographic device shown in FIG. 1 will be explained below.

Figure 1 shows data output from a host computer (hereinafter referred to as CPU) 1; the plaintext handled in the main text is converted into ciphertext by encryption device 1 (hereinafter referred to as DCP()) 2, and the ciphertext is the data terminal. The device (hereinafter referred to as DCE()) 3 modulates the data with a carrier frequency, and the data terminal device (hereinafter referred to as DCE()) 5 of the opposite station A demodulates it into ciphertext via the transmission path 4, and the cryptographic device (hereinafter referred to as DCP (referred to as )6
The data terminal device (hereinafter referred to as
(referred to as DTE) 7.

Next, the operation of DCP() in the figure will be explained.

The plain text output from the CPU 1 is input to the input register (1) 8 via the input/output unit 8. input register
(1) 9, output register (1) 10, and control section (transmission) 11 are controlled by a transmission clock 12.

The plaintext output from the input register (1) 9 is operated into ciphertext by the key possessed by the arithmetic unit (transmission) 13 under the control of the control unit (hereinafter referred to as CONT) 11.
The ciphertext is outputted from the input/output unit ( ) 14 via the output register (1) 10, modulated with a carrier frequency by the DCE ( ) 3, and transmitted to the opposing station A.

On the other hand, the modulated ciphertext transmitted from opposite station A is demodulated into ciphertext by DCE(), and DCP()
Input register (2) 1 via input/output section () 14 of 2
5 is input. Here, input register (2) 15,
CONT 11 and output register (2) 16 are controlled by a reception clock 17. Reception clock 1
7 and the transmission clock 12 have the same period.

The ciphertext output from input register (2) 15 is
Under the control of the CONT 11, the plain text is computed using the same key as that of the arithmetic unit (sending) 13 possessed by the arithmetic unit (receiving) 18. This plaintext is output from the input/output unit 8 via the output register (2) 16 and input to the CPU 1.

The above-mentioned cryptographic device 2 includes an arithmetic unit (sending) 13 that converts plaintext into ciphertext and an arithmetic unit (receiving) that converts ciphertext into plaintext.
Even though 18 are operated using the same clock cycle and the same key, each of them is provided with a separate arithmetic section, which has the drawback of increasing the size and cost of the device.

(c) Purpose of the Invention In order to solve the above-mentioned drawbacks, the present invention aims to provide a time-division encryption method for a new cryptographic device that encrypts plaintext and decrypts ciphertext using one calculation unit. do.

(d) Structure of the Invention In order to achieve the above object, the present invention has a transmitting clock and a receiving clock having the same period. In a cryptographic device that calculates a text into a plain text, the phase of either the transmitting clock or the receiving clock is shifted, and the transmitting clock and the receiving clock whose phase is shifted alternately control the control section, and the transmitting control section A means is provided for converting plaintext into ciphertext in the arithmetic unit using a control signal, the control unit is controlled by the phase-shifted reception clock, and the ciphertext is converted into plaintext in the arithmetic unit according to the control signal from the control unit. The invention is characterized in that it has a means for doing so.

(e) Embodiments of the Invention In the present invention, plaintext encryption and ciphertext decryption are performed alternately in one arithmetic unit, so the clock used for this is a reception clock whose phase is reversed by, for example, 180 degrees with respect to the transmission clock. Use a personal clock.

This will be explained below based on FIG. In the figure, the same reference numerals as in FIG. 1 indicate the same members as in FIG. 1. Furthermore, by replacing the encryption device 2' shown in FIG. 2 with the encryption devices 2 and 6 shown in FIG. 1, the encryption system shown in FIG. 1 can be constructed.

In FIG. 2, the plaintext output from the CPU 1 is input to the input/output section 8 of the cryptographic device' (hereinafter referred to as DCP()') 2' to the input register (1) 9. Here, the transmission clock 12 controls the operations of the input register 9, selection circuits (hereinafter referred to as SEL) 19, 20, control section (hereinafter referred to as CONT) 11', and the like.

The plaintext output from input register (1) 9 is
Selected by control of CONT11', calculation unit 1
3' is input. CONT1 in calculation unit 13'
1', it is encrypted into a ciphertext by the key K, selected by the SEL20, outputted from the input/output section () 14 via the output register 10, modulated at the transmission frequency by the DCE3, and transmitted to the opposite station A. Ru.

On the other hand, the ciphertext modulated at the transmission frequency transmitted from the opposite station A is demodulated into a cipher by the DCE3,
This cipher passes through the input/output section () and enters the input register (2).
15 is input. Here, input register (2) 15,
CONT 11', output register (2) 16 is clock 1 which is inverted from reception clock 17 by inverter 21.
7'.

The ciphertext output from input register (2) 15 is
It is selected at SEL 19 under the control of CONT 11' and inputted to calculation section 13'. At the calculation section 13'
Under the control of CONT 11', it is decrypted into plain text using the same key K as in the previous period, selected by SEL 20, and output from the input/output unit 8 via the output register (2) 16.
Input to CPU1. In the above operation, the transmitting and receiving clocks alternately control CONT 11' to alternately perform encryption and decoding.

(f) Effects of the Invention As described above, according to the present invention, a common arithmetic unit and a control unit are used for plaintext encryption and ciphertext decryption, so there is an effect that the hardware can be reduced compared to the conventional method.

[Brief explanation of drawings]

FIG. 1 is a diagram of a conventional encryption system, and FIG. 2 shows an embodiment of the present invention. In the figure, 1 is the CPU, 2, 2', and 6 are the cryptographic devices,
3 and 5 are data termination devices, 4 is a transmission path, 7 is a data terminal device, 8 and 14 are input/output units, 9 and 15 are input registers, 10 and 16 are output registers, 11,
11' is CONT, 12, 17, 17' are clocks,
13, 13', 18 are calculation parts, 19, 20 are SEL,
21 indicates an inverter.

Claims (1)

[Claims] 1. In a cryptographic device that has a transmitting clock and a receiving clock having the same cycle, and uses the transmitting clock to compute plaintext into ciphertext, and uses the receiving clock to compute the ciphertext to plaintext, the transmitting clock or the receiving clock means for shifting the phase of one of the clocks and controlling the control section alternately with the transmission clock and the reception clock whose phase has been shifted, and by the control signal of the control section by controlling the transmission clock and the reception clock. A time-division encryption method for a cryptographic device characterized by converting plaintext into ciphertext or ciphertext into plaintext in an arithmetic unit.