JPS6222484B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a pulse width modulation amplifier circuit, and more particularly, to a pulse width modulation amplifier circuit that samples an audio analog input signal and converts it into a pulse width modulation (abbreviated as PWM) signal to alternately turn on and off a pair of output switching elements. This invention relates to a PWM amplification circuit that obtains audio power output.

This type of PWM push-pull amplifier circuit is called a so-called class D amplifier, and its outline is as shown in Figure 1.A PWM modulator 1 samples an analog audio signal to generate a PWM signal, which is amplified by a driver 2, and then a pair of The output is amplified by an output push-pull power amplifier 3 having complementary output switching transistors _Q1 and _Q2 . This power amplification output V ₀ is used to push-pull drive a load 5 such as a speaker via a low-pass filter 4 consisting of a coil L ₁ and a capacitor C ₁ . and switching transistor
Unidirectional bypass diodes _D1 and _D2 are connected in parallel with the transistors _Q1 and _Q2 , respectively, in order to absorb currents in the opposite direction to the currents flowing through Q1 and _{Q2 ,} respectively.

Figure 2 shows the waveforms of voltage V 0 and current I ₀ at the common connection point of the outputs of transistors Q ₁ and Q ₂ when there is no signal in the circuit of Figure 1, that is, when the output of driver 2 is PWM output with a duty of ₅₀ %. ing.
The phase relationship between the voltage V ₀ and the current I ₀ has a phase difference of about 90° as shown in the figure to show the filter inductivity due to the coil L ₁ and the capacitor C ₁ , so that the current I ₀ has a 90° phase lag. will be presented.

Here, during the period when the voltage V ₀ is positive, the transistor Q ₁
is on and Q ₂ is off, and during the negative period, Q ₁ is off and Q ₂ is on, and the current waveform is a triangular wave. Therefore, the shaded portion of the current waveform corresponds to the transistors Q ₁ and Q During the on period of ₂ , the current flows in the forward direction (+
However, in the portions other than the shaded areas, a current (-I ₀ ) flows in the opposite direction to the on-current _of the transistors Q ₁ and Q ₂ . Therefore, as shown in FIG. 1, by providing diodes D ₁ and D ₂ in parallel with each switching transistor Q ₁ and Q ₂ to flow this reverse current (-I ₀ ), accurate PWM can be achieved. Enables amplifier operation.

However, the output switching transistor
Since the forward characteristics of Q ₁ and Q ₂ and the diodes D ₁ and D ₂ are significantly different as shown in Figure 3, the forward current (+I ₀ for Q ₁ and -I ₀ for Q ₂ ) flows through each transistor Q ₁ and Q ₂ , the voltage drop due to V _CE (collector-emitter voltage) of each transistor, and the reverse current (−I 0 for D ₁ , −I ₀ for D ₂ ) This is different from the drop caused by V _F (forward voltage) of each diode when +I ₀ ) flows through each diode D ₁ and D ₂ . Therefore, as shown in FIG. 4, the envelope waveform of the voltage waveform V ₀ at the output common connection point becomes vertically asymmetrical, causing distortion in the audio output that has passed through the low-pass filter 4.

An object of the present invention is to provide a PWM amplifier circuit that can obtain high-performance output characteristics by preventing signal distortion caused by each active element of the power amplifier stage.

The PWM amplifier circuit of the present invention is characterized in that a resistance element is provided in series with each of the unidirectional elements for reverse current bypass connected in parallel to a pair of output switching elements.

If the output switching element is an IGFET (insulated gate field effect transistor), the PN junction between the substrate and the source or drain region is used as a unidirectional diode for bypass.
In such a case, by selecting a larger specific resistance of the substrate, a resistor is inserted equivalently in series with the so-called parasitic diode formed by the PN junction, and the above object can be achieved.

The present invention will be explained below with reference to the drawings.

FIG. 5 is a circuit diagram of an embodiment of the present invention, and parts equivalent to those in FIG. 1 are designated by the same symbols.
In this example, PNP transistor _Q1 and NPN transistor are used as switching elements as in Fig. 1.
It uses Q ₂ . and transistor Q ₁
and resistive elements in series with the diodes _D1 and _D2 , respectively, to bypass the respective reverse currents to _Q2 .
R ₁ and R ₂ are connected, and the other configurations are the same as those in FIG. 1, and their explanation will be omitted.

With such a configuration, the voltage-current characteristics (-I ₀ vs. V _F characteristics) of the bypass circuit section, in which the diode and resistor are connected in series, can be made straight as shown in Figure 6, and the selection of the resistor can be further simplified. Therefore, the slope can be made the same as the voltage-current characteristic (+I ₀ vs. V _CE characteristic) of the transistor, and the voltage drop in both the forward and reverse directions is therefore equal. Therefore, as shown in FIG. 7, since the envelope waveform of the voltage V ₀ at the output point is vertically symmetrical, no signal distortion due to this envelope wave occurs in the output of the low-pass filter 4.

FIG. 8 is an equivalent circuit diagram illustrating another embodiment of the present invention, in which IGFETs Q ₁ ' and Q ₂ ' are used as output switching transistors. In this case, a so-called parasitic diode is used as the diode for reverse current bypass, but the resistor R ₁
The effects of the present invention can be easily obtained by using substrate resistors for each of R2 and _R2 . That is, as shown in FIG. 9, which is a schematic cross-sectional view of the transistors Q ₁ ' and Q ₂ ', the P channel transistor Q ₁ ' has a P type source and drain on an N type semiconductor substrate 10 having a large specific resistance. It has a structure in which regions 11 and 12 are provided. The source 11 and the substrate 10 are commonly connected to the positive power supply +Vcc.

On the other hand, the N-channel transistor Q ₂ ' has a structure in which N-type source and drain regions 14 and 15 are provided on a P-type semiconductor substrate 13 having a high specific resistance, and the source 14 and the substrate 13 are commonly connected and have a negative Power supply - Connected to Vcc.

The bypass diodes of both transistors Q ₁ ′ and Q ₂ ′ are the PN junction element formed between the drain 12 and the substrate 10 and the PN junction element formed between the drain 15 and the substrate 13, respectively.
A so-called parasitic diode, which is a junction element, is used. Therefore, if the resistors R ₁ and R ₂ are obtained by selecting the resistivity of the substrates 10 and 13 to be relatively large, the generation of distortion can be prevented without providing any additional elements.

Note that in a configuration in which the sources of both transistors Q ₁ ′ and Q ₂ ′ are commonly connected, a parasitic diode between the sources and the substrate acts as a bypass element.

According to the present invention, it is possible to make the voltage and current characteristics of the switching element and the bypass unidirectional element uniform with an extremely simple configuration, and it becomes easy to suppress output signal distortion.

[Brief explanation of the drawing]

Figure 1 is a circuit diagram of a conventional PWM amplifier, Figure 2 is a voltage/current waveform diagram at the output point of the circuit in Figure 1, and Figure 3 is a voltage/current characteristic diagram of each element in the circuit in Figure 1. 4 is a voltage waveform diagram at the output point of the circuit in FIG. 1, FIG. 5 is an embodiment circuit diagram of the present invention, FIG. 6 is a voltage/current characteristic diagram of each element in the circuit in FIG. This figure is a voltage waveform diagram at the output point of the circuit of FIG. 5, and FIGS. 8 and 9 are equivalent circuit diagrams illustrating other embodiments of the present invention. Explanation of symbols for main parts, Q ₁ , Q ₂ ... Switching transistor, D ₁ , D ₂ ... Bypass diode, R ₁ , R ₂ ... Resistor, L ₁ ... Low-pass filter coil, C ₁ ... ...Low pass filter capacitor.

Claims (1)

[Claims] 1. A pair of output switching elements that are alternately controlled on and off by a pulse width modulation signal having a pulse width corresponding to an analog input signal level and alternately supply current to a common output connection point; A pulse width modulation amplification circuit including a pair of unidirectional bypass elements provided in parallel with each of the output switching elements for bypassing a current flowing in each of the output switching elements and a current in the opposite direction, the unidirectional bypass A circuit consisting of a resistance element connected in series with each element. 2. The output switching element is an insulated gate field effect transistor element, and the unidirectional bypass element is connected to a PN junction between a substrate region where the transistor element is formed and a drain (or source) region of this transistor element. Becomes,
2. The circuit of claim 1, further characterized in that said resistive element comprises said substrate region.