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JPS6238875B2 - - Google Patents
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JPS6238875B2 - - Google Patents

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Publication number
JPS6238875B2
JPS6238875B2 JP60094732A JP9473285A JPS6238875B2 JP S6238875 B2 JPS6238875 B2 JP S6238875B2 JP 60094732 A JP60094732 A JP 60094732A JP 9473285 A JP9473285 A JP 9473285A JP S6238875 B2 JPS6238875 B2 JP S6238875B2
Authority
JP
Japan
Prior art keywords
ridges
layer
substrate
forming
cladding layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP60094732A
Other languages
Japanese (ja)
Other versions
JPS60239087A (en
Inventor
Masaru Wada
Kunio Ito
Takashi Sugino
Juichi Shimizu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP60094732A priority Critical patent/JPS60239087A/en
Publication of JPS60239087A publication Critical patent/JPS60239087A/en
Publication of JPS6238875B2 publication Critical patent/JPS6238875B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01SDEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00Semiconductor lasers
    • H01S5/20Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers
    • H01S5/22Structure or shape of the semiconductor body to guide the optical wave ; Confining structures perpendicular to the optical axis, e.g. index or gain guiding, stripe geometry, broad area lasers, gain tailoring, transverse or lateral reflectors, special cladding structures, MQW barrier reflection layers having a ridge or stripe structure
    • H01S5/223Buried stripe structure
    • H01S5/2232Buried stripe structure with inner confining structure between the active layer and the lower electrode
    • H01S5/2234Buried stripe structure with inner confining structure between the active layer and the lower electrode having a structured substrate surface
    • H01S5/2235Buried stripe structure with inner confining structure between the active layer and the lower electrode having a structured substrate surface with a protrusion

Landscapes

  • Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)
  • Semiconductor Lasers (AREA)

Description

【発明の詳細な説明】 産業上の利用分野 本発明は半導体レーザ装置の製造方法に関する
ものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a method for manufacturing a semiconductor laser device.

従来の技術 近年、半導体レーザ装置は、その劣化という大
きな問題がほぼ解決され、数千時間から数万時間
の寿命をもつものが容易に得られるようになり、
光通信や光情報処理をはじめとする光技術応用シ
ステムに使用されるようになつて来ている。
BACKGROUND TECHNOLOGY In recent years, the major problem of semiconductor laser device deterioration has been largely solved, and devices with a lifespan of several thousand to tens of thousands of hours can now be easily obtained.
It has come to be used in optical technology application systems such as optical communication and optical information processing.

このような半導体レーザ装置としては種々のタ
イプのものがある。
There are various types of such semiconductor laser devices.

発明が解決しようとする問題点 半導体レーザ装置を広く実用に供するために
は、単にそれを長寿命化するだけでなく、性能を
大幅に向上させなければならない。そのために
は、縦・横とも同一モードでスポツト状発振する
こと、光ビームの広がりが小さいこと、電流−光
出力特性においてその二次歪がきわめて小さいこ
と、および、動作電流が小さいことなどの要件を
いかに満たすかが課題となる。
Problems to be Solved by the Invention In order to put a semiconductor laser device into widespread practical use, it is necessary not only to extend its life span, but also to significantly improve its performance. To achieve this, the requirements include spot-like oscillation in the same mode both vertically and horizontally, the spread of the light beam to be small, the second-order distortion in the current-light output characteristics to be extremely small, and the operating current to be small. The challenge is how to satisfy this.

従来のストライプ型半導体レーザ装置において
は、電流の増加に従つて多モード発振となり、ま
た、電流−光出力特性においてもキンクの発生に
よつて直線性が非常に悪い。
In conventional striped semiconductor laser devices, multi-mode oscillation occurs as the current increases, and the linearity of the current-optical output characteristics is very poor due to the occurrence of kinks.

本発明は、このような問題点を解決した半導体
レーザ装置を容易に作製できる方法を提供しよう
とするものである。
The present invention aims to provide a method for easily manufacturing a semiconductor laser device that solves these problems.

問題点を解決するための手段 本発明の方法は、半導体基板の表面に、互いに
平行な二つのリツジを形成してそれらの間にスト
ライプ状溝を形成してから、二つのリツジが形成
された半導体基板上にクラツド層を、その二つの
リツジ上での厚さを他の領域上での厚さより薄
く、かつストライプ状溝上の表面を下方に湾曲さ
せて形成し、さらに、活性層をクラツド層上に、
リツジ上での厚さが他の領域上での厚さより薄く
形成するものである。
Means for Solving the Problems The method of the present invention involves forming two ridges parallel to each other on the surface of a semiconductor substrate, forming a striped groove between them, and then forming the two ridges. A cladding layer is formed on the semiconductor substrate by making the thickness on the two ridges thinner than the thickness on other regions and curving the surface above the striped grooves downward, and further forming the active layer on the cladding layer. above,
The thickness on the ridge is thinner than the thickness on other areas.

作 用 上述のようにリツジを形成し、リツジ形成面上
にクラツド層を形成すると、クラツド層の成長速
度はリツジ部側面における方がリツジ部頂面や基
板主面におけるよりもいちじるしく大きくなる。
したがつて、クラツド層は、リツジ対の外側面近
傍の部分がそれよりもさらに外側の部分上よりも
厚く形成される。そのため、前記クラツド層上に
活性層を形成すると、このクラツド層の斜面部分
上における活性層の成長速度が、それ以外の実質
的な平面部分上における活性層の成長速度に比べ
て大きいため、活性層はリツジ対の外側近傍の部
分が、リツジの頂面上や基板上のリツジより遠い
部分に比べて厚く形成される。
Effect When a ridge is formed as described above and a cladding layer is formed on the ridge forming surface, the growth rate of the cladding layer is significantly higher on the side surfaces of the ridge than on the top surface of the ridge or the main surface of the substrate.
Therefore, the cladding layer is formed to be thicker in the vicinity of the outer surface of the ridge pair than on the further outer side. Therefore, when an active layer is formed on the cladding layer, the growth rate of the active layer on the sloped part of the cladding layer is higher than that on the other substantially flat part, so that the active layer becomes active. The layer is formed to be thicker near the outside of the pair of ridges than on the top surface of the ridge or on the substrate farther from the ridge.

リツジ間のストライプ状溝部に対応する上方の
位置に電極を配置し、通電して発光させると、リ
ツジ頂面上におけるクラツド層の厚みが薄いの
で、この部分では光を基板に吸収させることがで
きる。そして、リツジ対の外側面近傍においてク
ラツド層と活性層とが厚く形成されるため、電流
の広がりが効果的に抑制される。したがつて、発
光部分がきわめて狭い領域に制限される。
When an electrode is placed above the striped groove between the ridges and electricity is applied to emit light, the thickness of the cladding layer on the top surface of the ridge is thin, allowing the light to be absorbed by the substrate in this area. . Furthermore, since the cladding layer and the active layer are formed thick near the outer surfaces of the bridge pair, the spread of current is effectively suppressed. Therefore, the light emitting portion is limited to a very narrow area.

実施例 以下、本発明の方法の一実施例について、第1
図を用いて説明する。
Example Hereinafter, an example of the method of the present invention will be described.
This will be explained using figures.

まず、第1図Aに示すように、n型GaAs基板
1を準備し、その一方の主面上に通常のフオトエ
ツチング技術を用いて、間隔が5μmで幅15μm
の対をなすストライプ状パターンマスクを250〜
300μmのピツチで形成する。そして、このマス
クを用いて、基板1をH2O:H2O2:H2SO4
8:8:1の硫酸系エツチング液で1.5〜1.7μm
の深さまでエツチする。この選択的なエツチング
でリツジ1a,1bが実質的な平面上に二条平行
に突出した形状に形成される。
First, as shown in FIG. 1A, an n-type GaAs substrate 1 is prepared, and a pattern of 15 μm in width with a spacing of 5 μm is formed on one main surface of the substrate using a normal photoetching technique.
A pair of striped pattern masks of 250~
Formed with a pitch of 300μm. Then, using this mask, the substrate 1 is exposed to H 2 O:H 2 O 2 :H 2 SO 4 =
1.5-1.7μm with 8:8:1 sulfuric acid etching solution
Have sex to the depth of By this selective etching, the ridges 1a and 1b are formed in two parallel protruding shapes on a substantial plane.

上記のような粘性の低い硫酸系エツチング液で
は、反応律速過程が支配的であり、エツチング深
さがエツチング時間に比例するだけでなく、エツ
チング速度も比較的遅いのでリツジ1a,1bの
高さを容易に制御できる。
In the above-mentioned low-viscosity sulfuric acid-based etching solution, the reaction rate-determining process is dominant, and not only the etching depth is proportional to the etching time, but also the etching speed is relatively slow, so the height of the ridges 1a and 1b is Easy to control.

次に、リツジ1a,1bを有するn型GaAs基
板1上に、液相エピタキシヤル成長法によつてダ
ブルヘテロ構造を形成する。リツジ1a,1bの
ある基板上での結晶成長のメカニズムは平坦な基
板上での結晶成長のメカニズムと異なる。すなわ
ち、リツジ1a,1bのある基板ではリツジ部頂
面上それ以外の平坦な面上での成長速度が、同じ
(100)面であつても異なる。たとえば、250μm
ピツチで幅15μmの一つのリツジを有する基板で
は、リツジ頂面上での成長速度が平坦な面上にお
けるそれの1/6程度と遅くなる。これはリツジの
一部分がメルトバツクすることや、リツジ部分で
の成長が(100)面である頂面上におけるよりも
(111)面である側面における方が支配的となるた
めである。そのため、基板1のリツジ1a,1b
間の部分上においても、基板1の他の主面上やリ
ツジ1a,1bの頂面上よりも、結晶の成長速度
が大となる。このような結晶成長の性質を利用し
て、リツジ1a,1bをもつGaAs基板1上にn
型Ga1-xAlxAsクラツド層2、Ga1-yAlyAs活性層
3、p型Ga1-xAlxAsクラツド層4およびp型
GaAs層5を順次成長させる。赤外光レーザの場
合、xおよびyの値はそれぞれ0.3および0.05で
ある。
Next, a double heterostructure is formed on the n-type GaAs substrate 1 having the ridges 1a and 1b by liquid phase epitaxial growth. The mechanism of crystal growth on a substrate with ridges 1a, 1b is different from the mechanism of crystal growth on a flat substrate. That is, in a substrate with ridges 1a and 1b, the growth rates on the top surface of the ridge portion and other flat surfaces are different even if they are the same (100) plane. For example, 250μm
In a substrate having a single ridge with a width of 15 μm on a pitch, the growth rate on the top surface of the ridge is about 1/6 of that on a flat surface. This is because a portion of the ridge melts back, and the growth in the ridge portion is more dominant on the (111) side surface than on the (100) top surface. Therefore, the ridges 1a and 1b of the substrate 1
The crystal growth rate is also higher on the intermediate portions than on the other main surfaces of the substrate 1 or the top surfaces of the ridges 1a and 1b. Taking advantage of such crystal growth properties, n
type Ga 1-x Al x As cladding layer 2, Ga 1-y Al y As active layer 3, p-type Ga 1-x Al x As cladding layer 4 and p-type
GaAs layers 5 are sequentially grown. For an infrared laser, the values of x and y are 0.3 and 0.05, respectively.

n型Ga1-xAlxAs層2の成長過程はリツジ1
a,1bの側面とそれ以外の面とで異なり、成長
開始温度800℃、冷却速度0.5℃/分の条件で4分
間成長をさせると、リツジ1a,1bの頂面上で
は0.3μm、リツジ1a,1b間の部分では1.8μ
mの膜厚が得られる。
The growth process of n-type Ga 1-x Al x As layer 2 is as follows:
The difference between the sides of ridges 1a and 1b and the other surfaces is that when growth is performed for 4 minutes at a growth start temperature of 800°C and a cooling rate of 0.5°C/min, the thickness is 0.3 μm on the top surface of ridges 1a and 1b, and 0.3 μm on the top surface of ridge 1a. , 1.8μ in the part between 1b
A film thickness of m is obtained.

基板1のリツジ1a,1b間の部分上での結晶
成長の速度はリツジ1a,1bの高さによつて異
なる。すなわち、リツジ1a,1bが低い場合
(約1μm以下)、リツジ1a,1bと同一の高さ
まで成長するが、リツジ1a,1bが約1μm以
上になると第1図Bに示すように凹状をなす成長
となる。
The rate of crystal growth on the portion of the substrate 1 between the ridges 1a and 1b varies depending on the height of the ridges 1a and 1b. That is, when the ridges 1a and 1b are low (about 1 μm or less), they grow to the same height as the ridges 1a and 1b, but when the ridges 1a and 1b are about 1 μm or more, they grow in a concave shape as shown in FIG. 1B. becomes.

このn型Ga1-xAlxAs層2上にGa1-yAlyAs活性
層3を極めて薄く成長させる。この場合もリツジ
1a,1b上の成長速度が遅くなるため薄膜成長
には有利であり、0.1μmの膜厚が再現性よく得
られる。クラツド層2の、リツジ1a,1bの外
側部分上、すなわち斜面部分上では、活性層3の
成長速度が平坦面上でのそれに比べて大きいた
め、活性層3の厚さはクラツド層3の頂面上に比
べてその斜面上の方が大となる。リツジ1a,1
b間の活性層3の膜厚はリツジ1a,1bの頂面
上の部分よりもわずかに厚くなり、ほぼ平坦な面
となる。活性層3の上にさらに厚さ2μmのp型
Ga1-xAlxAs層4および厚さ1μmのp型GaAs層
5を順次形成する。ストライプ構造としてヘテ
ロ・アイソレーシヨンとする場合、さらに厚さ1
μmのn型Ga0.5Al0.5As層6が必要となる
が、酸化膜ストライプの場合には成長後、CVD
法やスパツタ法によつて膜を形成する(第1図
C)。ここでは、ヘテロ・アイソレーシヨンスト
ライプ構造について説明する。第1図Cのウエハ
上にマスク用として酸化膜を形成し、フオトエツ
チング技術によつてリツジ1a,1b間の直上に
幅5μmの窓あけをする。さらに、熱リン酸やヨ
ードエツチ液等を用いて選択エツチング法によつ
てp型GaAs層5がストライプ状に露出するまで
n型Ga0.5Al0.5As層6の窓あけをする。電極
とのコンタクトをよくするためにZnによる追加
拡散をし、p+層を窓部に形成した後、Ti−Pt−
Auを蒸着することによつて正電極8を形成し、
さらに全体の厚みが約100μmになるよう裏面エ
ツチを行う。裏面エツチの溶液としてはH2O:
H2O2:H2SO4=1:1:8の液を用いる。エツ
チ後、裏面にAu−Ge−Niを蒸着し、負電極7を
形成する(第1図D)。
A very thin Ga 1-y Al y As active layer 3 is grown on this n-type Ga 1-x Al x As layer 2 . In this case as well, the growth rate on the ridges 1a and 1b is slow, which is advantageous for thin film growth, and a film thickness of 0.1 μm can be obtained with good reproducibility. On the outer parts of the ridges 1a and 1b of the cladding layer 2, that is, on the sloped parts, the growth rate of the active layer 3 is faster than that on the flat surface, so the thickness of the active layer 3 is smaller than that on the top of the cladding layer 3. It is larger on the slope than on the surface. Ritsuji 1a, 1
The thickness of the active layer 3 between ridges 1a and 1b is slightly thicker than that on the top surfaces of ridges 1a and 1b, and the active layer 3 has a substantially flat surface. Further on top of the active layer 3 is a p-type layer with a thickness of 2 μm.
A Ga 1-x Al x As layer 4 and a 1 μm thick p-type GaAs layer 5 are sequentially formed. When using hetero isolation as a striped structure, the thickness is further increased by 1
μm n-type Ga 0.5 Al 0.5 As layer 6 is required, but in the case of oxide film stripes, after growth, CVD
A film is formed by a sputtering method or a sputtering method (FIG. 1C). Here, a hetero isolation stripe structure will be explained. An oxide film is formed as a mask on the wafer shown in FIG. 1C, and a window with a width of 5 μm is formed directly above the ridges 1a and 1b by photoetching. Furthermore, a window is opened in the n-type Ga 0.5 Al 0.5 As layer 6 by selective etching using hot phosphoric acid, iodine etchant, etc. until the p-type GaAs layer 5 is exposed in a striped pattern. After additional diffusion with Zn and forming a p + layer in the window to improve contact with the electrode, Ti−Pt−
A positive electrode 8 is formed by depositing Au,
Furthermore, the back side is etched so that the total thickness is approximately 100 μm. H 2 O is the solution for back side etching:
A solution of H 2 O 2 :H 2 SO 4 =1:1:8 is used. After etching, Au-Ge-Ni is deposited on the back surface to form a negative electrode 7 (FIG. 1D).

以上のようにして作製したレーザ装置の特徴を
次に述べる。第2図に示すようにリツジ1a,1
bより外側の高さd2と溝の深さd1とは必ずしも一
致させておく必要はないが、一例としてd1=d2
1.5μmの基板を用いたレーザを作製した。
The characteristics of the laser device manufactured as described above will be described below. As shown in Figure 2, the ridges 1a, 1
The height d 2 outside b and the depth d 1 of the groove do not necessarily have to match, but as an example, d 1 = d 2 =
We created a laser using a 1.5 μm substrate.

正電極8と負電極7との間に電圧を印加し、こ
の半導体レーザ装置に通電すると、活性層3の、
リツジ1a,1b間の溝部上の部分で、単一スポ
ツト状のレーザ発振が生じた。その光出力と電流
との関係は直線性のよいものであつた。そして、
その発振に要する動作電流も少なくてよい。これ
は、リツジ1a,1bの頂面上でのクラツド層2
の厚みが非常に薄く形成されているので、この部
分では光が基板1に吸収されて、発振部分が特定
されるとともに、クラツド層2と活性層3の厚み
がリツジ1a,1bの外側の側面近傍の部分で大
となつているので、電流の広がりが効果的に抑制
されるためと考えられる。
When a voltage is applied between the positive electrode 8 and the negative electrode 7 and the semiconductor laser device is energized, the active layer 3
Single spot laser oscillation occurred on the groove between the ridges 1a and 1b. The relationship between the optical output and the current had good linearity. and,
The operating current required for the oscillation may also be small. This corresponds to the cladding layer 2 on the top surface of the ridges 1a and 1b.
Since the thickness of the cladding layer 2 and the active layer 3 are extremely thin, the light is absorbed by the substrate 1 in this part, and the oscillation part is specified. This is thought to be because the current spread is effectively suppressed because it is large in the vicinity.

レーザ発振のしきい値電流密度は、リツジ1
a,1bの寸法に依存する。これについて、以下
具体的に説明する。
The threshold current density for laser oscillation is 1
It depends on the dimensions of a and 1b. This will be specifically explained below.

第3図には溝の幅W1を5μmとした時の発振
しきい値電流密度Jthとリツジ1a,1bの幅
W2,W3との関係を示している。図中、実線はW2
がW3と同じ幅のもの(W2=W3)であり、破線は
W2=100μm一定とした場合のJthの変化を示し
ている。W2を100μm以上とした場合のJthの変
化の様子は、ほぼ破線と同じであつた。この結果
より、W3が100μm以上ではJthはほとんど一定
となるが、W3<100μmになるとJthはW3ととも
に単調に減少するのがわかる。ただ、W3を1μ
mよりも狭く形成すると、レーザ発振は単一スポ
ツト状でなくなる。したがつて、実用的には、そ
の幅を1〜100μmとすることが好ましい。
Figure 3 shows the oscillation threshold current density J th and the width of ridges 1a and 1b when the groove width W 1 is 5 μm.
It shows the relationship with W 2 and W 3 . In the figure, the solid line is W 2
is the same width as W 3 (W 2 = W 3 ), and the dashed line is
It shows the change in J th when W 2 =100 μm constant. The change in J th when W 2 was set to 100 μm or more was almost the same as the broken line. From this result, it can be seen that J th is almost constant when W 3 is 100 μm or more, but J th monotonically decreases with W 3 when W 3 <100 μm. However, W 3 is 1μ
If it is formed narrower than m, the laser oscillation will not be in the form of a single spot. Therefore, practically, it is preferable that the width is 1 to 100 μm.

リツジ1a,1bの間隔については、それが1
μmよりも狭くなると、発生した光がリツジ1
a,1bを通して基板1に吸収される比率が高く
なるので、レーザ発振のしきい値電流密度が高く
なる。また、その間隔が10μmよりも広くなる
と、発振しきい値電流密度が高くなる。実使用
上、リツジ1a,1bの幅は1〜10μmの範囲内
とすることが望ましい。
Regarding the distance between the ridges 1a and 1b, it is 1
When it becomes narrower than μm, the generated light becomes narrower than 1 μm.
Since the ratio of absorption into the substrate 1 through a and 1b increases, the threshold current density for laser oscillation increases. Furthermore, when the interval is wider than 10 μm, the oscillation threshold current density becomes high. In practical use, it is desirable that the width of the ridges 1a, 1b be within the range of 1 to 10 μm.

第4図には、d2=1.5μm,d3=1.8μm,W3
W2=1μmとした時の、d1によるJthの変化を示
したものである。図のようにd1が0.7μmから1.7
μm程度の範囲ではJthはほとんど変化ないが、
d1が0.7μm以下ではJthが急峻に増加する。これ
はd1が0.7μm以下になるとリツジ1a,1b間
の溝部直上で発生した光がn−GaAs基板1に吸
収される比率が大きくなるからで、この吸収の度
合は活性領域とn−GaAs基板1との距離が短い
ほど大きくなる。一方、d1が1.7μm以上になる
と溝部分での直列抵抗が高くなり、電流が溝部分
にある活性層2の領域を流れにくくなるためであ
る。
In Figure 4, d 2 = 1.5 μm, d 3 = 1.8 μm, W 3 =
This figure shows the change in J th due to d 1 when W 2 =1 μm. As shown in the figure, d 1 is from 0.7μm to 1.7
Although J th hardly changes in the range of about μm,
When d 1 is 0.7 μm or less, J th increases sharply. This is because when d 1 becomes 0.7 μm or less, the ratio of light generated directly above the groove between the ridges 1a and 1b being absorbed by the n-GaAs substrate 1 increases, and the degree of absorption increases between the active region and the n-GaAs substrate 1. The shorter the distance to the substrate 1, the larger the distance. On the other hand, if d 1 is 1.7 μm or more, the series resistance in the groove portion becomes high, making it difficult for current to flow through the region of the active layer 2 located in the groove portion.

発明の効果 本発明の方法においては、半導体基板の一方の
主面側を、対をなすリツジが実質的な平面上に平
行に突出する形状に形成してから、これらリツジ
を有する基板面上にクラツド層と活性層とを順次
形成している。そのため、クラツド層はリツジ頂
面上では薄く、また対をなすリツジの外側面近傍
の部分がそれよりもリツジから遠い部分に比べて
容易に厚く形成される。そして、活性層も対をな
すリツジの外側面近傍の部分がそれよりも遠去か
つた部分に比べて容易に厚く成長する。したがつ
て、この方法によれば、実施が非常に容易である
だけでなく、レーザ発振部分をきわめて狭い領域
に制限することができるので、単一モード発振さ
せることができるだけでなく、動作電流の少ない
半導体レーザ装置を作製することができる。
Effects of the Invention In the method of the present invention, one main surface side of a semiconductor substrate is formed into a shape in which a pair of ridges protrudes parallel to a substantially flat surface, and then the ridges are formed on the substrate surface having these ridges. A cladding layer and an active layer are sequentially formed. Therefore, the cladding layer is thin on the top surface of the ridge, and is easily formed thicker in the vicinity of the outer surfaces of the paired ridges than in the portions farther from the ridges. Also, the active layer easily grows thicker in the vicinity of the outer surfaces of the paired ridges than in the parts further away. Therefore, according to this method, not only is it very easy to implement, but also the laser oscillation part can be limited to an extremely narrow area, so that not only can single mode oscillation be achieved, but also the operating current can be reduced. It is possible to manufacture a small number of semiconductor laser devices.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図A〜Dは本発明の方法の一実施例の製造
工程を説明するための断面図、第2図は本発明の
方法によつて得られる半導体レーザ装置の特性を
説明するための要部拡大断面図、第3図および第
4図は同装置のリツジの寸法としきい値電流密度
との関係を示す図である。 1……n−GaAs基板、2……n−Ga1-xAlxAs
層、3……n−Ga1-yAlyAs層、4……p−
Ga1-xAlxAs層、5……p−GaAs層、6……n−
Ga0.5Al0.5As層、7……n側電極、8……p
側電極。
1A to 1D are cross-sectional views for explaining the manufacturing process of an embodiment of the method of the present invention, and FIG. 2 is a cross-sectional view for explaining the characteristics of a semiconductor laser device obtained by the method of the present invention. The enlarged cross-sectional views of FIGS. 3 and 4 are diagrams showing the relationship between the ridge dimensions and the threshold current density of the device. 1... n-GaAs substrate, 2... n-Ga 1-x Al x As
Layer, 3...n-Ga 1-y Al y As layer, 4...p-
Ga 1-x Al x As layer, 5... p-GaAs layer, 6... n-
Ga 0.5 Al 0.5 As layer, 7... n-side electrode, 8... p
side electrode.

Claims (1)

【特許請求の範囲】[Claims] 1 半導体基板の表面に、互いに平行な二つのリ
ツジを形成して前記リツジ間にストライプ状溝を
形成する工程と、前記二つのリツジを有する前記
半導体基板上にクラツド層を、前記二つのリツジ
上での厚さを他の領域上での厚さより薄く、かつ
前記ストライプ状溝上の表面を下方に湾曲させて
形成する工程と、前記クラツド層上に活性層を、
前記二つのリツジ上での厚さを他の領域上での厚
さより薄く形成する工程と、前記ストライプ状溝
上方の前記活性層の上方に電流流入部を形成する
工程とを備えていることを特徴とする半導体レー
ザ装置の製造方法。
1. Forming two parallel ridges on the surface of a semiconductor substrate and forming a striped groove between the ridges, forming a cladding layer on the semiconductor substrate having the two ridges, and forming a cladding layer on the semiconductor substrate having the two ridges. a step of forming an active layer on the cladding layer by making the thickness thinner than the thickness on other regions and curving the surface above the striped grooves downward;
and forming a current inflow portion above the active layer above the striped groove. A method for manufacturing a featured semiconductor laser device.
JP60094732A 1985-05-02 1985-05-02 Manufacture of semiconductor laser device Granted JPS60239087A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60094732A JPS60239087A (en) 1985-05-02 1985-05-02 Manufacture of semiconductor laser device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60094732A JPS60239087A (en) 1985-05-02 1985-05-02 Manufacture of semiconductor laser device

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP60101863A Division JPS61179590A (en) 1985-05-14 1985-05-14 semiconductor laser equipment

Publications (2)

Publication Number Publication Date
JPS60239087A JPS60239087A (en) 1985-11-27
JPS6238875B2 true JPS6238875B2 (en) 1987-08-20

Family

ID=14118285

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60094732A Granted JPS60239087A (en) 1985-05-02 1985-05-02 Manufacture of semiconductor laser device

Country Status (1)

Country Link
JP (1) JPS60239087A (en)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5513991A (en) * 1978-07-18 1980-01-31 Nec Corp Method of manufacturing semiconductor laser

Also Published As

Publication number Publication date
JPS60239087A (en) 1985-11-27

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