JPS6239260B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to a method for electronically controlling an engine. A method of calculating engine control amounts using a digital computer by executing a program at predetermined time intervals is disclosed in, for example, Japanese Patent Laid-Open No. 53-40105. As the engine control content becomes more complex, the program is broken down into tasks for each engine control function, multiple designers create the tasks separately, and make adjustments as necessary, and these tasks are combined to create a control system. It has become necessary to complete the Furthermore, control contents are changed in response to vehicle model changes or changes in control specifications, and as a result, the tasks that make up the control system often vary. In such a case, it is necessary that adding or deleting a task does not affect the execution results of other tasks. In conventional systems, all control of task execution was performed in accordance with the occurrence of interrupts, so addition or deletion of tasks required changes to the hardware that was the interrupt generation circuit. Also, each time a task finishes executing, an interrupt is generated and another task is executed, so the interrupt generation conditions are changed.
The execution conditions of other tasks have changed. For this reason, there was a problem that adding or deleting tasks could not be done easily or required a lot of effort. SUMMARY OF THE INVENTION An object of the present invention is to provide an electronic engine control method that allows tasks to be easily added or deleted. A first method of the present invention includes a first step of detecting information necessary to control the engine using a sensor, and a digital computer controlling the engine by executing a program stored in a memory based on the detected information. In the control method, the program has a second step of calculating a value for controlling the engine, and a third step of controlling the engine based on the calculation result of the digital computer. It has tasks that are executed at a startup cycle determined based on the effect that the function has on the engine, and the startup cycle of each task is indicated by the number of times the INTV interrupt occurs per unit time, and the INTV interrupt request mentioned above is The fourth step is to suspend the execution of the above task regardless of its task level and generate an INTV interrupt, and the fourth step is to detect whether or not the activation period of each task has been reached due to the occurrence of the INTV interrupt, and the task that has reached its activation period. The fifth step is to display the Q flag indicating a startup request, and the fifth step is to execute the task at the higher level of the level of the task that was interrupted due to the occurrence of the INTV interrupt and the level of the task for which the Q flag is displayed. It has 6 steps. A second method of the present invention includes a first step of detecting information necessary to control the engine using a sensor, and a digital computer controlling the engine by executing a program stored in a memory based on the detected information. In the control method, the program has a second step of calculating a value for controlling the engine, and a third step of controlling the engine based on the calculation result of the digital computer. It has tasks that are executed at a startup cycle determined based on the effect that the function has on the engine, and the startup cycle of each task is indicated by the number of times the INTV interrupt occurs per unit time, and the INTV interrupt request mentioned above is The fourth step is to suspend the execution of the above task regardless of its task level and generate an INTV interrupt, and the fourth step is to detect whether or not the activation period of each task has been reached due to the occurrence of the INTV interrupt, and the task that has reached its activation period. The fifth step is to display the Q flag indicating a startup request, and the fifth step is to execute the task at the higher level of the level of the task that was interrupted due to the occurrence of the INTV interrupt and the level of the task for which the Q flag is displayed. 6 steps and a Q that indicates a startup request when the execution of the above task is finished.
The presence or absence of the flag is checked, the task with the highest level among the tasks for which the Q flag is displayed is executed, and this process is repeated thereafter. First, regarding fuel system control, an example of fuel supply is shown in FIG. FIG. 1 is a cross-sectional view of the throttle chamber of the engine. First, the control of the amount of fuel and bypass air supplied to the throttle chamber by the operation of each solenoid provided around the throttle chamber will be explained. An accelerator pedal (not shown) controls the opening of a low-speed throttle valve 12, thereby controlling the amount of air supplied from an air cleaner (not shown) to each cylinder of the engine. The opening of this low-speed throttle valve becomes larger,
When the amount of air passing through the low-speed bench lily increases, the high-speed throttle 14 is opened using a diaphragm (not shown) due to negative pressure in the low-speed bench lily. This reduces the increase in air resistance due to an increase in the amount of intake air. The air flow rate thus controlled by the throttle valve and supplied to the engine is captured as an analog quantity by a negative pressure sensor (not shown). Based on this analog quantity and other signals from sensors to be described later, the opening degree of each solenoid valve 16, 18, 20, 22 shown in FIG. 1 is controlled. Next, control of the fuel supply amount will be explained. Fuel from the fuel tank is conducted from conduit 24 through main jet 26 to conduit 28. Additionally, fuel in conduit 24 is also directed to conduit 28 via main solenoid valve 18. Therefore, the larger the opening of the main solenoid valve 18, the more fuel will be introduced into the conduit 28, and these fuels will be further mixed with air in the main emulsion tube 30 and will be sent to the vent lily 34 through the main nozzle 32. Supplied. When the high-speed throttle 14 is opened, fuel is further sucked out from the nozzle 36 to the bench lily 38. Meanwhile, the slow solenoid valve 16 is also controlled at the same time as the main solenoid valve 18.
When the slow solenoid valve 16 opens, air passes through the air cleaner through the opening 40.
is supplied to conduit 42. Fuel from conduit 28, on the other hand, is supplied to conduit 42 via slow emulsion tube 44. Therefore, the amount of fuel in conduit 42 decreases as the amount of air from slow solenoid valve 16 increases. This mixture of fuel and air in conduit 42 is supplied to the throttle chamber through a slow hole 46. The fuel solenoid valve 20 is a valve for increasing the amount of fuel, and is used for increasing the starting amount, increasing the amount for warming up, etc. The fuel introduced through the hole 48 communicating with the conduit 42 is supplied to the fuel solenoid valve 2.
Depending on the opening amount of 0, it is directed to a conduit 50 leading to the throttle chamber. The air solenoid valve 22 is a valve that controls the amount of air supplied to the engine, and air from the air cleaner is supplied to the air solenoid valve 22 through an opening 52, and a conduit leading to the throttle chamber according to the opening. You will be led to 54. The slow solenoid valve 16 and main solenoid valve 18 shown in FIG. 1 control the air-fuel ratio, and the fuel solenoid valve 20 increases the amount of fuel. Furthermore, the slow solenoid valve 16 and the main solenoid valve 18
and air solenoid valve 22 to control engine speed at idle. In the ignition device shown in FIG. 2, a pulse current is supplied to a power transistor 64 via an amplifier 62, and the transistor 64 is turned on by this current. As a result, the ignition coil 68 from the battery 66
Primary coil current flows to. At the fall of this pulse current, the transistor 64 is cut off,
A high voltage is generated in the secondary coil of the ignition coil 68. This high voltage is distributed via a power distributor 70 to each spark plug 72 in each cylinder of the engine in synchronization with engine rotation. FIG. 3 is for explaining an exhaust gas recirculation (hereinafter referred to as EGR) system, in which constant negative pressure from a negative pressure source 82 is applied to a control valve 86 via a constant pressure valve 84. The constant pressure valve 84 controls the ratio of the constant negative pressure of the negative pressure source to the atmosphere 88 according to the ON duty ratio of the repeated pulses applied to the transistor 90, and controls the state of application of negative pressure to the control valve 86. Therefore, the negative pressure applied to the control valve 86 is determined by the ON duty ratio of the transistor 90. The amount of EGR flowing from the exhaust pipe 92 to the intake pipe 82 is controlled by the controlled negative pressure of the constant pressure valve 84. FIG. 4 is an overall configuration diagram of the control system.
CPU 102 and read-only memory 104
(hereinafter referred to as ROH), the lander 4 access memory 106 (hereinafter referred to as RAM), and the input/output circuit 1
It consists of 08. The above CPU102 is
Using various programs stored in the ROM 104, input data from the input/output circuit 108 is operated, and the operation results are returned to the input/output circuit 108 again. The intermediate storage required for these operations is RAM.
106 is used. CPU102, ROM104,
Various types of data are exchanged between the RAM 106 and the input/output circuit 108 via a bus line 110 consisting of a data bus, a control bus, and an address bus. The input/output circuit 108 includes a first analog-digital converter 122 (hereinafter referred to as ADC1) and a second analog-digital converter 124.
(hereinafter referred to as ADC2) and angle signal processing circuit 126
It waits for input means to the discrete input/output circuit 128 (hereinafter referred to as DIO) for inputting and outputting 1-bit information. ADC1 includes a battery voltage detection sensor 132 (hereinafter referred to as VBS) and a cooling water temperature sensor 134 (hereinafter referred to as VBS).
(hereinafter referred to as TWS) and atmospheric temperature sensor 136 (hereinafter referred to as TAS)
), the adjustment voltage generator 138 (hereinafter referred to as VRS), and the throttle angle sensor 140 (hereinafter referred to as θ
The outputs of the λ sensor 142 (hereinafter referred to as λS) and the multiplexer 162 (hereinafter referred to as λS)
MPX 162 selects one of them and inputs it to an analog-to-digital conversion circuit 164 (hereinafter referred to as ADC).
The digital value that is the output of the ADC 164 is held in a register 166 (hereinafter referred to as REG). In addition, the negative pressure sensor 144 (hereinafter referred to as VCS)
It is input to the ADC2.124, converted to digital via the analog-to-digital conversion circuit 172 (hereinafter referred to as ADC), and converted into a register 124 (hereinafter referred to as ADC).
REG). The angle sensor 146 (hereinafter referred to as ANGS) outputs a signal indicating a reference crank angle, for example, 180 degrees crank angle (hereinafter referred to as REF), and a signal indicating a minute angle, for example, 1 degree crank angle (hereinafter referred to as POS). The signal is applied to the angle signal processing circuit 126, where the waveform is shaped. The DIO 128 includes an idle switch 148 (hereinafter referred to as IDLE-SW), a top gear switch 150 (hereinafter referred to as TOP-SW), and a starter switch.
A switch 152 (hereinafter referred to as START-SW) is input. Next, a pulse output circuit and a controlled object based on the calculation results of the CPU 102 will be explained. In this embodiment, an air-fuel ratio control device 162 (hereinafter referred to as CABC) controls the slow solenoid 16 and the main solenoid 18 by changing the pulse duty. By increasing the on-duty of CABC 162, main solenoid 18 tends to reduce its fuel supply, which is applied via inverter 163. On the other hand, the amount of fuel supplied to the slow solenoid 16 increases as the on-duty of CABC increases. CABC162
is a register 16 for setting the repeat pulse period.
6 (hereinafter referred to as CABP) and a register 164 (hereinafter referred to as CABD) for setting on-duty, and these data are set by the CPU 102, respectively. The ignition pulse generation circuit 166 (hereinafter referred to as IGNC) is a register 16 that sets ignition timing data.
6 (hereinafter referred to as ADV) and a register 168 (hereinafter referred to as DWL) that controls the ignition coil primary current energization time, and these data are stored in the CPU 102.
It is set from This output pulse of IGNC 164 is applied to ignition device 170. The details of the igniter 170 are shown in FIG. 2, and the output pulses are applied to the amplifier 62 of FIG. The fuel increase pulse generating circuit 172 (hereinafter referred to as FSC) controls the on-duty of the pulse to control the fuel solenoid 20 shown in FIG. 1, and the register 176 sets the repetition period.
(hereinafter referred to as FSCP) and a register 176 (hereinafter referred to as FSCD) for setting on-time. EGR amount control pulse generation circuit 180 (hereinafter referred to as EGRC)
) is a register 182 (hereinafter referred to as EGRP) for setting pulse repetition period data.
and a register 180 (hereinafter referred to as EGRD) for setting on-time data, and a repetitive pulse is applied to the air solenoid valve 22 via an AND gate 184. This AND gate 184 has the output DIO1 of DIO128.
When the DIO1 signal is at L level, the AND gate 184 is closed and the air solenoid valve 22 is controlled. On the other hand, when DIO1 is at H level, AND gate 186
closes and controls the EGR device 188. The basic configuration of the EGR device 188 is shown in FIG. As mentioned above, DIO 128 is a 1-bit signal input/output circuit, and is a register (hereinafter referred to as DDR) 1 that holds data for determining input or output.
92, a register 194 for holding output data (hereinafter referred to as DOUT), and a register 196 for holding input data (hereinafter referred to as DIN).
It has This DIO 128 outputs a signal DIO0 for controlling the fuel pump 190. FIG. 5 shows a program system for the control circuit shown in FIG. When the power is turned on by a key switch (not shown), the CPU 102 enters a start mode and executes an initialization program (INITIALIZ) 204. Next, execute the monitoring program (MONIT) 206 and execute the BACK GROUND JOB 2.
Execute 08. This background job includes, for example, the EGR amount calculation task (hereinafter referred to as EGR
CAL.TASK) and fuel solenoid valve and air solenoid valve calculation tasks (hereinafter referred to as EISC). During the execution of this TASK, if an interrupt factor (hereinafter referred to as IRQ) occurs,
From the IRQ disclosure step 222, an IRQ factor analysis program 224 (hereinafter referred to as IRQ ANAL) is executed. This IRQ ANAL program is further
ADC1 end interrupt processing (hereinafter referred to as ADC1END IRQ) program 226 and ADC2 end interrupt processing (hereinafter referred to as ADC2END IRQ) program 228
, a certain period elapsed interrupt processing (hereinafter referred to as INTV IRQ) program, and an engine stop interrupt processing (hereinafter referred to as INTV IRQ) program.
It consists of a program (hereinafter referred to as ENST IRQ) and issues a startup request (hereinafter referred to as QUEUE) to each task that needs to be started, which will be described later. Each program in this IRQ ANAL program 224 ADC1 END IRQ226 and ADC2 END
Each task to which a QUEUE is issued by each program of IRQ228 and INTV IRQ230 is a level zero task group 252, a level 1 task group 254, a level 2 task group 256, and a level 3 task group 25.
6, or each task group is a constituent task. Also ENST IRQ Program 232
The task in which QUEUE occurs is the engine stop processing task 262 (hereinafter referred to as ENST TASK). When this ENST TASK 262 is executed, the control system enters the start mode again and returns to the starting point 202. The task scheduler 242 sets the execution order of the tasks so that they are executed starting with the task in which the QUEUE is occurring or the task with the highest level among the tasks whose execution has been interrupted (here, level zero is the highest). decide. When the execution of the task group is completed, the completion report program 258 (hereinafter referred to as EXIT) reports the completion. Based on this completion report, the task group with the highest level among the task groups waiting for execution is executed next. When there are no more suspended tasks or QUEUE tasks, the task scheduler 242
The process then moves on to executing the background job 208 again. Furthermore, if an IRQ occurs while any of the level 0 task group to level 3 task group is being executed, the process returns to the starting point 222 of the IRQ processing program. Table 1 shows the activation of each task and its functions.

【table】

[Table] In this Table 1, IRQ ANAL
There are programs, TASK SCHDULER, and EXIT. These programs (hereinafter referred to as OS) are held at addresses A000 to A300 of the ROM 104 as shown in FIG. Furthermore, as a level zero program
There are AD1IN, AD1ST, AD2IN, AD2ST, and RPMIN programs, and usually INTV IRQ 10 [m
SEC]. There are CARBC, IGNCAL, and DWLCAL programs as level 1 programs, which are activated every 20 [mSEC] of INTV IRQ. There is a level 2 program, the LAMBDA program, which is activated every 40 [mSEC] of INTV IRQ. There is a HOSEI program as a level 3 program, which is recorded every 100 [mSEC] of INTV IRQ. There are also EGRCAL and FISC programs as background jobs. The above level zero program starts from address A700 of ROM104 in Figure 6 as PROG1.
Stored in AB00. Level 1 program is PROG2 at address AB0 of ROM104.
It is stored from 0 to AE00. The level 2 program is the address of TROM104 as PROG3.
It is stored from AF00 to B000. The level 3 program is stored as PROG4 at addresses B000 to B100 of the ROM 104.
Also, background job programs are held from B100 to B200. The list of start addresses for each program from PROG1 to PROG4 above (see below)
SFTMR) is held from B200 to B300, and values representing each program activation cycle from PROG1 to PROG4 (hereinafter referred to as TTM) are stored at addresses B300 to B400. Other data is B400 to B5 as necessary.
00 is stored. Subsequently, data for calculations, ADV/MAP, AF/MAP, and EGR/MAP, are stored. Details of the INITIALIZ204 program in FIG. 5 will be explained using FIG. 7. At step 282
Set the evacuation area when an IRQ occurs. Next, in step 284, all RAM 106 is cleared. step
In step 286, initial values are set in the registers of the input/output circuit 108. This initial value setting includes, for example, the number of engine cylinders, the initial value of the angle sensor 146, the DDR setting of DIO 128, the timer setting for INTV IRQ generation, the detection period setting for ENST IRQ generation, and engine rotation speed detection. There is a measurement time setting for. Start up ADC1 in step 288, and
Release the prohibition for ADC1ENDIRQ. In this case, the program jumps to address A701 in FIG. 6, which is the start address of the AD1ST program. As a result, the output of the battery voltage detection sensor VBS132, which is one of the inputs of MPX of the ADC1/122 in FIG. 4, is selected and input to the ADC164. Return to step 290 and enter ADC1END IRQ here.
wait. The operation of ADC164 is completed and REG16
When the digital value is set to 6, the status
The completion of the operation of ADC 164 is reported to register STAUS 198, and ADC1END IRQ is input to CPU 102. As a result, the program AD1IN is executed and the output of the sensor 132 is taken in. At step 292, it is checked whether all values from sensors 132 to 142 have been taken in. In this case sensor 1
Since the acquisition of input No. 32 has only been completed, the process returns to step 288. Again in this step 288
The AD1ST program is started, and the MPX 162 selects the next input, the output of the sensor 134. When the analog-to-digital conversion of the output of the step sensor 134 is completed, the program AD1IN is executed again at step 292, and the register REG1 is
Water temperature sensor TWS134 held in 66
ROM10 into which the digital value of the output is taken
It is held in the DATA area of 4. At step 292, the process returns to step 288. In this way, by going through the loop from step 288 to step 292, the digital values of the outputs of the sensors 132 to 142 are successively captured, and when the capture of the output value of the λ sensor λS 142 is completed, the process proceeds to step 294. In step 294, the ignition timing at startup is calculated and set. This ignition timing θADV (ST) is calculated as a function of the engine cooling water temperature TW. This function is shown in FIG. According to the characteristics shown in Figure 9, θ
ADV(ST) is calculated, and the result of this calculation is set in the register ADV166 of the IGNC 164 in FIG. In step 296, the air solenoid valve 22 is calculated at the time of starting. This calculation is performed based on the characteristics shown in FIG. 10, and the calculation output is set in register EGRD180. Furthermore, EGRP18
A fixed value is also set for 2. The characteristics in Figure 10 are EGRD1 for the set value of EGRP182.
80 set values. In step 298, an initial value for the fuel solenoid on duty is calculated. This calculated value is the 11th
This is done according to the diagram, and the register CABP
The ratio of the setting value of register CABD 164 to the setting value of register CABD 166 is shown as a characteristic diagram in FIG. By setting the data in registers CABD164 and CABP166, the program shown in Figure 5 is executed.
The execution of INITIALIZ204 is finished and shown in Figure 8.
Moving on to the MONIT program 206. The MONIT program 206 starts at step 302, and at step 302 the DIN of DIO 128 is checked to see if the starter switch 152 of FIG. 4 is in the ON state.
This is done by monitoring register 196. If the starter switch 152 is in the ON state, the 6th bit of the DIN register 196 is “H”.
It is becoming. Conversely, if it is OFF, it will be “L”.
It is becoming. Assuming that the engine has not yet started, the starter switch is OFF and the step
Proceeding from step 302 to step 312, it is determined here whether or not it has started. This determination is made, for example, by determining whether a starter flag is set. This starter flag is set in step 308. Since the starter flag is not set before starting, the result in step 312 is NO, and the process returns to step 302.
Return to The route goes from step 302 NO to step 312 NO and back to step 302 until the starter switch 152 is turned on. While going around this route, monitor the starter switch. When the starter switch is turned on, the determination in step 302 becomes YES, and the process proceeds to step 304. At this point, determine whether the starter switch was already turned on. When proceeding to step 304 for the first time, it is immediately after detecting that the starter switch is ON, and the determination at step 304 is NO. step
304 is also determined based on whether the starter flag is set. If the starter flag is not set, the judgment is NO and the process proceeds to step 306, where preparations for starting are made. For example, in this embodiment, in order to start the fuel pump 190,
Set the zeroth bit of DOUT register 194 of DIO 128 to "H". This will turn on the fuel pump. Next step 306
Then, the first bit of the DOUT register 194 is set to "L". As a result, the air solenoid 22 is controlled by the output of the EGRC circuit 178. In reality, the zero and first bits of DOUT register 194 are set at the same time. In step 308, INTV IRQ is disabled, and ignition output is disabled. This INTV
The inhibition of IRQ is canceled, for example, by setting the fourth bit of the MASK register 200 in FIG. 4 to "H". Furthermore, in step 308, a starter flag is set. This starter flag is already
This flag indicates that the switch is ON, and this flag is used for determination in steps 304 and 312. In step 310, the output system of the input/output circuit 108, CABC 162, IGNC 164, and FSC 172, is connected.
In order to activate the EGRC 178, the mode register, which will be explained later, is set to "H". This sends a pulse output to each control device. The process returns from step 310 to step 302, where it is determined whether the starter switch 152 is ON. The starter switch is ON during startup, and the process advances to step 304 from YES. This step
At step 304, the starter flag is checked, and if the flag is set, it is assumed that the start is already in progress and the process returns to step 302. While the starter motor is being driven in this manner, a loop made of steps 302 YES and 304 YES continues. When the engine is started, starter switch 1
Since 52 is OFF, the judgment at step 302 is
If NO, proceed to step 312. The starter flag is checked in step 312, and since the starter flag is set, the process advances to step 314. In this step 314, the inhibition of ENST IRQ is canceled, and the engine will be stopped from this step 316 onward.
Can be detected with ENST IRQ. Next, proceed to program 208, which is detailed in FIG. In FIG. 12, at step 410 the idle
It is determined whether the switch 148 is ON. If ON, exhaust gas recirculation will not take place. Therefore, proceed to step 412, where the air solenoid valve 22 is connected to the register DOUT19 of DIO.
It is designated by setting the first bit of 4 to "L". Therefore, air solenoid valve 22 of FIG. 1 is controlled in accordance with the value set in register EGRD 180. In step 414, the duty of the air solenoid valve 22 is set in the register EGRD 180 according to the cooling water temperature. Further, the amount of fuel supplied from the fuel solenoid valve according to the water temperature TW is set in the register FSCD172. Depending on these values, the fuel solenoid valve 20 and the air solenoid valve 22 are
is controlled, and the engine at idle is controlled. Upon completion of this step 416, the process returns to 410 and repeats this flow. On the other hand, when the idle switch 148 is not on, the air solenoid valve 22 is not used, and exhaust gas recirculation is performed instead. For this reason
The EGR device that controls the amount of EGR is driven. In step 418, DIO's DOUT is driven to drive this device.
The fourth bit of register 194 is set to "H", and EGR device 188 is driven with the value set in register EGRD180. Next, in step 420, zero is set in register FSCD 172 to stop driving fuel solenoid 15. step
At 422, it is determined whether the cooling water temperature is higher than a certain value, for example, TA°C, and if it is higher, EGR is not applied. Therefore, in step 426, values for performing EGRCUT are set. In addition, if the cooling water temperature is a constant value (TA℃) in step 422, the process proceeds to step 424.
Proceed to. In step 424, it is determined whether the cooling water temperature is lower than TB degree C. If it is low, then
Since EGR is not applied, a value for EGR CUT is set in step 426. These values are set in step 430.
Set in EGRD register. On the other hand, if the cooling water temperature TW is higher than TB degree and lower than TA degree, EGR is performed. The EGR amount at this time is determined by the output VC of the negative pressure sensor 144 and the engine rotation speed N. A map of the EGR amount based on the outputs VC and N is provided at addresses B701 to B800 of the ROM in FIG. 6, and the EGR amount is determined by searching from this map. Search in step 428. This value is set in register EGRD 180 in step 430. The EGR device 188 shown in FIG. 4 is driven according to the set value of the register EGRD 180. In the flowchart shown in FIG. 12, upon completion of step 430 or step 416, the process returns to step 410 again. By doing so, the computer can always execute the flowchart for controlling the air solenoid 22 from step 410 to step 416 or from step 418 to step 430. Therefore, assuming that IRQ etc. do not occur, the program started from point 202 is INITIALIZ
Background job 208 through program 204 and MONIT program 206
The FISC program or EGRCAL program will always be running. The MONIT program 206 and background job 208 can interrupt their processing by generating an interrupt request (IRQ).
Once the processing by IRQ is completed, execution of the above program is resumed. Next, the processing based on the generation of IRQ in FIG. 5 will be explained. IRQ factor analysis program 22
4 is ADC1END IRQ226 processing and ADC2END
IRQ228 processing and INTV IRQ230 processing
It consists of ENST IRQ232 processing. Here each program 226, 228, 230, 23
In order to execute each of 2, first check what the IRQ request content is. Therefore, STA in Figure 4
The contents of TUS register 198 are examined. this
By looking at the contents of the STATUS register,
The cause of IRQ is revealed. Each of the above programs 226, 228, 230, 2 depending on the cause of this occurrence.
32, this results in TASK252,25
4,256,258,262 must be executed
Issue a startup request (QUEUE) to TASK. However, if the number of IRQs is increased, the execution time of the management program (hereinafter referred to as OS) increases, and there is a drawback that it becomes impossible to take the calculation time for actual engine control. Therefore, in this example, ADC2END
IRQ 228 is generated only during execution of INITI ALIZ or MONIT programs 204 and 206, and is not generated at other times. In other words, MONIT program 2
At step 314 shown in FIG. 8 of 06, the process shown in FIG.
Set the ADC2END IRQ prohibition instruction in the MASK register 200. Also ADC1END IRQ226
In other words, the MASK register is set so that the general reset signal of the input/output circuit disables IRQ generation so that all interrupts are prohibited at the starting point 202. After that, the ADC1END IRQ is disabled by not issuing a command to cancel the IRQ inhibition. A specific example of the program 224 is shown in FIG.
Go to step 502 from the IRQ entrance 222. Here, it is determined whether the IRQ generation request is an ADC2END IRQ, and if so, an activation request is issued to the task level zero program in step 516. This sets a flag of "1" in b6 of task control word TCW0 in RAM 106 shown in FIG. And TASK SCHDULER242
Proceed to. In this embodiment, the ADC2END IRQ is generated only during execution of the INITIALIZ program 204 in FIG. In other conditions
ADC2END IRQ is prohibited. If the determination at step 502 is "NO", the process advances to step 504. In step 504, it is determined whether the IRQ factor is an INTV IRQ that occurs at regular intervals. If “YES”, proceed to step 506. Steps 506 to 514 have the function of determining whether it is time to start programs from task level zero to task level 3. First, check task level zero. task level
Zero task control word, i.e. counter 0 from b0 to b5 of TCW0 in Figure 15.
Increment by +1. step
At 508, the value of counter 0 of TCW0 is compared with the task activation timer TTM0 of FIG. Here TTM0
contains “1”. Here INTV IRQ is 10
Since it is assumed that it occurs every [mSEC],
“1” in TTM0 means that the task level zero program (252 in Figure 5) is 10.
This indicates that it is activated every [mSEC].
The counters CNTR0 and TTM0 in FIG. 15 are compared in step 508, and if they match, the process goes to "YES".
In this case, since they match, the process advances to step 510 and sets flag "1" in b6 of task control load TCW0. In this embodiment, b6 of each TCW becomes a flag for requesting activation of that task. Since the flag "1" is set in b6 of TCW0 in step 510, the counter CNTR0 provided in b0 to b5 of TCW0 is cleared. In step 512, the process moves on to search for activation timing from task level zero to task level 1. In step 514, it is determined whether talc level 3 is finished. In other words, it is determined whether n=4. In this case n=1
Therefore, the process returns to step 506. At step 506, the contents of counter CNTR1 of TCW1 in RAM 106 in FIG. 15, which is the task control word of the talc level 1 program, is incremented by +1. In step 508, the
Compare with TTM1 of ROM104. In this embodiment, the content of TTM1 is "2". In other words, the startup timing of task level 1 is 20 [mSEC]
It is. Assuming that the content of the counter CNTR1 is "1", the determination at step 508 is "NO", that is, it is determined that it is not time to start the task level 1 program 254, and the process advances to step 512.
Here, the task level to be searched again is advanced, and the next task level becomes task level 2. Similarly, when task level 3 is completed, n=4 in step 512, and the condition n=nMAX is satisfied in step 514. and task studio 24
Proceed to 2. If it is not INTV IRQ at step 504, step
Proceed to 518. ENST indicating engine stop here
Determine whether it is an IRQ. “NO” in step 504
In this case, it must be ENST IRQ, and you may skip step 518 and proceed to step 520.
Step 520 stops the fuel pump with a special program based on the engine stop, and also resets the signals of all the output systems of the ignition system fuel.
Return to the starting point 202 in the diagram. FIG. 14 is a detailed flowchart of the task scheduler 242.
Determine whether level n execution is necessary. Initially n=
0, and determines whether it is necessary to execute a program at task level zero. This can be determined by searching b6 and b7 of the task control word TCW. b6 is a startup request flag, and when it is set to "1", it can be seen that the startup request is "present". Further, b7 is a flag indicating that the process is being executed, and if "1" is set here, it means that the process is currently being executed and is currently being interrupted. Therefore, if at least either b6 or b7 is "1", execution is required and the process proceeds to step 538. At step 538, the flag b7 is determined, and if b7 is "1", execution is being interrupted and the interrupted execution is resumed from point 540. Even if flags b6 and b7 are set, the determination at step 538 is still "YES" and the program is restarted from the interrupted program. If only b6 is “1”,
The startup request flag of that level, ie, b6, is cleared in step 542, and the flag b7 (hereinafter referred to as RUN flag) is set in step 544. Steps 542 and 544 indicate that the task level has progressed from the activation request state to the execution state. step 546
to start that task-level program.
Search for an address. This is shown in Figure 15.
Start address table provided in ROM 104 corresponding to TCW of each task level
The task is executed by jumping to this start address when requested by the TSA. Returning to FIG. 14, if the determination in step 530 is "NO", this indicates that the search task level program has not been requested to start, nor has its execution been interrupted. In this case, the search will proceed to the next task level. In other words, the task
The level n becomes n+1 and the level moves by one. Here, it is checked whether n is MAX, that is, 4 in this case, and if it is not 4, the process returns to step 530. This is repeated, and when n=4, the process returns from point 536 to the interruption point of the background job. In other words, at point 536, it is determined that all programs from talc level zero to level 3 do not need to be executed, and the process returns to the point where the back ground job was interrupted before the IRQ occurred. Figure 15 shows the task control system mentioned above.
This figure shows the relationship between the word TCW and the TTM task start address table that represents the task start cycle in the ROM. There is a task activation cycle TTM in the ROM corresponding to 0 to 3 of the task control wart TCW, and it is set for each INTV IRQ.
The TCW counter CNTR is updated and matches the TTM of each task, so b6 of that TCW is updated.
is flagged. Based on this flag, the start address of the task is then searched from the task start address TSA in the ROM, and by jumping to the start address, the selected programs 1 to 4 are executed.
During this execution, a flag is set in b7 of the TCW corresponding to the program in the RAM 106. As long as this flag is set, it can be determined that the program is being executed. In this way, the program of task scheduler 242 in FIG. 5 is executed. For example, programs 252 to 258 for levels 0 to 3.
Either of these will be executed. If an IRQ occurs during this execution, the task is interrupted again and the IRQ is processed. Assuming that no IRQ occurs now, the processing of the currently running task will eventually end. The process then proceeds to the EXIT program 260 to report completion. Details of this EXIT program are shown in FIG. This program consists of steps 562 and 564 for finding paper completion tasks. This step
562 and 564 first search from task level zero to find the completed task level. This advances to step 568 where RUN of b7 of the task control word of the finished task is entered.
Reset the flag. This means that the program has completely finished executing. Then, the process returns to the task scheduler again, and the next execution program is determined. Program execution and interruption will be explained again with reference to FIG. Assume that the background job 208, which has the lowest priority, is currently being executed. time t
When an INTV IRQ occurs in step 1, execution shifts to the management program (hereinafter referred to as the OS program). Then, by executing the programs 224 and 242 in FIG. 5, for example, the level zero program 252
It can be seen that execution has been requested. and time t2
"1" is set in b7 of TCW0, and then b
6 is cleared and this level zero program 252 is executed. At this time, if a request to start a level 1 program is issued at the same time, TCW1
The flag "1" is also set in b6. But first, a high-priority level zero program is executed. When the execution of this level zero program is finished at time t3, it returns to the OS program again, clears the b7 flag of TCW0, and prepares to detect and execute the next level, level 1, execution request, and from t4 Execution begins. If the level 1 processing takes time, the next INTV IRQ will occur again, and at t5, the level 1 program will be interrupted and the program will return to the OS program. Then, the OS program is executed and a startup request is issued to a program to be started using this INTV IRQ, for example, program 252.
Then, the program 252 with the highest priority is executed from time t6. In other words, set flag "1" to b7 of TCW0, clear flag b6, and start program 252 from TSA0.
Find the address and run program 252. At time t7, execution of the program 252 ends, returns to the OS program, and with the EXIT program,
Clear b7 of TCW0. Further, the task scheduler program 242 of the OS program is searched for a start request or a suspended program. By this program 242. The interruption of the program 254 is detected and execution is resumed. This restart is at time t
This is done by saving the contents of the CPU 102 at time t8 and returning them to the CPU again at time t8. When the program 254 is restarted and finishes its execution at time t9, it returns to the OS program and EXIT
Program 25 by running the program
4 completion report will be made. In other words, flag b7 of TCW1 is cleared. After that, task scheduler program 2
By executing step 42, a search is made to see if there is a program that has issued a startup request or a program whose execution has been interrupted, and for example, it is found that flag "1" is set in b6 of TCW2 of program 256. As a result, TSA2, which is the start address of the program 256, is searched, jumps to the start address of the program 256, and the program 256 is executed. At this time, as mentioned before, TCW2
Clear the b6 flag of and set the b7 flag. Furthermore, when the execution of the program 256 is completed at time t11, the program returns to the OS program, clears the flag of TCWb7 with the EXIT program, and reports the completion. Furthermore, the search for startup requests and execution interruptions is performed again. Assuming that there are no startup requests or interrupted programs as a result of this search, the background
Each data is returned to the CPU from the save area of the job 208 and execution is resumed. And at t13
When an INTV IRQ is received, the contents of the CPU are saved again, the program returns to the OS program, the cause of the IRQ is analyzed, and a startup request is made to the program again. As you can see from this explanation, when an interrupt occurs during the execution of each program, that program is interrupted, returns to the OS program, and is executed starting with the highest level program. By doing so, processing time can be allocated preferentially to more important programs. Furthermore, each program is divided into each level according to its priority, each processing program included in each level is executed in a connected manner, and a completion report is sent to each level program when all its processing is completed. This reduces the amount of space occupied by the OS program, improving processing efficiency.
Furthermore, by doing this, interrupts do not occur between programs within the same level, so by providing a save area for interrupts corresponding to each level program, execution becomes possible. will be significantly reduced. FIG. 18 shows the execution state of the explanations in FIGS. 5 and 17 from the perspective of the programs 252, 254, 256, and 258 at each level. IDLE
The program is in the waiting state for startup, and no startup request has been made to the program yet. Next, when a startup request is issued, a flag is set in b6 of the TCW, indicating that startup is necessary. From IDLE state
The time to move to the QUEUE state is determined by the level of each program. Furthermore, even if it is in the QUEUE state, it is executed and the order is determined by the priority. The program enters the execution state after the flag in b6 of TCW is cleared in the OS program and the flag in b7 is set. This will start the program execution. This state is the RUN state. When the execution is finished, the b7 flag of TCW is cleared and the completion report is completed. This results in
The RUN state ends and it returns to the IDLE state, waiting for the next startup request. However, if an IRQ occurs during program execution, that is, during RUN, the program must suspend execution. As a result, the contents of the CPU are saved and execution is interrupted. This state is the READY state. Next, when this program is ready to be executed again, the saved contents are returned to the CPU from the save area and execution is resumed. In other words, RUN again from READY state.
Return to state. In this way, each level program repeats the four states shown in FIG. Although FIG. 18 shows a typical flow, there is a possibility that b6 of TCW is flagged in the READY state. This is the case, for example, when the timing for the next activation request for the program comes while the activation is being interrupted. At this time, the b7 flag is given priority and the interrupted work is finished first. This causes the b7 flag to disappear and the b6 flag to enter the QUEUE state without passing through the IDLE state. In this way, each level program 252, 25
4, 256, and 258 are each in one of the states shown in FIG. Furthermore, each level program enters the READY state for each level program state. In other words, for example, Level 1 programs include the CARBC program, IGNCAL program, etc.
It consists of the DWLCAL program. However, since the READY state exists for level 1 programs, each of the above CARB, IGNCAL,
Since there is no READY state for DWLCAL programs, it is sufficient to have a save area corresponding to each level program. Figure 20
Areas 602 to 608 of the RAM 106 are provided corresponding to each level. FIG. 19 is a diagram showing the state changes of the back ground job, in which it is in the RUN state during execution;
When an IRQ occurs, the contents of the CPU are saved.
It becomes READY state. When the interrupt processing is finished, the saved contents are returned to the CPU and execution is resumed, that is, RUN. When evacuating the contents of the CPU due to the occurrence of an IRQ, the evacuation area 61 shown in Figure 20 is used.
It is saved to 0. FIG. 21 is a level 0 program. As shown in Table 1, this program issues a startup request every 10 milliseconds. In step 650, the data of ADC1 is taken in, and in 654, the ADC1 is activated to take in the next data. Also, step 652 is for using ADCEND IRG before starting, and if the pre-starting flag is set, it is before starting, so the program returns to RTI, that is, the interrupted program. This program is INITIALIZ in Figure 5.
This is program 204. In step 656, AD2 data is taken in, and in step 658, ADC2 data is taken in.
Activates the next data import. Step 660 captures engine speed. After completing these steps, execute the OS EXIT program and clear the TCWb7 flag. FIG. 22 shows a level 1 program, and in step 672 it is determined whether or not it is starting. If the engine is starting, the fuel for starting is supplied and the ignition timing is determined, so there is no need for calculation and the process jumps to step 678. To calculate the fuel in step 674
Run the CARBCAL program and then step
Run the IGNCAL program on 676. Each of these is performed by table lookup. step
Run the DWALCAL program on the 678 and calculate the energization time. The LAMBDA program at level 2 is a correction program for λ, and the HOSEI program at level 3 is a program for each correction coefficient. The correction coefficients are, for example, programs that calculate correction coefficients for atmospheric temperature, water temperature, etc. Since these parameters have large time constants, it is sufficient to count long intervalve coefficients. Furthermore, as mentioned above, the present invention allows all arithmetic control to be performed regardless of the engine speed.
INTV IRQ is generated. The configuration of such an IRQ generation circuit is shown in FIG. In the figure, a register 735 receives data from the CPU that sets the timer interrupt cycle (for example, 10 mS) via a data bus 752.
counter 736 at the same time.
CLOCK is input. Then, this count number and the contents set in the above register are transferred to a comparator 737.
When the contents of the register 735 and the contents of the counter 736 become equal, the comparator 73
An output is issued from 7 and flip-flop 73
8, and 740. At the same time as this
The counter 736 also outputs the output of the AND circuit 747.
and flip-flop 738 is reset. On the other hand, if flip-flop 739 is set, timer interrupt signal IRQ is output to AND circuit 748, OR
It is output via circuit 751. Here, the flip-flop 739 is a flip-flop for masking the IRQ when the IRQ is not needed (for example, during engine startup). And this time
A reset command is issued from the CPU to flip-flop 739. Furthermore, in contrast to the above-mentioned timer interrupt, an engine stall interrupt when the rotation of the engine stops due to a failure or operational error during operation (so-called engine stall) is shown in the following configuration.
This configuration is the same as that for the timer interrupt, including a register 741, a counter 742, a comparator 743,
AND circuits 746, 750, flip-flop 7
45,746, and the operation is the same as in the previous case. However, the signal input to the counter 742 is a signal emitted when the engine is rotating, and is the reference crank angle signal REF generated by the 146 sensor shown in FIG. is a signal that is emitted every time the crank rotates 180 degrees. Since the counter 742 is reset while the REF signal is input, the engine stall interrupt signal is not generated. When the engine stops, the REF signal is stopped and the reset is released, so the engine stall interrupt signal is generated. The timer interrupt IRQ as described above is
As shown in the flowchart in the figure, tasks are activated and prioritized processing is performed. That is, when the CPU receives an interrupt request, it analyzes and determines the interrupt request. If it is a timer interrupt, task units 252, 254, 256, and 258, which are leveled in descending order of priority, are activated and selected by the task scheduler 242, and the task is executed. When the task execution is finished, the completion is reported with EXIT, and the next task is selected again by the next timer interrupt and the task scheduler. On the other hand, if the interrupt is an engine stall interrupt, turn off the fuel pump.
At the same time as turning off, the ignition system is reset and all input/output control circuits are set to NO-GO. The same applies to ADC1END IRQ and ADC2END 1RQ, and when the sequence operation of ADC1 is completed, flip-flop 764 is set to "1". Furthermore, when the CPU sets "1" to the flip-flop 762 via the bus line 752,
AND gate 770 condition is met, OR gate IRQ
Request the ADC1ENDIRQ service to the CPU via. However, if flip-flop 762 is not set to "1", ADC1END IRQ is inhibited. The same goes for ADC2, and flip-flop 768 is set to "1" at the end of the ADC2 sequence. If "1" is set in flip-flop 766 at this time,
ADC2ENDIRQ is generated through AND gate 772 and OR gate 751, and flip-flop 7
If 66 is not set to "1", the condition of AND gate 772 cannot be satisfied, and AD2ENDIRQ will not occur. Therefore, the flip-flop 739,7
45,762,766 will generate an IRQ only when set to “1”, and when set to “0”
The state will be such that generation of IRQ is prohibited. As explained above, the present invention has the following effects. (A) In the present invention, a program is broken down into tasks for each engine control function, multiple designers create the tasks separately, adjust them as necessary, and then combine these tasks to create a control system. It is possible to complete it. Therefore, even if the details of engine control become complex and high-precision control is required, this can be quickly handled. (B) In engine control, control contents are changed in response to vehicle model changes or changes in control specifications, and as a result, the tasks that make up the control system often vary. In such a case, it is necessary that adding or deleting a task does not affect the execution results of other tasks. Additionally, the contents of tasks often change. The same applies in this case. In the present invention, tasks corresponding to INTV interrupts are interrupted at regular intervals. Unlike conventional methods, when a task finishes executing, there is no need to generate an interrupt to search for the next task to execute, so once the interruption due to the INTV interrupt ends, the next
The possibility of being interrupted before the INTV interrupt is INTV
This is only caused by interrupts other than interrupts, and is extremely rare. Therefore, the interrupt generation conditions are simple, and there is little increase or decrease in the save area due to changing the contents of the task. Therefore, the margin of the save area can be reduced and the memory can be used effectively. (C) Tasks are divided for each control function, but if the control functions are made relatively fine and the number of tasks is increased, changes in the control specifications described above can be responded to in a more detailed manner, but in the conventional method, the number of tasks increases. , there is a problem that the number of interrupts increases and the processing time for actual engine control becomes shorter. Furthermore, since the number of interrupted tasks increases, it is necessary to increase the evacuation area. On the other hand, according to the present invention, the processing time for one task is shortened, the possibility that processing can be performed between INTV interrupts is increased, and the number of interrupted tasks is reduced. Therefore, the evacuation area is reduced and the processing time is hardly increased. Furthermore, according to the embodiment shown in FIG. 5, since the activation cycle is changed for each level program, control efficiency is further improved. Furthermore, since an EXIT report is made for programs at the same level each time the program ends, no OS program execution is required to proceed to the next program within the same level. Therefore, processing time becomes faster. Further, since interrupts between programs at the same level do not overlap with each other, the save area can be set according to each task level, so the area can be reduced. After the engine starts, the ADC1END interrupt or
Since the ADC1END interrupt is masked,
The execution time of OS programs can be shortened, improving processing efficiency. According to the embodiment shown in FIG. 15, the TCW can be provided for each level, and there is no need to provide it for each program in Table 1, so the TCW area can be reduced. Furthermore, since the TCW is provided with a flag b6 indicating a startup request and a flag b7 indicating execution, the first
As shown in Figures 7 and 18, programs can be executed, interrupted, and restarted more smoothly and with higher priority, improving CPU control efficiency.

[Brief explanation of the drawing]

Figure 1 is a sectional view of the engine throttle chamber, Figure 2 is a schematic diagram of the ignition system, Figure 3 is a system diagram of the exhaust gas recirculation system, Figure 4 is an overall configuration diagram of the control system, and Figure 5 is a diagram of the overall configuration of the control system. Program system diagram; Figure 6 is a memory configuration diagram showing the program storage state; Figure 7 is a detailed flowchart of the INITIALIZ program; Figure 8 is a flowchart of the MONIT program; Figure 9 is at startup. Figure 10 is a characteristic diagram showing the amount of fuel supplied at startup, Figure 11 is a characteristic diagram showing the amount of air supplied at startup, Figure 12 is a detailed diagram of the EGRCAL and FISC programs, 13 is a detailed flowchart of the program 224 in FIG. 12, FIG. 14 is a detailed flowchart of the task scheduler,
Figure 5 is an explanatory diagram for explaining the task level program startup request generation operation, and Figure 16 is
Detailed flowchart of EXIT program, Part 1
Figure 7 is an explanatory diagram of the program processing sequence, Figure 18 is a diagram illustrating changes in the status of the level program, Figure 19 is a diagram illustrating changes in the status of the background job, and Figure 20 is a diagram illustrating the change in the status of the background job. A diagram to explain, Figure 21 Level Zero
FIG. 22 is a detailed flowchart of the program. FIG. 22 is a detailed flowchart of the level 1 program, and FIG. 23 is an IRQ generation circuit diagram. 12... Throttle valve, 14... Throttle, 16, 18, 20, 22... Solenoid
Valve, 26...Main jet, 30...Main emulsion tube, 32...Main nozzle, 34...Bench lily, 62...Amplifier, 64...Power transistor, 70...Distributor, 102... ...CPU, 104...ROM, 10
6...RAM, 108...I/O circuit, 132,
134, 136, 138, 140, 142, 14
4...sensor, 148,150,152...switch.

Claims (1)

[Claims] 1. A first step of detecting information necessary to control the engine using a sensor, and controlling the engine using a digital computer by executing a program stored in a memory based on the detected information. A control method comprising: a second step of calculating a value for the engine; and a third step of controlling the engine based on the calculation result of the digital computer.
The program has tasks that are classified by engine control function and are executed at startup cycles determined based on the influence of the control functions on the engine, and the startup cycle of each task occurs every unit time. This is displayed by the number of times the INTV interrupt occurs, and the INTV interrupt request interrupts execution of the above task regardless of its task level.
The fourth step of generating an INTV interrupt and the above
A fifth step in which it is detected whether or not the startup cycle has been reached for each of the above tasks due to the occurrence of the INTV interrupt, and a Q flag indicating a startup request is displayed for the task that has reached the startup cycle, and a task that has been interrupted due to the occurrence of the INTV interrupt described above. An electronic engine control method, comprising: a sixth step of executing a task at a higher level between the level of the Q flag and the level of the task for which the Q flag is displayed. 2. In claim 1, in the case of execution of a task for which a Q flag is displayed, a seventh step of erasing the display of the Q flag and displaying an R flag indicating that the task is being executed; An electronic engine control method comprising: an eighth step of erasing the display of the R flag of the task when the task is completed. 3. The first step is to use a sensor to detect information necessary to control the engine, and based on the detected information, a digital computer calculates values for controlling the engine by executing a program stored in memory. A control method comprising: a second step of controlling the engine; and a third step of controlling the engine based on the calculation result of the digital computer.
The program has tasks that are classified by engine control function and are executed at startup cycles determined based on the influence of the control functions on the engine, and the startup cycle of each task occurs every unit time. It is displayed by the number of times the INTV interrupt occurs, and the INTV interrupt request interrupts the execution of the above task regardless of its task level.
A fourth step of generating an interrupt, and a fifth step of detecting whether or not each of the tasks has reached its activation cycle due to the generation of the INTV interrupt, and displaying a Q flag indicating a activation request for tasks that have reached their activation cycle. The sixth step is to execute the task at the higher level of the task that was interrupted due to the occurrence of the INTV interrupt and the level of the task for which the Q flag is displayed, and the sixth step is to start when the execution of the task is finished. An electronic engine control method characterized by checking the presence or absence of a Q flag indicating a request, executing the task with the highest level among the tasks for which the Q flag is displayed, and repeating this process thereafter.