JPS6239407B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a flash discharge device, and more specifically, to stopping a self-sustaining discharge during charging of a discharge capacitor after a flash discharge.

In general, in a flash discharge device that charges a discharge capacitor and applies a trigger pulse to the flash discharge tube, the charge stored in the discharge capacitor is discharged through the flash discharge tube. Immediately after the flash discharge tube flashes, the discharge capacitor When charging is started, a self-sustaining discharge may occur because the internal impedance of the flash discharge tube is significantly reduced. Particularly in the case where the charging current is increased in order to increase the number of times of light emission per unit time, there is a high possibility that the self-sustaining discharge will occur. When such a self-sustaining discharge occurs, there arise problems such as an excessive current flowing and a flash discharge not being possible because the discharge capacitor is not charged.

Figure 1 shows a conventional flash discharge device.
2 is a power supply, 2 is a power supply circuit consisting of a step-up transformer 3, a chiyoke coil 4, and a rectifier 5, 6 is a discharge capacitor, 7 is a flash discharge tube, and 9 is the flash discharge tube 7.
This is a trigger pulse generation circuit that applies a trigger pulse to the trigger electrode 8 of. 10 is a capacitor voltage detection circuit; 11 is the capacitor voltage detection circuit 10;
A charge completion signal generator includes a charge completion voltage comparator 13 which compares the output voltage of the charge completion reference voltage generating circuit 12 with the output voltage of the charge completion reference voltage generation circuit 12 and outputs an output signal. An AND gate circuit 16 outputs a signal by ANDing the signal of the charging start operation switch 15, and is turned on by the power switch control circuit 17 controlled by the signal of the AND gate circuit 14 and the power switch control circuit 17. , OFF controlled semiconductor switch 18
This is a power switch consisting of: In this flash discharge device, when the charging start operation switch 15 is turned on when the voltage of the discharge capacitor 6 is low, the power switch 16 is closed. As a result, current flows from the power supply 1, and is boosted and rectified by the power supply circuit 2, which includes a step-up transformer 3, a chiyoke coil 4, and a rectifier 5.
Charge the discharge capacitor 6. When the voltage of the discharge capacitor 6 reaches the charge completion voltage, the output voltage of the capacitor voltage detection circuit 10 becomes higher than the output voltage of the charge completion reference voltage generation circuit 12.
Charge completion voltage comparator 13 works and turns off the output signal.
Make it. Therefore, the output signal of the AND gate circuit 14 is also turned OFF, and the power switch 16 is opened.
Next, when a light emission command signal is input to the light emission trigger pulse generation circuit 9, a trigger pulse is applied to the trigger electrode 8 of the flash discharge tube 7. As a result, the discharge capacitor 6
The electric charge is discharged through the flash discharge tube 7, and the flash discharge tube 7 emits a flash light. When the flash light is emitted, the voltage of the discharge capacitor 6 decreases. Therefore, the output voltage of the capacitor voltage detection circuit 10 is
The voltage becomes higher than the output voltage of the charge completion reference voltage generation circuit 12, and the charge completion voltage comparator 13 operates to issue an output signal to start charging. At this time, if the charging start operation switch 15 remains on, the AND gate circuit 14 outputs a charging command signal, closes the power switch 16, and starts charging the discharge capacitor 6. By repeating the above operations, flash discharge is performed intermittently.

However, in the above device, if the frequency of flash discharge is increased, charging is started before the internal impedance of the flash discharge tube 7 becomes sufficiently high, which may cause the above-mentioned self-sustaining discharge. Methods taken to prevent self-sustaining discharge in this conventional example include (1) increasing the impedance of the current control coil 4; (2) Chiyoke coil 4
Use DC resistance instead. (3) A bidirectional two-terminal thyristor is used in series with the flash discharge tube 7. Measures such as these have been removed. However, all of these are aimed at preventing self-sustaining discharge,
It does not detect when a self-sustaining discharge occurs and try to stop it.

The present invention compensates for these conventional drawbacks, detects sustained discharge, which has not been done conventionally, with a simple circuit, and reliably stops the continuous discharge.
The purpose is to obtain a highly safe flash discharge device.

FIG. 2 shows an embodiment of the flash discharge device of the present invention, which is characterized in that, in addition to the flash discharge device shown in FIG. 1, a self-sustaining discharge stop circuit 19 is provided. be. This self-sustaining discharge stop circuit 19 is connected to an AND gate 14 which is a charge control circuit.
, a timer circuit 20 that is set by the charging command signal of the AND gate circuit 14, and this timer circuit 20.
The AND gate circuit 14 is connected to the AND gate circuit 14 and includes a holding circuit 21 for holding a signal, and the AND gate circuit 14 also serves as an AND gate circuit for controlling the power switch. Note that parts indicated by the same reference numerals as in FIG. 1 are the same components as in FIG. 1.

To explain the operation of the above-mentioned device of the present invention with reference to the signal waveform diagram in FIG.
5, the output signal rises as shown in FIG. 3A. When the voltage of the discharge capacitor 6 is low as shown in FIG. 3D, the output of the charge completion voltage comparator 13 is at a high level as shown in FIG. 3B. Further, the output of the holding circuit 21 is reset by an initial reset means such as a power supply reset circuit or a reset switch (not shown), and is reset by a third reset circuit.
As shown in the figure, it is at a high level. In this way, charging start operation switch 15, charging completion voltage comparator 1
Since the output signals A, B, and G of the holding circuit 3 and the holding circuit 21 are all at high level, the AND gate circuit 1
The output of No. 4 becomes high level as shown in FIG. Since the output of the AND gate circuit 14 is a charging command signal, the power switch 16 is closed, the discharge capacitor 6 starts charging, and the timer circuit 20 is set. When the voltage of the discharge capacitor 6 reaches the charge completion voltage, the output voltage of the capacitor voltage detection circuit 10 becomes higher than the output voltage of the charge completion reference voltage generation circuit 12, so the charge completion voltage comparator 13 operates, and the voltage as shown in FIG. The output signal falls as shown in (b). As this output signal falls, the output waveform of the AND gate circuit 14 also falls as shown in FIG. 3H, and the power switch 16 is opened. At the same time, the timer circuit 20 is also reset. This timer circuit ₂₀ is designed to determine that it is a self-sustaining discharge when time t _s has elapsed after setting, and the output voltage rises to a high level. , 3rd
As shown in the figure, the output voltage of the timer circuit 20 does not change. When a light emission command signal is applied to the output light emission trigger pulse generation circuit 9 as shown in FIG. 3C, a trigger pulse is applied to the trigger electrode 9 of the flash discharge tube 7. As a result, the charge in the discharge capacitor 6 is discharged through the flash discharge tube 7, and the discharge current causes the flash discharge tube 7 to emit flash light. When the flash light is emitted, the voltage of the discharge capacitor 6 decreases as shown in FIG. 3D. Therefore, the output voltage of the capacitor voltage detection circuit 10 becomes higher than the output voltage of the charge completion reference voltage generation circuit 12, and the charge completion voltage comparator 13 operates, causing the high level output shown in FIG. 3B to start charging. issue. At this time, the output of the charging start operation switch 15 remains at the high level as shown in FIG.
The output of is also at a high level as shown in Figure 1. The output of the AND gate circuit 14 is a charging command signal, and the power switch 16 is closed to start charging. At this time, the timer circuit 20 is set again. By repeating the above operations, normal flash light emission can be performed intermittently as in the conventional example.

By the way, if a self-sustaining discharge occurs during recharging immediately after a flash is emitted, the charging current flows through the flash discharge tube 7, so that the voltage of the discharge capacitor 6 does not rise to a high level as shown in the latter half of FIG. 3D. Therefore, the output of the charge completion voltage comparator 13 remains at a high level as shown in FIG. . When this state continues for a time _ts , it is determined that a self-sustaining discharge is occurring, and the output of the timer circuit 20 rises to a high level as shown in FIG. 3. When the output of timer circuit 20 becomes high level, holding circuit 21 is set and the output becomes low level as shown in FIG. Since the output of this holding circuit 21 is the input of the AND gate circuit 14, in the AND gate circuit 14, since one of the inputs is at a low level, the output is at a low level. Therefore, the output of the AND gate circuit 14 falls to a low level as shown in the second half of FIG. When the output of the AND gate circuit 14 becomes low level, the power switch 16 is opened and the timer circuit 20 is reset, so that the output of the timer circuit 20 becomes low level as shown in FIG. However, even if the output of the timer circuit 20 becomes a low level, the holding circuit 21 is not reset, and the output of the holding circuit 21 is held at a low level. Therefore, the power switch 16 also remains open. As described above, in the device of the present invention, when a self-sustaining discharge occurs, it is detected and the subsequent charging of the discharge capacitor is automatically stopped, which is highly safe.

FIG. 4 shows a self-sustaining discharge stop circuit according to another embodiment of the present invention, which is a charge control circuit that ANDs the output of the charge completion voltage comparator 13 and the output of the charge start operation switch 15. Gate circuit 1
The output of 4 becomes a charging command signal, and this signal and the signal path of the holding circuit 21 are ANDed by an AND gate circuit 14' which is an AND gate circuit for controlling a power switch to control a power switch control circuit 17. This device performs the same operation as the device shown in FIG. 2 described above.

FIG. 5 shows another embodiment of the invention, in which the timer circuit 20 includes a diode D ₁ connected in parallel with a low resistor R ₂ .
It has a CR integrator circuit 22 having a capacitor C ₁ and a capacitor C ₁ , and when the output of the AND gate circuit ₁₄ is at a high level as shown _in FIG. becomes higher as shown in Figure 3 (E). The output of the AND gate circuit 14 is the third
When the level becomes low as shown in Figure H, the charge of _C1 flows to the AND gate circuit 14 through _D1 and is discharged. Reference voltage generation circuit 2 for CR timer that generates reference voltage by dividing +5V DC voltage
A voltage comparator 24 compares the output of C 3 with the voltage of C ₁ of the CR integration circuit 22 . By setting the reference voltage for the CR timer to _{V s} as shown in FIG. can do. in this way
By including the CR integration circuit 22, the CR timer reference voltage generation circuit 23, and the voltage comparator 24, the timer circuit 20 can be configured with a simple configuration. Further, as shown in the same figure, the holding circuit 20 can be replaced by an SR flip-flop circuit 25 and configured to be reset by a power supply reset circuit 26.

As explained above, according to the present invention, by combining simple small signal circuits, continuous discharge can be reliably detected and charging can be reliably stopped, thereby increasing the safety of the flash discharge device. I can do it,
It has great industrial value.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of a conventional flash discharge device, Fig. 2 is a block diagram of a flash discharge device according to an embodiment of the present invention, Fig. 3 is a signal waveform diagram of each part of the same device, and Fig. 4 is a diagram of the same device. FIG. 5 is a wiring diagram of another self-sustaining discharge stop circuit of the same device. DESCRIPTION OF SYMBOLS 1... Power supply, 2... Power supply circuit, 6... Discharge capacitor, 7... Flash discharge tube, 9... Trigger pulse generation circuit, 10... Capacitor voltage detection circuit, 1
2...Charging completion reference voltage generation circuit, 13...Charging completion voltage comparator, 14...AND gate circuit, 1
5...Charging start operation switch, 16...Power switch, 19...Sustained discharge stop circuit, 20...Timer circuit, 21...Holding circuit.

Claims (1)

[Scope of Claims] 1. A power switch, a trigger pulse generation circuit for causing the flash discharge tube to emit light, a discharge capacitor for accumulating electric charge and discharging it into the flash discharge tube, a charge start operation switch, and the discharge a capacitor voltage detection circuit that detects the voltage of the capacitor;
a charge completion voltage comparator that inputs the output signal of the capacitor voltage detection circuit and a reference voltage and outputs a signal until the voltage of the discharge capacitor reaches a predetermined charge completion voltage; and a charge completion voltage comparator that controls opening/closing of the power switch by the output signal. The charge control circuit receives at least the output of the charge start operation switch and the output of the charge completion voltage comparator, and the charge start operation switch is turned on, and the charge control circuit receives at least the output of the charge start operation switch and the output of the charge completion voltage comparator. A gate circuit that outputs a charging command signal when the voltage of the battery is less than the charge completion voltage, and a charging command signal output from the gate circuit is input, and the charging command signal is set at the rising edge of the charging command signal and reset at the falling edge of the charging command signal. a timer circuit that inputs the output signal of the timer circuit, holds the input signal when the timer operation is completed, and outputs a signal to turn off the power switch; and a power switch control gate circuit that outputs a signal to the power switch to control opening/closing, with the charge command signal, the output of the charge completion voltage comparator, and the output of the charge start operation switch as the other input, By turning on the charge start operation switch, the charge start operation switch is turned on first.
or when the voltage of the discharge capacitor is less than the charge completion voltage after a flash discharge, the output signal of the charge start operation switch and the output signal of the charge completion voltage comparator are inputted to output a charge command signal from the gate circuit. The power switch is turned on via the power switch control gate circuit, and when the charging voltage of the discharge capacitor reaches the charging completion voltage, the output signal of the charging completion voltage comparator is stopped and the gate circuit is turned on. The power switch is turned off to stop charging via the circuit and the gate circuit for controlling the power switch, and the timer circuit is set at the rising edge of the charge command signal and reset at the falling edge of the charging command signal. When the time required for charging becomes longer than the set time of the timer, the timer circuit completes the timer operation, and the holding circuit turns on the power switch in response to a signal from the timer circuit when the timer operation is completed.
A signal is output to turn off the power switch, and this signal turns off the power switch via the power switch control gate circuit. After that, the output signal from the holding circuit is held, so that the power switch is turned off. A flash discharge device characterized by maintaining an OFF state. 2. The flash discharge device according to claim 1, wherein the gate circuit and the power switch control gate circuit are constituted by a single circuit. 3. The timer circuit includes a CR integration circuit, a diode connected in parallel to a resistor so as to discharge the charge of the CR integration circuit when the charging command signal is off, a reference voltage generation circuit for the CR timer, and the CR integration circuit. The flash discharge device according to claim 1, comprising a voltage comparator for comparing the output of the circuit and the output of the reference voltage generation circuit. 4 The holding circuit is reset when the power is turned on,
2. The flash discharge device according to claim 1, comprising a flip-flop set by the output of the CR integration circuit.