JPS6248247B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electronic computer equipped with a program notification function.

Electronic computers, so-called office computers, are used for payroll calculations, year-end adjustment calculations, billing, etc.
Processes that have a predetermined execution date are often performed. Therefore, when an operator starts operating a computer every morning, he or she presets the date data for that day and checks the schedule, calendar, etc. to determine the programs to be processed that day. However, this confirmation work was extremely troublesome, and sometimes it was forgotten.

The present invention has been made in view of the above points, and it is an object of the present invention to provide a computer having a function of notifying, at the start of work, programs to be processed on the same day and programs left behind because they could not be processed on the previous day. purpose.

An embodiment of the present invention will be described below with reference to the drawings. In Figure 1, 11 is a central processing unit (hereinafter referred to as
(referred to as a CPU), to which power is supplied by a power switch (not shown). This CPU1
1 is connected to a keyboard 12, a CRT display device 13, and an external memory 14 such as a magnetic disk storage device. A comment table 14A is provided in the memory 14 for storing comments regarding programs to be processed in the future along with their execution dates. Examples of comments include program names, file names, business codes, etc. However,
The above CPU 11 uses the keyboard 12 at the start of work.
When the date data of the current day is input from , the comments of the program to be executed on that day and the program left without being able to be processed on the previous day are read from the comment table 14A based on the date data,
It has a function of transmitting and displaying the data to the CRT display device 13, and its detailed configuration will be explained below with reference to FIG.

In FIG. 2, reference numeral 21 denotes an input controller, the details of which will be described later.
Selectively output from. That is, the input controller 21 outputs date data from output line A, a start command from output line B, address data for the comment table 14A from output line C, and comment table 14 from output line D.
Output the write data to A. The date data output from the output line A of the input controller 21 is stored in the A register 22, and the start command output from the output line B and the address data output from the output line C are stored in the comment table 14A.
Address controller 2 that controls the address of
3. The write data output from the output line D is sent to the comment table 14A.
As shown in FIG. 3, comments regarding programs to be processed in the future and their execution dates are written in advance in this comment table 14A. Furthermore, the comment table 14A is provided with first and second flag areas F ₁ and F ₂ for each address. The first flag area F1 is set to " ₁ " when the above comment is written, and the second flag area F1 is set to "1" when the above comment is written.
_F2 is set to "1" when the date data written to the same address matches the current date. The flags set in the flag areas F ₁ and F ₂ are reset, for example, by manual operation when the processing of the corresponding program is finished.
Further, by resetting the flag, the corresponding comment data and date data are reset. However, comment table 14
The date data and comment data written in A are read out from separate output lines _L1 and _L2 , respectively, and the date data read out from output line _L1 is read out from B register 24 and AND circuits 25a and 25a.
5c and read from the output line _L2 is input to AND circuits 25b and 25d. The date data temporarily stored in the B register 24 is sent to the comparison circuit 26. Also,
The comparison circuit 26 is supplied with the date data held in the A register 22. The comparison circuit 26 compares the date data held in the B register 24 with the date data held in the A register 22, and if they match, the data is sent to the AND circuits 25a and 25b via the output line 26a. Output a signal. The AND circuits 25a and 25b open their gates in response to the coincidence signal, and send the date data and comment data from the comment table 14A to the display memory 28 via the OR circuit 27a. Also, the output line 26 of the comparison circuit 26
The coincidence signal output from a is sent to the comment table 14A, and 1 is written in the second flag area _F2 . The above comment table 14A outputs the data written in the flag areas F ₁ and F ₂ to the output line.
The flag data is outputted from _L3 , and the flag data is sent to the flag detection circuit 29. This flag detection circuit 29 is connected to the output line 2 of the comparison circuit 26.
The operation is controlled by a signal given from 6a via the inverter 30.
The flag detection operation is performed when the output of 0 is "1", and the flag detection operation is stopped when the comparison circuit 26 outputs a match signal and the output of the inverter 30 becomes "0". The output signal of this flag detection circuit 29 is output from the AND circuit 2.
It is input as a gate signal to 5c and 25d. The AND circuits 25c and 25d open their gates in response to the flag detection signal from the flag detection circuit 29, and output the date data and comment data from the comment table 14A to the display memory 28. The date data and comment data written in the display memory 28 are sent to the display controller 31. This display controller 31
stores input date data and comment data in internal refresh memory, and
It is sent to the CRT display device 13 and displayed. Also,
Each time the comparison circuit 26 finishes the comparison operation, it outputs a completion signal from the output line 26b and sends it to the address controller 23. In the address controller 23, an internal address counter (not shown) counts up in response to the end signal from the comparison circuit 26, and specifies the next address for the comment table 14A.

FIG. 4 is a block diagram showing details of the input controller 21. As shown in FIG. In the figure, reference numeral 211 is an AND circuit to which a key input signal from the keyboard 12 and a key acceptance enable signal from a control section (not shown) are applied. The output of this AND circuit 211 is 1
After being held in the digit buffer 212, the judgment circuit 2
13 and is also sent to the input register 215 via the AND circuit 214. The data held in this input register 215 is stored in the AND circuit 2
16 to output line A. Further, the judgment circuit 213 judges the content of key input data according to mode information from a control section (not shown), such as date preset mode, table write mode, etc., and AND circuits 214, 216, 217,
It provides a gate signal to 218 and also outputs an activation signal to output line B. In addition, the AND circuit 217,
The output data of the input register 215 is input to 218, the output of the AND circuit 217 is sent to the output line C as a table address, and the output of the AND circuit 218 is output to the output line D as table write data. In the above configuration, when key input data is given from the keyboard 12 in a state where keys can be accepted, the AND circuit 2
11, is stored in a one-digit buffer 212, and sent to a judgment circuit 213. The judgment circuit 213 performs a judgment operation on key input according to mode information from the control unit. In the table write mode, if the data held in the buffer 212 is numerical data, it opens the gate of the AND circuit 214. Transfer to input register 215. Then, if the data input to the buffer 212 is function data and indicates a table address, the gate of the AND circuit 217 is opened, and the input register 212 is opened.
The data held in 5, that is, the table address, is output to output line C. Also, Batsuhua 21
If the data input to 2 indicates table write data, the judgment circuit 213 outputs the AND circuit 2.
18 is opened, and the data held in the input register 215, that is, the table write data, is output to the output line D. In addition, the judgment circuit 213
If date preset mode is given to
The judgment circuit 213 determines that the function data indicating the date data following the date data is the buffer 21.
When the date data is input to the input register 215, the gate of the AND circuit 216 is opened and the date data held in the input register 215 is output to the output line A. Further, at this time, the determination circuit 213 outputs a start command to the output line B.

FIG. 5 is a circuit diagram showing details of the comparison circuit 26. In the figure, 261 is an AND circuit to which the current date data held in the A register 22 is given, and 262 is the B register 24.
This is an AND circuit to which the date data held in is given. The AND circuits 261 and 262 are gate-controlled by a comparison command IC from a control section (not shown), and their output signals are sent to the subtraction circuit 2.
63 input terminals a and b, respectively. The subtraction circuit 263 subtracts the data applied to the input terminal b from the data applied to the input terminal a, and outputs the operation result data from the output terminal d and the carry signal from the output terminal c. The signals output from the output terminals d and c of this subtraction circuit 263 are
4 to the set terminal s of the flip-flop 265. Then, the output signal of this flip-flop 265 is output to the output line 2 as a coincidence signal.
6a to AND circuits 25a and 25b in FIG.
is input to. The flip-flop 265 is
Display memory 2 provided by a control unit (not shown)
It is reset by the write completion signal WE of 8. The output of the NOR circuit 264 is applied to one input terminal of an AND circuit 267 via an inverter 66, and the comparison command IC is applied to the other input terminal of the AND circuit 267 via a delay circuit 268. is input. The delay time of this delay circuit 268 is set longer than the calculation time of the subtraction circuit 263. Then, the output signal of the AND circuit 267 and the write completion signal WE are output from the output line 26b via the OR circuit 269 and sent to the address controller 23 as an increment signal. Comparison circuit 26 configured as above
is A register 2 when comparison command IC is given.
2 and the comment table 14 held in the B register 24.
AND circuits 261, 262 for the date data from A
is input to the subtraction circuit 263 via the subtraction circuit 263. This starts a subtraction operation, and if the contents of the A register 22 and B register 24 do not match, the subtraction circuit 26
“1” from at least one of output terminals d and c of 3
The signal is output and the output of the NOR circuit 264 is “0”
becomes. Therefore, the output of the inverter 266 becomes "1", and the AND circuit 267 and the OR circuit 2
An increment signal is outputted to the output line 26b via 69. Furthermore, when the contents of the A register 22 and the B register 24 match, the signals output from the output terminals d and c of the subtraction circuit 263 are both "0", and the output of the NOR circuit 264 is "1". ” and the flip-flop 265 is set. As a result, a "1" signal, that is, a match signal, is output from flip-flop 265 and sent to AND circuits 25a and 25b via output line 26a. Then, when the writing to the display memory 28 is completed and a writing completion signal WE is sent from the control section, the flip-flop 265
is reset, and a write completion signal WE is outputted via the OR circuit 269 and sent to the address controller 23 from the output line 26b as an increment signal.

Next, the overall operation of the present invention configured as described above will be explained. When there are several programs to be processed in the future, comments (program name, etc.) for the programs and their execution dates are stored in advance in the comment table 14A via the input controller 21 by key operations on the keyboard 12. In this case, comments for one week or one month, for example, are written in the comment table 14A, and the contents are updated every week or month.

When the operator inputs the date data of the current day by operating the keys on the keyboard 12 at the start of work, this date data is set in the A register 22 via the output line A from the input controller 21 as described above. Also, at this time, the input controller 21 outputs a start command from the output line B and gives it to the address controller 23. This address controller 23 is the input controller 2
When a start command is given from 1, the start address of comment table 14A is specified, and the date data stored in the start address is stored in B register 2.
Read to 4. The date data read into the B register 24 is sent to the comparison circuit 26. This comparison circuit 26 is connected to the comment table 14 as described above.
The execution date of the comment read from A to the B register 24 is compared with the date data of the current day set in the A register 22, and if they do not match, the output line 26a is held in the "0" signal state and the If they match, a match signal, that is, a "1" signal is output to the output line 26a. When a match signal is output from this comparison circuit 26, the comment table 14A
At the same time, the second flag area _F2 is set, and the gates of the AND circuits 25a and 25b are opened, and the date data and comment data read from the output lines _L1 and _L2 of the comment table 14A are stored in the display memory 28. Display via controller 3
Sent to 1. Further, when the comparison circuit 26 finishes the content comparison operation between the B register 24 and the A register 22, the comparison circuit 26 outputs the output line 26b as described above.
An increment signal is outputted from the address controller 23 and given to the address controller 23. address controller 2
3 counts up an internal address counter in response to a signal from the comparison circuit 26, designates the next address of the comment table 14A, and reads the date data to the B register 24. Similarly below,
The date data written in the comment table 14A together with each comment is sequentially read out to the B register 24 and compared with the current day's date data held in the A register 22. If they match, the date data and comment data are sent to the AND circuit. 25a, 25
The flag is sent to the display memory 28 via the flag 28, and "1" is written in the second flag area _F2 . Also,
The date data read into the B register 24 is
If it does not match the date data of the current day held in the register 22, the signal outputted from the comparison circuit 26 to the output line 26a is "0", the output of the inverter 30 becomes "1", and the flag is detected. is applied to circuit 29. As a result, the flag detection circuit 29 is activated, and the _first
Check the contents of the second flag areas F ₁ and F ₂ .
The first and second flag areas F ₁ and F ₂ are reset by manual operation, for example, when the program is executed. Therefore, if the processing has already been completed, the flag detection circuit 29 The output is "0". However, if the program was not executed on the previous day, "1" remains set in the flag areas F ₁ and F ₂ , and when both F ₁ and F ₂ are "1", the flag detection circuit 29 A flag detection signal is output from. When this flag detection signal is output, the gates of the AND circuits 25c and 25d are opened, and the date data and comment data read from the comment table 14A at that time are transferred to the display memory via the AND circuits 25c and 25d and the OR circuit 27d. Sent to 28. In this way, comment data and date data of programs to be processed on the current day are read from the comment table 14A, and comment data and date data of programs that could not be processed the previous day are read and written to the display memory 28. It can be done. Then, the date data and comment data temporarily stored in the display memory 28 are sent to the display controller 31,
It is displayed on the CRT display device 13.

When the date data for the current day is preset at the start of work in this way, comments for programs to be executed on that day and programs that could not be processed the previous day are automatically displayed on the CRT screen.

In the above embodiment, the comments of the program to be executed on the day are displayed on the CRT screen, but the present invention is not limited to this, and the comments may be printed using a printer.

Further, in the above embodiment, the year, month, and day are set as the execution date of the execution program, but it is also possible to set only the month and day, or to include information on the day of the week.

Furthermore, in the above embodiment, when the date data of the current day is preset from the keyboard, the comment of the program to be processed on that day is displayed.
In addition, for example, a clock circuit that obtains the date data of the current day is provided internally, and prior to starting work, the program detects a match between the date data output from the clock circuit and the date data read from the comment table using a comment display command, etc. It is also possible to display a comment.

As described above, according to the present invention, when a comment display command is given prior to the start of work, programs to be processed that day and programs that could not be processed the previous day are automatically checked and notified. The content of the program to be processed from now on can be easily confirmed, and mistakes such as forgetting to execute even programs left over from the previous day's processing can be prevented. Furthermore, processing efficiency can be improved by eliminating the troublesome work of checking a schedule, calendar, etc. at the start of work to check the current day's processing program or the previous day's program processing status.

[Brief explanation of the drawing]

The drawings show one embodiment of the present invention; FIG. 1 is a block diagram showing the overall schematic configuration, FIG. 2 is a circuit configuration diagram showing details of the main parts, and FIG. 3 is a storage configuration of a comment table. FIG. 4 is a circuit configuration diagram showing details of the input controller in FIG. 2, and FIG. 5 is a circuit configuration diagram showing details of the comparison circuit in FIG. 2. 11...CPU (Central Processing Unit), 13...CRT
Display device, 14A...Comment table, 21...
...Input controller, 26... Comparison circuit.

Claims (1)

[Claims] 1. In an electronic computer that internally retains today's date data, comments for each processing program and its execution date are preset, a comment table is provided with a flag area corresponding to each of the above comments, and the above comments are displayed by a comment display command. a means for sequentially reading out the contents of the table; a comparison means for comparing the date data read from the comment table with the date data of the current day to detect a match; and a match signal is output from the comparison means. means for reading the corresponding comment from the comment table and sending it to the notification section and setting a flag in the corresponding flag area of the comment table; means for detecting the presence or absence of a flag in a flag area, reading out a comment with a flag set and sending it to a notification section; and means for resetting a corresponding flag area in the comment table each time program processing is completed. An electronic computer characterized by comprising: