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JPS6248386B2 - - Google Patents
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JPS6248386B2 - - Google Patents

Info

Publication number
JPS6248386B2
JPS6248386B2 JP56164598A JP16459881A JPS6248386B2 JP S6248386 B2 JPS6248386 B2 JP S6248386B2 JP 56164598 A JP56164598 A JP 56164598A JP 16459881 A JP16459881 A JP 16459881A JP S6248386 B2 JPS6248386 B2 JP S6248386B2
Authority
JP
Japan
Prior art keywords
tape
spot
lead frame
manufacturing
masking
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP56164598A
Other languages
Japanese (ja)
Other versions
JPS5864057A (en
Inventor
Nobuo Ogasa
Akira Ootsuka
Fumio Ootsuji
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Priority to JP56164598A priority Critical patent/JPS5864057A/en
Publication of JPS5864057A publication Critical patent/JPS5864057A/en
Publication of JPS6248386B2 publication Critical patent/JPS6248386B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01Manufacture or treatment
    • H10W70/04Manufacture or treatment of leadframes
    • H10W70/042Etching

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Description

【発明の詳細な説明】 本発明は集積回路(IC)装置用リードフレー
ムの製造法に関する。特に近年ますます要求が強
いICの小型化、安価に対処できるIC用リードフ
レームに関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing lead frames for integrated circuit (IC) devices. In particular, it relates to lead frames for ICs that can meet the growing demand for miniaturization and low cost of ICs in recent years.

ICのパツケージについては、特に高信頼性を
必要とするものについては、低融点ガラスセラミ
ツク封止(Cer DLP)が、又低価格品について
は、プラツチツク封止が夫々用いられている。
Regarding IC packages, low-melting point glass-ceramic sealing (Cer DLP) is used for IC packages that require particularly high reliability, and plastic sealing is used for low-cost products.

このうち前者の低融点ガラスセラミツク封止に
用いられるリードフレームは第1図に示す如く、
鉄・ニツケル合金テープ1の上にAl2をストラ
イプ状に被覆した、いわゆるアルミストライプテ
ープ3が広く用いられ、その大半はロール圧延法
により、又一部は真空蒸着法により連続的に複合
テープを作り、それをプレスで打抜くことによつ
て所要のリードフレームが作られている。一方、
プラツチツク封止に用いられるリードフレーム
は、第2図に示す如く、鉄・ニツケル合金又は銅
合金テープ5をプレス打抜加工又はエツチング法
によりリードフレームとしたものの上に、金又は
銀の如き貴金属を部分的にメツキ4を施したもの
が広く用いられている。
Among these, the lead frame used for the former low melting point glass ceramic sealing is as shown in Figure 1.
The so-called aluminum stripe tape 3, which is a striped coating of Al2 on the iron/nickel alloy tape 1, is widely used, and most of the tapes are made by continuous rolling, and some are made by vacuum deposition. The required lead frame is made by punching it out with a press. on the other hand,
As shown in Fig. 2, the lead frame used for plastic sealing is made by forming a lead frame from iron-nickel alloy or copper alloy tape 5 by press punching or etching, and then a precious metal such as gold or silver is coated on top of the lead frame. Partially plated 4 is widely used.

しかし乍ら、近年ICチツプそのものの大型化
が進行する中で、パツケージそのものの小型化は
高密度実装への要求から避け難く、従来のDLP
(Dual in Line Package)は一つの限界に来てい
る。
However, as IC chips themselves have become larger in recent years, it has become difficult to avoid miniaturization of packages themselves due to the demand for high-density packaging, and conventional DLP
(Dual in Line Package) has reached its limit.

こうした中で、パツケージリードをICチツプ
の二方向のみでなく四方向から取り出すパツケー
ジ方式としてフラツト・パツケージやチツプ・キ
ヤリア型パツケージがますます注目されつつあ
る。
Under these circumstances, flat packages and chip-carrier type packages are attracting more and more attention as package methods that allow package leads to be taken out not only from two directions but from all four directions of an IC chip.

ところで、比較的パツケージコストが安価で、
かつ信頼性が高いことから今後のICパツケージ
方式の中で重要な位置を占めると考えられる低融
点ガラス・セラミツク封止方式のフラツトパツケ
ージやチツプキヤリア型パツケージを採用しよう
とすると、アウターリード部にAlが被覆した部
分が不可避的に形成され、これがエレクトロマイ
グレーシヨン現象によるリード間シヨートや半田
付性の障害要因となるなど品質上の大きな問題と
なる。
By the way, the package cost is relatively low,
When trying to adopt a flat package or chip carrier type package sealed with low-melting point glass/ceramic, which is expected to play an important role in future IC package methods due to its high reliability and A covered portion is inevitably formed, which causes major quality problems such as shortening between leads due to electromigration phenomenon and failure of solderability.

一方、プラツチツクパツケージ用の貴金属メツ
キリードフレームについては低コスト化のため、
省貴金属、更には脱貴金属化に対する要求が高ま
りつつある。
On the other hand, in order to reduce the cost of precious metal plated lead frames for plastic packaging,
There is an increasing demand for saving precious metals and even removing precious metals.

本発明はかゝる問題点を有する従来のIC用リ
ードフレームの改良に関るものであり、第3図に
示すAlスポツト7、被覆型ICリードフレーム9
を安価に製造する方法を提供せんとするものであ
る。
The present invention relates to the improvement of the conventional IC lead frame having such problems, and includes an Al spot 7 and a covered IC lead frame 9 shown in FIG.
The purpose of this invention is to provide a method for manufacturing the product at low cost.

本発明の方法は、鉄・ニツケル合金又は銅合金
テープ8の上に真空蒸着、イオンプレーテイング
あるいはスパツタリング法などのPVD法で片面
全面にAlを被覆して複合テープとした後に、所
要のリードフレーム形状に連続的にプレス打抜加
工を施し、これを次に述べる方法で不要の部分の
Alを除去することによつて連続的にAlスポツト
リードフレームを製造することを特徴とする。打
抜加工したリードフレーム上の不要な部分のAl
を除去する方法としては、1つは第5図に示す如
く、エンドレスベルト22にリードフレームのピ
ツチに合わせたゴム等の弾性体23を設け、溶解
槽21を通過する際に、Alの必要な部分にマス
キング用弾性体を押し付けた状態でNaOH水溶液
中に浸漬し、マスキング部以外のAlを溶解除去
した後、水洗槽25、乾燥炉26を通して巻取ド
ラム27に巻取る方法である。これによつて第3
図に示すAlスポツトリードフレームを連続的に
製造できる。
The method of the present invention is to coat the entire surface of one side of the iron-nickel alloy or copper alloy tape 8 with Al using a PVD method such as vacuum evaporation, ion plating or sputtering to form a composite tape, and then form the composite tape into a desired lead frame. Press punching is performed continuously on the shape, and unnecessary parts are removed using the method described below.
It is characterized by continuously manufacturing Al spot lead frames by removing Al. Al of unnecessary parts on the punched lead frame
As shown in FIG. 5, one method for removing Al is to provide an elastic body 23 such as rubber on the endless belt 22 that matches the pitch of the lead frame, and when passing through the melting tank 21, the necessary amount of Al is removed. This method involves immersing the masking elastic body in a NaOH aqueous solution with a masking elastic body pressed against the portion, dissolving and removing Al other than the masking portion, and then passing through a washing tank 25 and a drying oven 26 and winding it onto a winding drum 27. This makes the third
The Al spot lead frame shown in the figure can be manufactured continuously.

不要のAlを除去する他の方法は公知のレジス
ト印刷を用いることも可能である。
As another method for removing unnecessary Al, it is also possible to use known resist printing.

以下実施例によつて説明する。 This will be explained below using examples.

実施例 板厚0.125mmに圧延された42%Ni―Fe合金テー
プの片面に第4図に示す如き連続真空装置中で真
空度10-5Torrで連続的に厚さ3μmでAlを全面
に被覆した。第4図で、14がサプライ、15が
テークアツプ、16が駆動ロール、17が水冷銅
ロール、18が合金テープ、11がAlを溶融す
る坩堝、12がマスク、13がプレヒートであ
る。このAl被覆テープをプレスにて所要のリー
ドフレーム形状に連続的に打抜き加工を行つた。
そのあと、第5図に示す連続部分エツチング装置
により、所要部分以外の被覆Al層を除去した。
即ち、サプライ19から送り出されたリードフレ
ーム上のAl所要部を弾性体23でマスキング
し、その間に60℃に加熱した15%NaOH水溶液中
を浸漬通過させて所要部以外の被覆Alを除去
し、水洗、乾燥工程を経て連続的にAlスポツト
鉄・ニツケル合金リードフレームを製造すること
ができた。
Example One side of a 42% Ni-Fe alloy tape rolled to a thickness of 0.125 mm was coated with Al to a thickness of 3 μm over the entire surface in a continuous vacuum device as shown in Figure 4 at a vacuum degree of 10 -5 Torr. did. In FIG. 4, 14 is a supply, 15 is a take-up, 16 is a drive roll, 17 is a water-cooled copper roll, 18 is an alloy tape, 11 is a crucible for melting Al, 12 is a mask, and 13 is a preheater. This Al-coated tape was continuously punched into the desired lead frame shape using a press.
Thereafter, the covering Al layer was removed from the required portions using a continuous partial etching apparatus shown in FIG.
That is, the required portions of Al on the lead frame sent out from the supply 19 are masked with the elastic body 23, and in the meantime, the lead frame is immersed in a 15% NaOH aqueous solution heated to 60° C. to remove the covering Al other than the required portions. Through the washing and drying process, we were able to continuously manufacture Al spot iron/nickel alloy lead frames.

上記の製造において第5図のエンドレスベルト
22上に、1つのマスキングの後次のマスキング
に至る間に溶解液を除去する装置を回転中に付加
することによつて、スポツトAlの位置精度及び
表面状態を改善することも可能である。
In the above manufacturing process, by adding a device to the endless belt 22 shown in FIG. 5 during rotation to remove the solution between one masking and the next masking, the position accuracy of the spot Al and the surface can be improved. It is also possible to improve the condition.

上述の如く本発明の方法によつて、低融点ガラ
ス・セラミツク封止型のフラツトパツケージIC
やチツプキヤリア型IC及びプラツチツク封止型
ICに用いられるAlスポツト被覆リードフレーム
を連続的にかつ安価に製造することが可能とな
り、ICパツケージの小型化及び低コスト化に多
大な効果が得られた。
As described above, by the method of the present invention, a low melting point glass/ceramic sealed flat package IC can be manufactured.
Chip carrier type IC and plastic sealing type
It has become possible to manufacture Al spot-covered lead frames used in ICs continuously and at low cost, which has had a significant effect on downsizing and lowering costs of IC packages.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来のAlストライプテープの外観
図、第2図は従来の貴金属部分メツキテープの外
観図、第3図は本発明の方法によるAlスポツト
テープの外観図、第4図は本発明の方法に用いる
連続真空蒸着装置の例を示す概念図、第5図は同
じく本発明の方法に用いる装置の1例を示す概念
図である。 1,8,18;鉄・ニツケル合金テープ、2;
ストライプ状Al、3;アルミストライプテー
プ、4;スポツド貴金属メツキ、5:鉄・ニツケ
ル又は銅合金テープ、6;貴金属部分メツキテー
プ、7;スポツト状Al、9;Alスポツトテー
プ、10;真空容器、11;坩堝、12;マス
ク、13;プレヒート、14,19;サプライ、
15;テークアツプ、16;駆動ロール、17;
水冷銅ロール、20;NaOH出入口、21;溶解
槽、22;エンドレスベルト、23;弾性体、2
4;プーリ、25;水洗槽、26;乾燥炉、2
7;巻取ドラム。
Fig. 1 is an external view of a conventional Al stripe tape, Fig. 2 is an external view of a conventional noble metal partially plated tape, Fig. 3 is an external view of an Al spot tape made by the method of the present invention, and Fig. 4 is an external view of the method of the present invention. FIG. 5 is a conceptual diagram showing an example of a continuous vacuum evaporation apparatus used in the method of the present invention, and FIG. 5 is a conceptual diagram showing an example of the apparatus used in the method of the present invention. 1, 8, 18; Iron/nickel alloy tape, 2;
Striped Al, 3; Aluminum stripe tape, 4; Spotted precious metal plating, 5: Iron/nickel or copper alloy tape, 6; Precious metal partially plated tape, 7; Spotted Al, 9; Al spot tape, 10; Vacuum container, 11 ; Crucible, 12; Mask, 13; Preheat, 14, 19; Supply,
15; Take-up, 16; Drive roll, 17;
Water-cooled copper roll, 20; NaOH inlet/outlet, 21; Dissolution tank, 22; Endless belt, 23; Elastic body, 2
4; Pulley, 25; Washing tank, 26; Drying oven, 2
7; Winding drum.

Claims (1)

【特許請求の範囲】 1 ICリードフレーム用のAlスポツトテープを
連続的に製造する方法において、基板テープの片
面に1〜10μmの厚さにAlを全面被覆し、該被
覆テープをプレス打抜加工を行い、次の工程で必
要部分以外を除去することを特徴とするAlスポ
ツトリードフレームの製造法。 2 特許請求の範囲第1項において、Alの全面
被覆にPVD法を用いることを特徴とするAlスポ
ツトリードフレームの製造法。 3 特許請求の範囲第1項において、打抜加工後
弾性体によつて必要部分のみマスキングしつゝ、
NaOH水溶液に浸漬してマスキング部以外のAlを
溶解除去することを特徴とするAlスポツトリー
ドフレームの製造法。 4 特許請求の範囲第1項において、打抜加工後
の工程をレジスト印刷を用いて不要部分のAlを
除去することを特徴とするAlスポツトリードフ
レームの製造法。
[Claims] 1. In a method for continuously manufacturing Al spot tape for IC lead frames, one side of a substrate tape is entirely coated with Al to a thickness of 1 to 10 μm, and the coated tape is press punched. A method for manufacturing Al spot lead frames, which is characterized by carrying out the following steps, and then removing parts other than the necessary parts in the next process. 2. A method for manufacturing an Al spot lead frame according to claim 1, characterized in that a PVD method is used for the entire surface coating of Al. 3 In claim 1, masking only the necessary parts with an elastic body after punching,
A method for manufacturing an Al spot lead frame characterized by immersing it in a NaOH aqueous solution to dissolve and remove Al other than the masking area. 4. The method for manufacturing an Al spot lead frame according to claim 1, characterized in that unnecessary portions of Al are removed by using resist printing in the step after punching.
JP56164598A 1981-10-14 1981-10-14 Manufacture of al spot lead frame Granted JPS5864057A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56164598A JPS5864057A (en) 1981-10-14 1981-10-14 Manufacture of al spot lead frame

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56164598A JPS5864057A (en) 1981-10-14 1981-10-14 Manufacture of al spot lead frame

Publications (2)

Publication Number Publication Date
JPS5864057A JPS5864057A (en) 1983-04-16
JPS6248386B2 true JPS6248386B2 (en) 1987-10-13

Family

ID=15796215

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56164598A Granted JPS5864057A (en) 1981-10-14 1981-10-14 Manufacture of al spot lead frame

Country Status (1)

Country Link
JP (1) JPS5864057A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63167747U (en) * 1987-04-21 1988-11-01
JPS63265453A (en) * 1987-04-22 1988-11-01 Mitsubishi Electric Corp Manufacture of lead frame for semiconductor use

Also Published As

Publication number Publication date
JPS5864057A (en) 1983-04-16

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