JPS6248902B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device, and particularly to a polycrystalline semiconductor resistor provided on a semiconductor substrate.

A conventional polycrystalline semiconductor resistor device provided on a semiconductor substrate will be described with reference to FIG.

First, the oxide film 12 on the semiconductor substrate 11 in FIG.
A polycrystalline semiconductor layer 13 is then deposited by vapor phase growth. A region of this polycrystalline semiconductor layer other than the region used as a resistor is selectively thermally oxidized to convert it into a polycrystalline semiconductor oxide film layer 14, and a P-type impurity is implanted into the polycrystalline semiconductor layer 13 by an ion implantation method. . After that, if a metal electrode 15 for electrode extraction is provided, it can be used as a semiconductor device having a polycrystalline semiconductor resistor.

In this conventional polycrystalline semiconductor device, the amount of P-type impurity ions implanted into the polycrystalline semiconductor resistor determines the layer resistance of the polycrystalline semiconductor layer. Therefore, it is possible to design the required resistance based on this layer resistance and the magnitude of the resistance. However, in the case of semiconductor integrated circuits that require many types of resistance, such as large-scale integrated circuits, and have particularly high resistance, a polycrystalline semiconductor layer with higher layer resistance is required, and in this case, two types of resistance are required. It is necessary to perform ion implantation with different ion doses.

An object of the present invention is to make it possible to simultaneously fabricate polycrystalline semiconductor resistor devices having two different layer resistances by one ion implantation without performing ion implantation with two different amounts of ions. be.

For example, in the present invention, a highly concentrated impurity layer of a first conductivity type is formed in advance on a semiconductor substrate, and the highly concentrated impurity layer is transferred to a polycrystalline semiconductor of a second conductivity type provided on the impurity layer. It is characterized in that the effective layer resistance of the second conductivity type polycrystalline semiconductor is changed by diffusing conductivity type impurities.

An embodiment of the present invention will be described below with reference to the drawings. 2a and 2b show an embodiment of the present invention. In FIG. 2a, a P-type semiconductor substrate 21 is shown.
An opening is provided in the upper oxide film 22 to form an N ⁺ -type high concentration diffusion region 26 . Thereafter, as shown in FIG. 2B, a polycrystalline semiconductor layer 23 is grown in a vapor phase, selectively thermally oxidized in areas other than those to be used as resistors, and then P-type impurities are diffused by ion implantation. After further heat treatment, the N ⁺ high concentration diffusion layer 2 on the semiconductor substrate
6 becomes an N-type impurity source and diffuses into the polycrystalline semiconductor layer, forming an N-type region 27 in the polycrystalline semiconductor layer.

As is easily understood, in the polycrystalline semiconductor resistor device of the present invention formed in this way, the film thickness of the resistance layer is reduced by the thickness of the polycrystalline semiconductor N-type layer formed below, so that the effective layer resistance is reduced. It gets expensive. Therefore, it is easy to create a high resistance using a polycrystalline semiconductor layer having this high layer resistance. Furthermore, since the method of the present invention can simultaneously form a conventional polycrystalline semiconductor layer resistor, a polycrystalline semiconductor resistor having two types of layer resistance can be formed. Furthermore, the N ⁺ high concentration diffusion layer 26 used in the present invention
can be formed simultaneously with the formation of an N-type high concentration diffusion region used when forming a semiconductor device directly provided on a normal semiconductor substrate. (That is, when forming a high concentration region for emitter diffusion of an NPN transistor) Although the present invention has been described above using one embodiment, the present invention can be applied even if the conductivity type of the semiconductor is replaced.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view of a conventional semiconductor device having a polycrystalline semiconductor resistor, and FIGS. 2a and 2b are cross-sectional views showing a semiconductor device having a polycrystalline semiconductor resistor according to an embodiment of the present invention in the order of steps. be. In the figure, 11, 21...P-type semiconductor substrate,
12, 22...Semiconductor oxide film, 13, 23...P
type polycrystalline semiconductor layer, 14, 24... polycrystalline semiconductor oxide film layer, 15, 25... metal electrode for electrode extraction, 26... N ⁺ type high concentration diffusion layer, 27... N type polycrystalline semiconductor layer.

Claims (1)

[Claims] 1. The polycrystalline semiconductor includes an impurity region of one conductivity type extending partially from the main surface of the semiconductor substrate and a polycrystalline semiconductor layer of the opposite conductivity type serving as a resistor provided on the impurity region. A semiconductor device characterized in that the layer has a portion in which the impurity of one conductivity type is diffused.