JPS6258449B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an analog signal output method to a dot recorder when a large amount of digital data is digital-to-analog (D/A) converted and recorded in a multi-channel dot recorder. It is something.

As an example of converting a large amount of digital data to analog and recording it on a dot recorder with multiple channels, for example, data from many locations is collected at a center using a digital data transmission line, and the data is collected at a center using a central processing unit (CPU). ), as well as D/A converting each digital data and centrally recording it with a dot recorder, it is possible to see the status of data changes at each location at a glance. There are cases where you can make it visible.

Conventionally, as an analog signal output method when a large amount of digital data is D/A converted and recorded by a dot recorder, as many D/A converters as the number of data are prepared, and each A method was used in which each piece of data was D/A converted and input into a dot recorder.

FIG. 1 is a block diagram showing a conventional analog signal output method to a dot recorder. In the same figure, 1 is the CPU, 2 is the bus, 3 _-1 , 3 _-2 ,...3 _-12
is a D/A converter, 4 is a dot recorder, 1 to 12
are the first to twelfth dot input terminals.

In Figure 1, 12 channels of digital data output from CPU 1 are transferred to 12 channels via bus 2.
D/A converters 3 _-1 , 3 _-2 , ...3 _-12 are inputted in parallel, and each is D/A converted to generate an analog signal, which is output from the first dot input terminal 1 of the dot recorder 4. The signals are input up to the 12th dot input terminal 12, respectively. As a result, the dot recorder 4 records dots by switching inputs in a predetermined order and at time intervals. Although FIG. 1 shows an example in which 12 channels of data are recorded using a 12 dot recorder, the same applies to cases where the number of channels is different.

In this way, in the conventional analog signal output method to the dot recorder, the analog signals of each channel are always input in parallel, and the dot recorder switches these signals sequentially to perform recording, so the number of channels is equal to the number of channels. This method not only requires several D/A converters and is inevitably expensive, but also has the disadvantage that the device becomes larger and consumes more power.

The present invention aims to eliminate these drawbacks of the prior art, and its purpose is to reduce the number of D/A converters used as much as possible, thereby lowering the cost and improving equipment efficiency. The object of the present invention is to provide a method that can reduce the size and power consumption of a device.

In order to achieve this objective, in the analog signal output method to the dot recorder of the present invention, dot synchronization pulses are switched to a plurality of output terminals corresponding to the plurality of inputs in synchronization with switching of a plurality of analog signal inputs. A multi-dot recorder that outputs multiple dots, outputs a plurality of digital data sequentially on a common line in a time-division manner in response to generation of dot synchronization pulses at the plurality of output terminals, and is provided with a single digital-to-analog converter. The digital data on the common line is digital-to-analog converted and applied in parallel to a plurality of analog signal inputs of the multi-dot recorder.

Examples will be described below.

FIG. 2 is a block diagram showing an analog signal output method to the dot recorder of the present invention. In this figure, the same parts as in FIG. 1 are indicated by the same numbers, 3 is a D/A converter, and 5 is a digital input section.

FIG. 3 is a diagram showing the configuration of the main parts of the dot recorder. In the figure, reference numerals 11 _-1 and 11 _-2 are measurement point switching devices, which perform switching in conjunction with each other. 12 is an amplifier, 13 is a comparator, and 14 is a dot synchronization pulse generator. 1 to 12 are first to twelfth dot input terminals, which correspond to terminals 1 to 12 in FIG. or first or first
This is a 12 dot position output terminal.

In Figure 2, the output is sequentially started from CPU1.
The 12 channels of digital data are input to the D/A converter 3 via the bus 2 and converted into analog signals. The converted analog signal is sent to the first dot input terminal 1 to the first dot input terminal 1 in the dot recorder 4.
The 12 dots are input in parallel to the input terminal 12. now,
It is assumed that digital data of the first channel is being output from the CPU 1.

In FIG. 3, analog signals input in parallel to terminals 1 to 12 are connected to measurement point switch 11 _-1
The signal is inputted to the amplifier 12 via the .sub.1, and then inputted to the comparator 13 after being amplified by a predetermined amount. The comparator 13 compares the output of a balancing sliding resistor (not shown) with the output of the amplifier 12, and outputs an error voltage signal. A servo motor (not shown) rotates in response to the error signal and slides the balancing sliding resistor, thereby performing a balancing operation so that the error voltage at the comparator 13 is minimized. When the balancing operation is completed, a dotting mechanism (not shown) operates to mark dots corresponding to the first channel, thereby completing the recording of the data of the first channel.

The dot synchronization pulse generator 14 generates a dot synchronization pulse (approximately 80 mS) simultaneously with the marking. The dot synchronization pulse is outputted to the first dot position output terminal as a dot position output signal via the measurement point switch 11 _-2 .

In FIG. 2, the dot position output signal outputted to the terminal is inputted from the bus 2 to the CPU 1 via the digital input section 5 as a digital input (interrupt input) of the first channel. The digital input section 5 receives the signal from the dot recorder 4 and the CPU 1.
It is provided as an interface with the signals in the The CPU 1 thereby outputs the next second channel digital data, and marking of the second channel data is thereafter performed in the same manner as described above.

In this way, by sequentially outputting the data of the next channel every time the digital data of the previous channel from the CPU 1 ends,
In the dot recorder 4, 12 channels of analog data are sequentially recorded as dots.

FIG. 4 is a time chart showing the operation of each part in FIGS. 2 and 3. FIG. In the figure, a indicates a digital input, and the first channel dot position output signal is input to the digital input section 5 at the same time as the first channel mark point, that is, the first mark point, and the first channel digital input is generated. Similarly, it is shown that digital inputs of the second channel, third channel, etc. are generated corresponding to the second marked point, third marked point, etc., respectively. Further, b indicates output data from the D/A converter 3, and data at the first point, data at the second point, and so on are set sequentially in accordance with the digital data of channel 1, channel 2, and so on. It is shown.

In the above, the case of a dot recorder with 12 channels has been described, but the present invention is not limited to this case, and can be applied to a dot recorder with any number of channels. Needless to say.

As explained above, in the analog signal output method to the dot recorder of the present invention, the dot operation in the dot recorder and the output of digital data from the CPU are performed at the same timing. The A converter is used time-divisionally for multi-channel data. Therefore, the number of D/A converters required in the conventional system for the number of channels can be replaced with a single D/A converter, making it possible to significantly reduce the cost and downsizing the equipment. It is possible to reduce power consumption and is extremely effective.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing the analog signal output method to the conventional dot recorder, Fig. 2 is a block diagram showing the analog signal output method to the dot recorder of the present invention, and Fig. 3 is the main points of the dot recorder. A diagram showing the parts,
FIG. 4 is a time chart showing the operation of each part in FIGS. 2 and 3. FIG. 1: Central processing unit (CPU), 2: Bus, 3,3
_-1 , 3 _-2 ,...3 _-12 : D/A converter, 4: Dot recorder, 5: Digital input section, 11 _-1 , 11 _-2 : Measurement point switch, 12: Amplifier, 13: Comparison vessel, 1
4: Dot synchronous pulse generator.

Claims (1)

[Claims] 1. In a multi-dot recorder that switches and outputs a dot synchronization pulse to a plurality of output terminals corresponding to the plurality of inputs in synchronization with switching of a plurality of analog signal inputs, the dot synchronization pulse is generated at the plurality of output terminals. Accordingly, a plurality of digital data are sequentially output on a common line in a time-division manner, and a single digital-to-analog converter is provided to convert the digital data on the common line to digital-to-analog, thereby converting the digital data on the common line to a plurality of multi-dot recorders. An analog signal output method to a dot recorder, characterized in that the analog signal is applied in parallel to the analog signal input of the dot recorder.