JPS6259395B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a magnetic bubble memory tester having independent read and write major lines, and particularly to a magnetic bubble memory tester suitable for speeding up testing.

Conventional magnetic bubble memory testers take a long time because the write cycle and read cycle are executed separately, and the read cycle is executed after the write cycle is completed.

A generally widely used major/minor loop type magnetic bubble memory uses the same major loop during the write cycle and read cycle, so they cannot be used at the same time.

FIG. 1 is a block diagram of a major/minor loop type magnetic bubble memory. In the figure, 1 is a minor loop, 2 is a major loop, 3 is a transfer gate, 4 is a detector, and 5 is a generator.

FIG. 2 is a block diagram of a conventional magnetic bubble memory tester for testing such magnetic bubble memories. In the figure, 10 is a magnetic bubble memory, 11 is an address counter that defines the address within the minor loop, 12 is a loop counter that indicates the minor loop number, 13 is a function timing generator that generates each function timing, and 14 is data. A data pattern generator consisting of a data pattern memory storing patterns, 15
16 is a function pulse drive circuit; 17 is a rotating magnetic field drive circuit; 18 is a R/W control circuit that controls read and write cycles;
1 is a sense circuit, 19 is a data comparator, and 20 is an error processing circuit.

Next, an overview of the operation of such a circuit will be explained with regard to a read cycle.

When the test address in the minor loop is specified by the address counter 11, the read cycle is specified by the R/W control circuit 15, so the function timing corresponding to the read cycle is determined by the function timing generator 13.
The signal is output from the drive circuit 16 and drives each drive circuit 16 and 17.
The output from the magnetic bubble memory 10 is sent to the sense circuit 1
The bit serial data is compared with the write data via a data comparator 19 via a data comparator 19, and the presence or absence of an error is checked. Write data and read data are
A loop counter defines which loop the data comes from. A write cycle is performed in a similar manner. In this manner, in conventional testers, write cycles and read cycles are executed separately in order to commonly use the major loop. Because magnetic bubble memory handles bit-serial data, testing it took a long time.

It is an object of the present invention to shorten and speed up the conventional inefficient and long test time.

Embodiments of the present invention will be described below with reference to FIGS. 3 and 4.

As described above, the major/minor loop type magnetic bubble memory uses the same major loop during the write cycle and the read cycle, so writing and reading can only be executed separately. On the other hand, magnetic bubble memory using the replicate swap gate method has independent read and write major lines, so it is possible to execute the write cycle and read cycle simultaneously, and the tester is equipped with this function. This makes it possible to shorten test time.

Therefore, the present invention is a tester using this replicate swap gate type magnetic bubble memory.

FIG. 3 is a block diagram of a replicate swap gate type magnetic bubble memory. In the figure,
1 is the minor loop, 4 is the detector, 5 is the generator, 6
is a write major line, 7 is a read major line, 8 is a replicate gate, and 9 is a swap gate. Since this type of magnetic bubble memory uses separate major lines for reading and writing, it is possible to execute read and write cycles at exactly the same time.

FIG. 4 is a block diagram of an embodiment of the magnetic bubble memory tester of the present invention. In the figure, the same or corresponding parts as in FIG. 2 are given the same reference numerals.
10a is a replicate swap gate type magnetic bubble memory shown in FIG. 3; 21 is a write address counter; 22 is a write loop counter;
23 is a read address counter, and 24 is a read loop counter.

In order to execute the read cycle and the write cycle simultaneously, it has a read cycle control circuit and a write control circuit that control each cycle, and the address of the minor loop is generally different between the read cycle and the write cycle. Separate address counters 23 and 21 are required for reading and writing, and two loop counters 24 and 22 are also required. On the other hand, data patterns are shared in read cycles and write cycles, and can be accessed and shared in a time-sharing manner using high-speed memory. In this way, like the replicate swap gate method,
Testing of a magnetic bubble memory having independent read and write major lines makes it possible to execute read and write cycles at the same time. That is, in a read cycle, when a test address is defined by the read address counter 23 for the read cycle, a function pulse is generated from the function timing generator 13 to drive a bubble. The bubble output is sent to a data comparator 19 through a sense circuit 18 and checked for errors. On the other hand, independently from this, write address counter 2 for write cycles is
1 defines the test address for writing, a function timing pulse is generated from the function timing generator 13, the drive circuit is driven, and data is written into the magnetic bubble memory 10a.

As described above, according to the present invention, since the read cycle and write cycle tests can be performed simultaneously, the test time can be reduced to approximately half that of the conventional bubble memory test.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of a magnetic bubble memory using the major/minor loop method, Fig. 2 is a block diagram of a conventional magnetic bubble memory tester, Fig. 3 is a block diagram of a magnetic bubble memory using the replicate/swap gate method, and Fig. 4 is a block diagram of a magnetic bubble memory using the replicate/swap gate method. 1 is a block diagram of an embodiment of a magnetic bubble memory tester of the present invention. FIG. 1...minor loop, 4...detector, 5...generator, 6...write measure line, 7...read measure line, 8...replicate gate, 9...
...Swap gate, 21...Write address counter, 22...Write loop counter, 23...
Read address counter, 24...Read loop counter.

Claims (1)

[Claims] 1. In a tester that tests a magnetic bubble memory that has multiple minor loops and independent read major lines and write major lines, a circuit that controls write cycles and a circuit that controls read cycles are installed, and write cycle and read cycle A magnetic bubble memory tester that runs simultaneously.