JPS6262470B2 - - Google Patents

Abstract

PURPOSE:To reduce heat resistance for a device producing much heat and improve heat radiation, by accumulating an insulating ceramic layer with holes on supporting substrate surface, coating and hardening an insulating resin, and attaching an element via a conductive layer. CONSTITUTION:One surface of an Al-held substrate 21 of 2mm. thich is blown and coarse-surfaced with Al2O3 flour. A ceramic layer 22 composed of Al2O3 is accumulated by 100-120um with plasma evaporation. Some epoxy resin is dropped on the layer 22 surface at the temperature of 60 deg.C. It is spread on the whole surface and buried into the layer 22 holes. Next, a resin layer 23 on the surface is removed after hardening. A Cu heat block 26 or an element such as a power transistor is attached via soldering layers 25,27, after forming a conductive pattern 24. This reduces heat resistance of the insulating layer 22. The insulating property is improved. It is suitable for mounting an element which produces much heat.

Description

[Detailed description of the invention]

The present invention relates to a semiconductor device incorporating a semiconductor element that generates a large amount of heat, and a method for manufacturing the same. Conduction, convection, and radiation can be considered as heat dissipation means for a semiconductor device incorporating a semiconductor element that generates a large amount of heat, such as a power transistor. Among these, when focusing on conduction, the first general model is
A heat dissipation path as shown in the figure can be considered. In the figure, 1 is a power transistor that generates heat, 2 is a heat block made of Cu and serves to absorb the heat instantaneously generated by the power transistor 1, and 3 is a
A conductive layer made of Cu, 4 an insulating layer, 5 a support substrate, and 6 a heat dissipation plate with heat dissipation fins. 4 and support substrate 5
is sequentially conducted and reaches the heat sink 6, from where it is emitted into the air. In a hybrid integrated circuit device, which is one type of semiconductor device, in addition to the power transistor 1, a resistor, a capacitor, a small-signal transistor, etc. are incorporated on a support substrate 5 to form a predetermined circuit function. Further, during mounting, elements such as the power transistor 1 are protected by sealing with a metal lid, and are further screwed to a heat sink 6 of a required size to enhance the heat dissipation effect. By the way, in order for the heat generated in the power transistor 1 to reach the heat sink 6 in a short time and be released into the air from there, the heat block 2, the conductor layer 3, the insulator layer 4, the support substrate 5 and the heat sink must Board 6
It becomes necessary for each to have good heat conduction. Generally, the amount of heat Q conducted in a certain substance is given by the following equation. Q=K・A・ΔT/ΔX ...(1) K: Thermal conductivity of the material A: Area of the part where heat is conducted ΔX: Thickness of the material ΔT: Temperature difference at both ends of the material Also, the above equation (1) By transforming , we get the following formula. ΔT=ΔX/K・A・Q……(2) The above equation (2) is Ohm’s law in electronic circuits V=
It corresponds to R·I (V: voltage, R: resistance, I: current), and ΔX/K·A is called thermal resistance and is expressed as Rth.
Therefore, the quality of heat conduction of a material can be judged by the magnitude of this Rth value. In other words, the thinner the thickness ΔX of the substance and the larger the thermal conductivity K,
It can be seen that the thermal resistance Rth becomes smaller and the heat conduction becomes better. Now, as shown in Fig. 2, the power transistor 1
Assuming that _the heat _generated at The thermal resistance Rth in the heat block 2 between W ₁ <W ₂ ) is given by the following equation. Rth=1/K∫ ^W2 _W1 1/(2Z+B) ₂ dZ =-1/K{1/2( _2W2 +B-1/2( _2W1 +B)}...(3) B: Width of power transistor 1 FIG. 3 is a cross-sectional view showing an example of the configuration of a conventional semiconductor device. 11 is a power transistor with a planar external dimension of 3 mm square and a thickness of 130 μm, 12 is a high-temperature solder layer with a thickness of 40 μm, and 13 is a planar external dimension. is 13
mm□, heat block made of Cu with a thickness of 3 mm, 14 a solder layer with a thickness of 100 μm, 15 a conductive layer made of Cu with a thickness of 35 μm, 16 with a thickness of
Insulating layer made of 25 μm epoxy resin, 17
is a support substrate made of Al with a thickness of 2 mm. In a semiconductor device having such a configuration, the above (3)
The following table shows the thermal resistance Rth of each material based on the formula.

【table】

[Table] That is, as is clear from the above table, the thermal resistance of the entire conventional semiconductor device is 1.162° C./W. Of these, the heat block 13 and the insulator layer 16 made of epoxy resin account for a large proportion. Therefore, in order to lower the overall thermal resistance, it is sufficient to lower the thermal resistance of both of the above materials, but since one heat block 13 plays the role of absorbing the heat instantaneously generated by the power transistor 11, its thickness It is difficult to make it thin. As described above, the conventional method has a disadvantage in that the overall thermal resistance is high and the heat generated in the semiconductor element cannot be efficiently released to the outside. This invention was made in consideration of the above-mentioned circumstances, and its purpose is to efficiently dissipate heat generated in a semiconductor element to the outside while lowering the overall thermal resistance. An object of the present invention is to provide a semiconductor device and a method for manufacturing the same. An embodiment of the present invention will be described below with reference to the drawings. FIG. 4 is a sectional view showing each step in manufacturing the semiconductor device according to the present invention, which is manufactured as follows. First, as shown in FIG. 4a, coarse powder of alumina (Al ₂ O ₃ ) is sprayed onto one surface of the supporting substrate 21 made of Al with a thickness of 2 mm to form a powder of 20 to 30 μm.
After that, an insulating ceramic layer 22 made of Al ₂ O ₃ is coated on the surface of the supporting substrate 21 by plasma spraying within 1 to 2 hours.
It is deposited to a thickness of 100 to 120 μm. The above plasma spraying method involves flowing an inert gas or a mixture of inert gas and hydrogen or helium between electrodes called a plasma spray gun, generating an electric arc between the electrodes and exciting the gas. to generate a thermal plasma. Then, Al ₂ O ₃ powder consisting of particles with a size of 5 to 50 μm is introduced into the flame where this thermal plasma is generated, and this Al ₂ O ₃
The material is attached to the support substrate 21 in a melted state. Next, the substrate 21 is heated at a temperature of 125°C for 2 to 3 hours, then returned to room temperature, and then left on a hot plate kept at 60°C, and a thermosetting insulating composition is applied to the surface of the ceramic layer 22. For example, epoxy resin 23 is dropped and spread over the entire surface (FIG. 4b). In general, the density of a layer formed by thermal spraying is lower than that of a sintered body, and is said to be about 90% of that of a sintered body. That is, many connected pores exist in the ceramic layer 22 formed above. Therefore, when the epoxy resin is dropped onto the surface of the ceramic layer 22 and applied to the entire surface as described above, the epoxy resin enters into the connecting pores and the connecting pores are filled with the epoxy resin. After this, remove the excess epoxy resin 23 on the surface with a squeegee, etc., and heat it at 150℃.
Heat for 30 minutes and 180°C for 30 minutes to harden the epoxy resin. Next, a Cu paste was screen printed on the surface of the ceramic layer 22 in which the connecting pores were filled with epoxy resin, and then
C. for 30 minutes to form a patterned conductor layer 24 as shown in FIG. 4c. After this, as in the conventional case, a solder layer 25 is applied to the surface of the conductor layer 24 as shown in FIG. 4d.
A heat block 26 made of Cu is attached, and a high temperature solder layer 2 is added to the surface of the heat block 26.
A semiconductor element 28 that generates a large amount of heat, such as a power transistor, is attached through the cap 7, and then sealed with a metal lid to complete the process. In the semiconductor device having such a configuration, by employing the ceramic layer 22 as an insulating material deposited on the support substrate 21, the overall thermal resistance can be significantly lowered than in the past. For example, if the thickness of this ceramic layer 22 is set to 100 μm, the thickness of this layer calculated using equation (3) above is
Rth is 0.041℃/W, and the overall thermal resistance is 0.632
It was possible to significantly reduce the temperature to ℃/W. As a result, in the semiconductor device having the above configuration, heat generated in the semiconductor element can be efficiently released to the outside. Additionally, a ceramic layer 22 formed by thermal spraying
initially plays the role of an insulating layer,
As time passes, moisture and the like enter the connecting holes, resulting in a decrease in insulation and a short-circuit condition. Further, when the conductor layer 24 is formed by printing a Cu paste, Cu particles enter the connected pores of the ceramic layer 22 and cause a short circuit phenomenon as described above. However, in the case of the above embodiment, the conductor layer 2
4, the connecting pores in the ceramic layer 22 were filled with epoxy resin.
The insulation properties of the ceramic layer 22 can be extremely high. For example, the table below shows the initial value and a constant temperature bath maintained at 150°C in order to confirm the difference in voltage resistance characteristics of the ceramic layer 22 with and without epoxy resin filling process of connecting holes. This shows the withstand voltage after being left for 168 hours.

[Table] As is clear from the above table, the withstand voltage of the ceramic layer 22 could be significantly improved by performing the embedding treatment with the epoxy resin.
The selection criteria for the insulating composition used during the embedding process to improve withstand voltage are that it has low viscosity and good workability, and that the volume after the embedding process is reduced if a solvent is used. In order to lower the viscosity, conditions such as not using a solvent and a low curing temperature and short curing time are required. In addition to the above-mentioned epoxy resins, examples of resins that satisfy these conditions include thermosetting resins such as acrylic resins, polyurethane resins, diallyl phthalate resins, prebutadiene resins, polyimide resins, and bismaleimide resins, either alone or in combination. It is possible to use either a polyester resin or a polyfunctional monomer containing a low molecular weight polyfunctional monomer. In addition, although the ceramic layer 22 is formed using alumina (Al ₂ O ₃ ), it can also be formed using beryllia (BeO), magnesia (MgO), titanium oxide (TiO ₂ ), aluminum nitride (AlN). , boron nitride (BN), etc. can be used. As explained above, in the semiconductor device and its manufacturing method according to the present invention, since a ceramic layer is used as an insulating layer, the overall thermal resistance can be lowered, and the heat generated in the semiconductor element can be efficiently transferred to the outside. can be released.

[Brief explanation of the drawing]

Figure 1 is a diagram for explaining the general heat dissipation path of a semiconductor device, Figure 2 is an explanatory diagram for calculating the thermal resistance of a material, and Figure 3 is a cross section showing an example of the configuration of a conventional semiconductor device. 4A to 4D are cross-sectional views showing each step in manufacturing the semiconductor device according to the present invention. 21...Supporting substrate, 22...Ceramic layer, 2
3... Thermosetting epoxy resin, 24... Conductor layer, 25... Solder layer, 26... Heat block,
27...Solder layer, 28...Semiconductor element.

Claims (1)

[Scope of Claims] 1. A support substrate, an insulating ceramic layer deposited on the surface of the support substrate and provided with connected pores,
an insulating composition provided to fill the connecting pores provided in the ceramic layer; a conductor layer formed and patterned on the surface of the ceramic layer; and at least one conductor layer attached on the conductor layer. A semiconductor device characterized by comprising one semiconductor element. 2. Depositing an insulating ceramic layer on the surface of the support substrate by thermal spraying technology, applying a thermosetting insulating composition to the surface of the ceramic layer and curing it,
A method for manufacturing a semiconductor device, characterized in that a conductor layer is then patterned on the surface of the ceramic layer, and at least one semiconductor element is attached on the patterned conductor layer.