JPS626371B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a locking method for reliably locking a PLL (Phase Locked Loop) to an input signal within a locking range.

The PLL uses a voltage controlled oscillator (hereinafter referred to as VCO)
There is a capture range centered around the free-running frequency of the device, which transitions from a non-lock state to a lock state if the frequency of the input signal is within this range, and a range in which the device can maintain the lock state once it locks to the input signal. The lock range that can be achieved is defined. Commercially available PLL ICs vary depending on how they are used, but the capture range uses VCO.
The lock range is about ±10% of the free-running frequency of the VCO, and the lock range is about ±several+% of the free-running frequency of the VCO. Therefore, there was a drawback that the PLL could not lock onto an input signal whose frequency fluctuation range was outside the capture range, and the PLL could not function.

SUMMARY OF THE INVENTION An object of the present invention is to eliminate the above drawbacks and provide a PLL locking method that can lock the PLL to the input signal even if the frequency fluctuation range of the input signal is outside the capture range as long as it is within the lock range. shall be.

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 shows an example in which the present invention is implemented in a toner density controller for a copying machine. The power supply section 11 is a circuit that generates positive and negative power supplies (+Vcc, -Vcc) from one power supply input, and includes resistors R1 and R2, an operational amplifier u1,
Consisting of transistors TR1 and TR2, positive and negative power supplies determined by the voltage division ratio of resistors R1 and R2 with the ground potential as a reference; in this example, R1 = R2.
Generates a ±6V power supply from a 12V input voltage. The oscillator 12 is a Colpitts-type oscillator that oscillates at a frequency determined by the capacitors C2, C3 and the coil L, and is composed of a transistor TR3, a coil L, capacitors C2 and C3, and resistors R3 to R6. The coil L is installed in the developer flow path of the developing device of the copying machine, and the inductance of the coil L changes depending on the mixing ratio of the developer, which is a mixture of iron powder and toner, that is, the toner concentration, and the oscillator 12 changes the toner concentration. It oscillates at the corresponding frequency. The FM demodulator 13
PLL IC (NE565A, manufactured by Signetakes) 14
The output of the oscillator 12 is input to the PLL 14 via a coupling capacitor C4. In this demodulator 13, resistors R7 and R8 are
It constitutes an input bias circuit of the PLL 14, and diodes D1 and D2 constitute an amplitude limiter and function to protect the input circuit. Resistance R9, R10
and capacitor C5 are elements that determine the free-running frequency of the VCO in the PLL 14, and by varying the current of the time constant circuit in the VCO by varying the resistor R9, the free-running frequency of the VCO is varied.
The toner density can be adjusted by changing the output level of the FM demodulator 13. As is clear from the buffer 15 and integrator 16 in the latter stage of the FM demodulator 13, the output of the final stage changes from +Vcc to -Vcc with 0V as the reference.
It swings to the side, so when the toner density is at a certain level,
The resistor R9 is adjusted so that the output of the PLL 14, that is, the voltage between its 6th and 7th terminals becomes 0V.
Capacitors C6 and C7 constitute a low pass filter of the feedback loop of the PLL 14, and are used to stabilize the control loop. Buffer 15 is operational amplifier u
2. It consists of a capacitor C8 and resistors R11 to R14, and buffers the output of the PLL 14 to prevent it from being overloaded. The integrator 16 includes an operational amplifier u3, a capacitor C9, and resistors R15 and R16, and performs level detection by integrating the output of the buffer 15 with 0V as a reference. The reason why the level detection was performed by the integrator 16 is because the output of the PLL 14 includes ripples and ripples due to poor developer circulation, and in order to avoid output caused by high frequency ripples. It is. Although the part where toner is replenished into the developer of the developing device is not shown here, when the output of the integrator 16 is at a low level, the bottle containing replenishment toner is rotated, and the dense toner is poured into the developing tank. It is structured to guide you.

PLL (NE565A) 14 in adjusting resistor R9
Based on the characteristics of the oscillator 12 at a predetermined toner concentration,
When the oscillation frequency fr of the VCO matches the free running frequency fo of the VCO, the voltage between terminals 6 and 7 of the PLL14 is 0V.
Maximum 200mV from catalog value
It has an offset of 200 m.
The free running frequency is set by resistor R9 to cancel V.
It becomes necessary to change and adjust fo. The amount of adjustment is
It is determined by the sensitivity of FM demodulation, and under the worst conditions, it is necessary to shift the free-running frequency fo by 20% with respect to the oscillation frequency fr. However, in this PLL 14, the capture range is about ±10% and the lock range is about 60%, so if the free-running frequency fo is shifted by 20%, the oscillation frequency fr can be adjusted by adjusting the free-running frequency fo. Because of this, conventionally the PLL 14 did not lock onto the output signal of the oscillator 12 when the power was turned on, resulting in a situation where it could not function as a toner density controller.
In this embodiment, resistors R17 to R19 and capacitor 1
0. By providing a time constant circuit control circuit consisting of a transistor TR4 and gradually changing the currents of resistors R9 and R10 after the power is turned on, the rise of the voltage applied to the free-running frequency determining elements R9 and R10 of the VCO is exponentially shaped. And in the middle of its rise
The configuration is such that the current in the time constant circuit at VC0 is reduced and the charging current to capacitor C5 is reduced, and the free-running frequency fo of the VCO is oscillated in a sweep manner to ensure that the PLL 14 is locked to the output signal of the oscillator 12. be. Fo in FIG. 3 shows this state using the AC component of the terminal voltage of the capacitor C5. fr in FIG. 3 is the output waveform of the oscillator 12,
Since a predetermined voltage is applied to the oscillator 12 when the power is turned on, the oscillator 12 oscillates at a constant frequency fr from the beginning.
Figure 2 shows the relationship between fr and fo with frequency as the horizontal axis.As mentioned above, fo may become higher than fr and exceed the capture range. Even in this case, if you sweep fo as shown in Figure 3, fo will gradually move from a low frequency to a high frequency and pass by fr, or fr will enter the capture range and the PLL 14 will be in a locked state. Become. Once the PLL 14 is in the locked state, it operates within the lock range shown by the chain line in FIG. 2, so it can operate reliably even against large fluctuations in fr caused by ripples in the flow of toner.

After turning on the power, the light emitting diode gradually changes.
The current of the LED increases, and the phototransistor PTR that receives the light controls the currents of resistors R9 and R10 to sweep fo from a low value to a high value. In the above embodiment, as shown in FIG. 4, if the resistor R17 and capacitor C10 are reversed and a resistor R20 is connected in parallel with the phototransistor PTR, fo can be swept from a high value to a low value. Such a sweep is fo for fr
is used when the is shifting towards the lower side. The resistor R20 is a resistor for determining fo when the phototransistor PTR is cut off. Also fo
Capacitor C5 can be similarly controlled to sweep . Although the example in which NE565A manufactured by Signetakes is used as the PLL has been described above, the present invention is applicable to PLLs in general. This is especially necessary when the frequency shift band of the input is wide, such as when used in a motor speed control device or a toner density controller of a copying machine, and the PLL can perform reliable control. If the power supplies for the oscillator 12 (or signal receiver) and the PLL 14 are different, it is sufficient to sweep the fo of the PLL when the power supply that rises slowly rises.

As described above, the PLL locking method according to the present invention
In a PLL in which the free-running frequency of the VCO can be changed by varying the current of the time constant circuit in the VCO, a circuit is provided that generates a signal that gradually changes after power is turned on, and the signal causes the current of the time constant circuit to change. Since the VCO is caused to sweep oscillate by changing the PLL, even if the frequency fluctuation of the PLL input signal is outside the capture range, if it is within the lock range, the PLL can be kept in the lock state.
PLL can be used even when the input frequency fluctuates widely.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an example of a toner density controller to which the present invention is applied, FIGS. 2 and 3 are diagrams for explaining the present invention, and FIG. 4 is a circuit diagram for explaining an embodiment of the present invention. It is a circuit diagram. 11...Power supply unit, 13...FM demodulator, 14...
...PLL, R9, R10...Resistor, C5...Capacitor, R17-R20...Resistor, C10...Capacitor, TR4...Transistor, LED...Light-emitting diode, PTR...Phototransistor.

Claims (1)

[Claims] 1 In a PLL that is powered by a DC power source and can change the free-running frequency of the voltage controlled oscillator by varying the current of the time constant circuit in the voltage controlled oscillator, a signal that gradually changes after the DC power source is turned on is generated. A circuit is provided, and the current of the time constant circuit is changed by a signal from the circuit to cause the voltage controlled oscillator to sweep oscillate, thereby locking the PLL to an input signal within a lock range. PLL lock method.