JPS626422B2 - - Google Patents
Info
- Publication number
- JPS626422B2 JPS626422B2 JP15088778A JP15088778A JPS626422B2 JP S626422 B2 JPS626422 B2 JP S626422B2 JP 15088778 A JP15088778 A JP 15088778A JP 15088778 A JP15088778 A JP 15088778A JP S626422 B2 JPS626422 B2 JP S626422B2
- Authority
- JP
- Japan
- Prior art keywords
- diode
- output
- circuit
- winding
- capacitor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000004804 winding Methods 0.000 claims description 17
- 239000003990 capacitor Substances 0.000 claims description 10
- 238000009499 grossing Methods 0.000 claims description 8
- 239000004575 stone Substances 0.000 claims description 4
- 230000005284 excitation Effects 0.000 description 9
Landscapes
- Dc-Dc Converters (AREA)
Description
【発明の詳細な説明】
本発明はトランス結合型一石コンバータに関す
る。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a transformer-coupled single-stone converter.
第1図は従来の昇圧型一石コンバータを示す。
出力電圧が比較的高くて出力整流ダイオードの順
方向電圧が無視出来る昇圧型コンバータにおいて
は主トランスの小型化及び耐圧設計の点から第1
図に示すように出力一巻線で全波整流を行なう回
路が用いられる。 FIG. 1 shows a conventional step-up single-stone converter.
For boost converters, where the output voltage is relatively high and the forward voltage of the output rectifier diode can be ignored, the first priority is to downsize the main transformer and design it withstand voltage.
As shown in the figure, a circuit that performs full-wave rectification with one output winding is used.
第1図の動作を第2図の各部動作波形を参照し
て説明する。今、t=0で主トランジスタQ1が
オンすると出力整流ダイオードD1,D2がオンと
なり、Q1には励磁電流、Q1がオンする直前に主
トランスT1の出力巻線に流れていた電流を連続
ならしめるための電流、及び負荷電流に応じた電
流が和となりコレクタ電流として流れる。今、t
=t1でQ1がカツトオフになるとt=0〜t1の期間
主トランスT1に蓄えられた励磁エネルギーによ
るフライバツクの電圧によりダイオードD5がオ
ンとなり、励磁エネルギーの大部分は電源E1側
へ戻される。このとき整流ダイオードD3,D4
がオンとなり、T1の励磁エネルギーの一部を出
力側へ放出する。t=t2で励磁エネルギーが消滅
しダイオードD5がカツトオフとなると、出力平
滑チヨークL1を流れる電流を連続ならしめるよ
うに出力電流がL1→R→D4→巻線n3→D3の
径路で流れ続ける。 The operation in FIG. 1 will be explained with reference to the operation waveforms of each part in FIG. 2. Now, when the main transistor Q 1 turns on at t=0, the output rectifier diodes D 1 and D 2 turn on, and an exciting current flows into Q 1 , and immediately before Q 1 turns on, it flows into the output winding of the main transformer T 1 . The current for making the current continuous and the current corresponding to the load current are summed and flow as a collector current. Now, t
When Q1 is cut off at = t 1 , diode D5 is turned on by the flyback voltage due to the excitation energy stored in the main transformer T 1 during the period from t = 0 to t 1 , and most of the excitation energy is transferred to the power supply E 1 side. be returned. At this time, rectifier diodes D3, D4
is turned on and releases a part of the excitation energy of T1 to the output side. When the excitation energy disappears at t= t2 and the diode D5 is cut off, the output current continues to flow along the path L1→R→D4→winding n3 →D3 so as to make the current flowing through the output smoothing yoke L1 continuous. .
ここで出力電圧V0は次式で表わされる。 Here, the output voltage V 0 is expressed by the following equation.
V0≒E1n3/n1・t1+t2/T
第1図では、Q1がカツトオフ時にエミツタ・
コレクタ間に印加する電圧(≒E1n1/n2)により
T1の巻線n2の巻数が制限を受ける上にトランス
T1の励磁エネルギーの大部分が入力電源側に戻
されることから、高圧出力を得るためには巻数比
(n3/n1)を大きくするしかない。これにより従来
回路では主トランスT1の小型化、及び耐圧設計
が難かしくなるという欠点があつた。 V 0 ≒E 1 n 3 /n 1・t 1 +t 2 /T In Figure 1, when Q1 is cut off, the emitter
Depending on the voltage applied between the collectors (≒E 1 n 1 /n 2 )
The number of turns of winding n 2 of T 1 is limited and the transformer
Since most of the excitation energy of T 1 is returned to the input power supply side, the only way to obtain high voltage output is to increase the turns ratio (n 3 /n 1 ). As a result, the conventional circuit has the disadvantage that it is difficult to downsize the main transformer T1 and to design the voltage resistance.
本発明ではかかる従来回路の欠点を取り除いた
回路を提供するものである。 The present invention provides a circuit that eliminates the drawbacks of such conventional circuits.
第3図に本発明の回路を示す。本回路では主ト
ランスは入・出力の2巻線のみとし、出力巻線の
一端にダイオードD1のアノード側とダイオード
D2のカソード側を、出力巻線の他端にコンデン
サとダイオードD3のアノード側を、コンデンサ
の他端にダイオードD2のアノード側とダイオー
ドD4のカソード側を、出力平滑チヨークにダイ
オードD3のカソード側を出力平滑コンデンサの
一端にダイオードD4のアノード側を接続したも
のである。 FIG. 3 shows the circuit of the present invention. In this circuit, the main transformer has only two windings, input and output.The anode side of diode D1 and the cathode side of diode D2 are connected to one end of the output winding, and the anode side of the capacitor and diode D3 are connected to the other end of the output winding. , the anode side of the diode D2 and the cathode side of the diode D4 are connected to the other end of the capacitor, the cathode side of the diode D3 is connected to the output smoothing circuit, and the anode side of the diode D4 is connected to one end of the output smoothing capacitor.
本回路の動作を第4図に示す各部動作波形を参
照して説明する。 The operation of this circuit will be explained with reference to the operation waveforms of each part shown in FIG.
今、t=t1でトランジスタQ1がカツトオフする
とt=0〜t1の期間トランスT1に蓄積された励磁
エネルギーによるフライバツク電圧によりダイオ
ードD2がオンとなり、コンデンサC2は充電し
始める。充電はT1の励磁エネルギー(1/2Lsi2)が
全てコンデンサC2に静電エネルギー(1/2C2▽2 2
)として移行するまで行なわれる。(ここでLs
は主トランスの一次側インダクタンス、iは励磁
電流を示す)。この時、平滑チヨークL1にQ1が
オン時に流れていた電流を連続ならしめるように
出力電流がL1→R1→D4→D2→巻線n2→D
3の径路で流れる。 Now, when the transistor Q1 is cut off at t= t1 , the flyback voltage due to the excitation energy accumulated in the transformer T1 during the period from t=0 to t1 turns on the diode D2, and the capacitor C2 starts charging. Charging is performed until all of the excitation energy (1/2L s i 2 ) of T 1 is transferred to the capacitor C2 as electrostatic energy (1/2C 2 ▽ 2 2 ). (Here L s
is the primary inductance of the main transformer, and i is the exciting current). At this time, the output current changes from L1 → R 1 → D4 → D2 → winding n 2 → D so that the current that was flowing when Q 1 was on is made continuous in the smoothing yoke L1.
It flows through 3 routes.
次にt=TでトランジスタQ1がオンとなると
ダイオードD1がオンになり、出力電流が巻線n2
→D1→L1→R1→D4→G2→巻線n2の径路
で流れる。この時コンデンサC2が負荷R1と直
列に接続されるためにトランジスタQ1がカツト
オフの期間にコンデンサC2に蓄積された静電エ
ネルギーが出力に放出される。従つて本発明の回
路ではトランスT1の励磁エネルギーを入力電源
側に戻す従来回路に比して入・出力の電力伝達効
率が高まるために、T1の昇圧比(n2/n1)をそ
の分だけ小さくすることが出来る。これによりト
ランスの小型化が図かれると同時に耐圧設計にも
有利となる。 Next, when the transistor Q 1 turns on at t=T, the diode D1 turns on, and the output current flows through the winding n 2
→ D1 → L1 → R 1 → D4 → G2 → Winding n 2 It flows through the path. At this time, since the capacitor C2 is connected in series with the load R1 , the electrostatic energy stored in the capacitor C2 while the transistor Q1 is cut off is released to the output. Therefore, in the circuit of the present invention, the step-up ratio (n 2 /n 1 ) of T 1 is increased to increase the input/output power transfer efficiency compared to the conventional circuit that returns the excitation energy of the transformer T 1 to the input power supply side. It can be made smaller by that amount. As a result, the size of the transformer can be reduced, and at the same time, it is advantageous in terms of voltage resistance design.
以上説明したように本発明は出力にコンデンサ
を1個追加するだけで主トランスの巻線を1巻線
削除出来、しかも主トランスに蓄積される励磁エ
ネルギーを入力側に戻すことなく効率よく出力側
へ放出出来ることを特徴とするものである。 As explained above, the present invention allows one winding of the main transformer to be removed by simply adding one capacitor to the output, and moreover, the excitation energy accumulated in the main transformer can be efficiently transferred to the output side without returning it to the input side. It is characterized by the fact that it can be released into the air.
第1図は従来の回路を示し、第2図は従来回路
の各部動作波形を示し、第3図は本発明の一実施
例の回路を示し、第4図は第3図の各部動作波形
を示す。
E1……入力電源、T1……主トランス、n1…
…一次巻線、Q1……主トランジスタ、L1……チ
ヨーク、n2……出力巻線、D1〜D4……ダイオ
ード。
FIG. 1 shows a conventional circuit, FIG. 2 shows operating waveforms of each part of the conventional circuit, FIG. 3 shows a circuit of an embodiment of the present invention, and FIG. 4 shows operating waveforms of each part of FIG. show. E 1 ... Input power supply, T1 ... Main transformer, n 1 ...
...Primary winding, Q1 ...Main transistor, L1 ...Chiyork, n2 ...Output winding, D1-D4...Diode.
Claims (1)
ンジスタが直列に接続された入力回路と、出力部
にチヨークインプツトの平滑回路を有する一石式
コンバータ回路において、前記主トランスの出力
巻線の一端に第1のダイオードのアノード側と第
2のダイオードのカソード側を、該出力巻線の他
端にコンデンサの一端と第3のダイオードのアノ
ード側を、該コンデンサの他端に前記第2のダイ
オードのアノード側と第4のダイオードのカソー
ド側を、該平滑回路の一端に前記第1のダイオー
ドのカソード側と前記第3のダイオードのカソー
ド側を、該平滑回路の他端に前記第4のダイオー
ドのアノード側を各々接続したことを特徴とする
一石式コンバータ。1. In a single-stone converter circuit having an input circuit in which an input power source, the primary winding of the main transformer, and the main transistor are connected in series, and a smoothing circuit of a choke input at the output part, one end of the output winding of the main transformer the anode side of the first diode and the cathode side of the second diode to the other end of the output winding, one end of the capacitor and the anode side of the third diode to the other end of the output winding, and the second diode to the other end of the capacitor. the anode side of the first diode and the cathode side of the fourth diode at one end of the smoothing circuit, the cathode side of the first diode and the cathode side of the third diode at one end of the smoothing circuit, and the fourth diode at the other end of the smoothing circuit. A single-stone converter characterized in that the anode sides of the two are connected to each other.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15088778A JPS5577373A (en) | 1978-12-05 | 1978-12-05 | Single-transistor converter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15088778A JPS5577373A (en) | 1978-12-05 | 1978-12-05 | Single-transistor converter |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5577373A JPS5577373A (en) | 1980-06-11 |
| JPS626422B2 true JPS626422B2 (en) | 1987-02-10 |
Family
ID=15506547
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15088778A Granted JPS5577373A (en) | 1978-12-05 | 1978-12-05 | Single-transistor converter |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5577373A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20220148971A (en) | 2021-04-29 | 2022-11-08 | 한국조선해양 주식회사 | Apparatus for monitoring flatness of steel plate and cold curvaturing apparatus |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4504896A (en) * | 1981-03-18 | 1985-03-12 | Rca Corporation | Switching dc-to-dc converters |
| US4577268A (en) * | 1982-12-20 | 1986-03-18 | Rca Corporation | Switching dc-to-dc converters |
-
1978
- 1978-12-05 JP JP15088778A patent/JPS5577373A/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20220148971A (en) | 2021-04-29 | 2022-11-08 | 한국조선해양 주식회사 | Apparatus for monitoring flatness of steel plate and cold curvaturing apparatus |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5577373A (en) | 1980-06-11 |
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