JPS627995B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an electronic timer provided with a time memory for counting time and a plurality of timer memories for setting timer information.

Conventionally, this type of electronic timer has a counter for specifying the addresses of multiple timer memories and a key for stepping up the counter, and the device is set to a mode for reading timer information from the timer memory. Then, the timer memory at the address corresponding to the above counter value is specified, and the timer information is called from the specified timer memory, and when changing the timer memory to be called, one counter is set by key operation. A system is known in which the specified address is changed sequentially by stepping up the address. In this type of device, the counter counts the number of timer memories, and when the last timer memory address has been designated, it is reset and the first timer memory address is designated again.

However, with this type of device, for example, when you want to call up timer information set in a certain timer memory and the counter specifies the timer memory address that is one after that timer memory address, the user can You must repeatedly press the key to step up the counter by a number approximately equal to the number of timer memories until the counter specifies the timer memory address where the timer information you want to call is set. There was a drawback that it was troublesome.

The present invention was devised in order to eliminate such drawbacks, and it is an object of the present invention to provide an electronic timer that can easily recall timer information from a timer memory and improve operability. purpose.

Embodiments of the present invention will be described below with reference to the drawings.

In FIG. 1, 1 is a waveform shaping circuit that shapes a commercial AC power waveform into a pulse shape, and 2 is a time memory that counts the pulses output from the waveform shaping circuit 1 to count the time. The time memory 2 has, for example, a quinary or hexadecimal counter at the first stage;
The time counter section consists of a decimal counter in the third stage, a hexadecimal counter in the fourth stage, a decimal counter in the fifth stage, a hexadecimal counter in the sixth stage, and a decimal counter in the seventh stage; It is formed by the afternoon information setting memory section and has a specific address set therein. The first stage counter functions as a quinary counter when the power supply frequency is 50 Hz, and as a hexadecimal counter when the power frequency is 60 Hz. Then, the second stage decimal counter counts 1/10 seconds, the third stage decimal counter counts 1 second, the fourth stage hexadecimal counter counts 10 seconds, and the fifth stage The decimal counter counts 1 minute, and the 6th row hexadecimal counter counts 10 minutes.
Count the minutes and set the 7th decimal counter to 1.
I try to count the time. 3 is a carry detection circuit which detects when there is a carry from the counter counting 10 seconds in the fourth stage to the counter counting 1 minute in the fifth stage in the time memory 2, and notifies the timer memory control circuit 4; 5, 6,
7, 8, 9, 10, 11, 12, and 13 complete the time information for controlling the controlled object such as a time switch, the on/off information of the controlled object, and the time information to be set only once. The first to
This is the ninth timer memory. For example, addresses 1 to 9 are set in the first to ninth timer memories 5 to 13. In response to the carry detection signal from the carry detection circuit 3, the timer memory control circuit 4 sequentially calls out the timer information set in each of the timer memories 5 to 13 based on the address, and compares and detects a match. The signal is supplied to the circuit 14. The comparison match detection circuit 14 compares the timer information sequentially sent from the timer memory control circuit 4 with the time information in the time memory 2, and supplies a match signal to the match calculation circuit 15 when both pieces of information match. ing. The coincidence calculation circuit 15 calculates the coincidence signal inputted from the comparison coincidence detection circuit 14, and controls the setting and reset of the flip-flop 16 based on the result of the calculation. In this case, the coincidence calculation circuit 15 is configured to perform arithmetic processing to give priority to the OFF information when conflicting operation mode information such as ON and OFF for the controlled object is input from the comparison coincidence detection circuit 14 during the same comparison. There is. The flip-flop 16 controls the output circuit 17 according to the set operation and the reset operation, and the output circuit 1
7 to perform an operation of turning on or off the controlled object.

Reference numeral 18 denotes an input section, and this input section 18 inputs the operation mode of the device into the call mode as shown in FIG.
CALL, time display mode CLOCK, timer information setting mode SET, time setting mode TIME ADJ. Mode change switch 19, number keys 20 from 0 to 9, morning information setting key (AM) 21, afternoon information setting key (PM) ) 22, an information setting key (ON) 23 for the controlled object, an OFF information setting key (OFF) 24, a daily information setting key 25, a clear key (CL) 26, and an input key 27 for inputting information. An input section 28 is provided. 29 is a mode storage circuit that stores the mode set by the mode changeover switch 19; 30;
is the mode changeover switch 1 when the mode changeover is performed by the mode changeover switch 19.
9 and the mode storage circuit 29
This is a mode detection circuit which checks the state of coincidence with the mode stored in the mode and, if a mismatch is detected, notifies the gate circuit 31 and the initial display setting circuit 32 of this fact. The gate circuit 31 opens the gate when the mode detection circuit 30 detects a mode mismatch, and causes the mode storage circuit 29 to take in the mode newly set by the mode changeover switch 19. The display setting circuit 32 switches modes by the mode changeover switch 19, and when the mode detection circuit 30 detects a mode mismatch, the mode changeover switch 19 switches the mode.
Control is performed to cause a display device, which will be described later, to perform an initial display with preset contents in accordance with the mode switching contents. For example, when the mode changeover switch 19 is switched to the calling mode CALL and the time display mode CLOCK, control is performed to display the time information in the time memory 2, and when the mode changeover switch 19 is switched to the timer information setting mode SET, the timer memory to be set is controlled. Controls display of address and time setting mode
When switched to TIME ADJ., control is performed to display the address of the time memory 2. Reference numeral 33 indicates a display selection circuit 34, a setting register 35, and an address setting circuit 36 based on the key input from the information input section 28, mode information from the mode storage circuit 29, and initial display setting information from the initial display setting circuit 32. , each timer memory 5
Input control circuit for selectively operating ~13, 37
When the mode changeover switch 19 is switched to the timer information setting mode, each of the timer memories 5
a setting address selection circuit which selects the youngest address from among the addresses of the empty timer memory in which nothing is set among the addresses of 1 to 13, and operates the address setting circuit 36 based on the selected content;
38 receives timer information or time information called from each of the timer memories 5 to 13 or the time memory 2 based on the address information stored in the address register 39 or the address information input from the input control circuit 33. This is a memory content storage register for storing. The display selection circuit 34 sets the display register 40, the setting register 35, and the address register 3 in accordance with the outputs of the initial display setting circuit 32, input control circuit 33, and setting register 35.
9 or the memory content storage register 38 is selected. The setting register 35 supplies the loaded information to one of the timer memories 5 to 13, the display register 40, and the display selection circuit 34 in accordance with the output from the input control circuit 33. The address setting circuit 36 includes the input control circuit 33 and the setting address selection circuit 37.
Set address information based on the output from
The set address information is supplied to the address register 39. 41 is a display device that displays the display information stored in the display register 40; The display device 41 is provided with a dynamic display type digital display. For example, as shown in FIG. 3, this display device includes a display element 41a that displays AM, a display element 41b that displays PM, four hour value display elements 41c, 41d, 41e, 41f that display hour values, and hour value display elements 41c, 41d, 41e, 41f that display hour values. Display elements 41c, 41d and 41e, 4
Two colon display elements 41 separated by 1f.
Each of the time value display elements 41c to 41f is composed of seven segment elements a, b, c, d, e, f, and g.
In this display, the display element 41f is the first digit, the display element 41e is the second digit, the display element 41d is the third digit, and the display element 41c is the fourth digit.
Digit, AM, PM display elements 41a, 41
B and two colon display elements 41g and 41h as the fifth digit, and each digit is connected to a digit terminal D ₁ ,
Connected to D ₂ , D ₃ , D ₄ , and D ₅ respectively. The above digit terminals D ₁ to _{D 5} receive timing signals D ₁ , D ₂ , D ₃ ,
D ₄ , D ₅ , and D ₄ are input in this order. In other words, the fourth digit is changed to 2 within one cycle.
I try to drive it twice. Further, each of the hour value display elements 41c to 41f is a segment element a to 41f.
g to segment drive signal input terminals A, B, C,
Commonly connected to D, E, F, and G,
And display element 41a is connected to terminal E, display element 41b is connected to terminal D, display element 41g is connected to terminal F, and display element 41
h are connected to terminal A, respectively.

For example, when the mode changeover switch 19 is switched to the timer information setting mode SET, the setting address selection circuit 37 selects the youngest address from among the addresses of the timer memories 5 to 13 that have not yet been set. Address setting circuit 3
6 is operated, and the address setting circuit 36 sets the address register 39 as the selected address information.
be incorporated into. On the other hand, timer information setting mode SET
Initially, the setting mode of the mode changeover switch 19 and the storage mode of the mode storage circuit 29 do not match, so the display selection circuit 34 is loaded into the display register 40 and the address register 39 by the initial display setting circuit 32. address information is imported and displayed on the display device 41. In this way, set the mode changeover switch 19 to the timer information setting mode.
When switching to SET, the display device 41 first displays the youngest address among the available addresses in the timer memory. Further, when a mismatch between the set mode of the mode changeover switch 19 and the storage mode of the mode storage circuit 29 is detected, the gate circuit 31 is opened and the mode changeover switch 19 is turned off.
The information on the timer information setting mode set in step 1 is stored in the mode storage circuit 29. When timer information is set in the information input section 28 in this state, the timer information is taken into the setting register 35 via the input control circuit 33. The timer information taken into this setting register 35 is stored in the display selection circuit 3.
4 to the display register 40 and displayed on the display device 41. When the input key 27 of the information input unit 28 is operated with the timer information completely set, the timer information stored in the setting register 35 is transferred to the address register 39.
is stored in the timer memory at the address taken in. That is, the timer information is stored in the timer memory with the youngest address among the available timer memories. When the timer information is stored in the timer memory, the setting register 35 is cleared. Further, the setting address selection circuit 35 again selects the smallest address of the timer memory among the vacant timer memories and notifies the address setting circuit 36 of the selected address. Based on this, the address information is taken into the address register 39. Then, by clearing the setting register 35, the display selection circuit 34 clears the address register 39.
The address information taken in is taken into the display register 40 and displayed on the display device 41. Therefore, for example, when the timer information setting mode is set by the mode changeover switch 19 and the timer memories from addresses 5 to 9 are empty, the address information for address 5 is first displayed on the display device 41, and then the information input section 28 The timer information input from is stored in the timer memory at address 5. Then, when the timer information is stored in the timer memory at address 5,
Address information of the street address is displayed on the display device 41,
Next, it informs you of the free timer memory in which timer information should be set. In this timer information setting mode, the address information displayed on the display device 41 is displayed using the time value display elements 41c to 41f as shown in FIGS. 5 to 13. ~
〓〓〓〓”. or,
For example, if the timer information is to be turned on at 7:20 every morning, the key operations in the information input section 28 will be "7", "2", "0", "AM", etc.
When the display device 41 is operated as "ON" and "Daily", the first
The display is performed in the order of a to e in FIG. 7 and FIG. 14. Here, "ON" is displayed by the segment element f of the hour value display element 41c, and "Daily" is displayed by the two colon display elements 41g and 41h. For example, when timer information indicating OFF is input at 12:16 p.m., a display as shown in FIG. 15 is displayed on the display device 41. Here, "OFF" is displayed by the segment element e of the hour value display element 41c.

In this way, on/off information is displayed by the segment elements f and e of the time value display element 41c.
These elements f and e are not used at all in the 12-hour format because the hour value display element 41c only displays "1"; in this embodiment, the display of elements f and e is connected to the digit terminal _D4 . A timing signal is input twice in one cycle, and the operation is performed using the second timing signal.

Also, for example, when the mode selector switch 19 is switched to the time setting mode TIME ADJ., the initial setting is changed due to a mismatch between the setting mode of the mode selector switch 19 and the storage mode of the mode storage circuit 29, similar to when switching the timer information setting mode described above. Display setting circuit 32
works. On the other hand, when the mode changeover switch 19 is switched to the time setting mode, the input control circuit 33 notifies the address setting circuit 36 of this fact, and the address setting circuit 36 sets clock address information and causes the address register 39 to take it in. Then, the initial display setting circuit 32 controls the display selection circuit 34.
is controlled and the display selection circuit 34 is controlled by the display register 4.
The clock address stored in the address register 39 is loaded into the address register 39 and displayed on the display device 41. When the mode changeover switch 19 is thus switched to the time setting mode, the clock address is first displayed on the display device 41. The display at this time is as shown in FIG. Further, the mode detection circuit 30 changes the setting mode of the mode changeover switch 19 when a mismatch between the storage modes of the mode storage circuit 29 is detected, opens the gate circuit 31, sets the mode changeover switch 19, and changes the time setting mode information to the mode. The data is stored in the memory circuit 29. When time information is set in the information input section 28 in this state, the time information is taken into the setting register 35 via the input control circuit 33. This setting register 3
The time information taken in by the display selection circuit 34 is taken into the display register 40 and displayed on the display device 41.
Displayed by. For example, to set the time information for 8:29 a.m., use the keys "8", "2", "9", and "AM" in the information input section 28, and set the actual time information for 8:29 a.m. Operate the input key 27. However, the setting register 35
The time information taken in is stored in the time memory 2. At the same time, in time memory 2, 10 seconds, 1
The counters that count seconds, 1/10 seconds, and power supply frequency are cleared, and from that point on, the waveform shaping circuit 1
Counting of pulse signals from is started. or,
At the same time, the setting register 35 is cleared and the display device 4
1, the clock address stored in the address register 39 is displayed again as shown in FIG.

Also, for example, when the mode changeover switch 19 is switched to the time display mode CLOCK, the input control circuit 33 is controlled by the initial display setting circuit 32, and the address setting circuit 36 is controlled by the input control circuit 33 to set the address. The clock address is loaded into the register 39, and time information is loaded from the time memory 2 into the memory content storage register 38 based on the address in the address register 39. In addition, the display selection circuit 3 is controlled by the input control circuit 33.
4 is controlled, the display register 40 is controlled by the display selection circuit 34, and the time information taken into the memory content storage register 38 is taken into the display register 40 and displayed on the display device 41. Ru. For example, if it is 8:45 a.m., display device 4
1, the screen is displayed as shown in FIG. At this time, the two colon display elements 41g and 41h blink to indicate 1 second. This time display mode
In CLOCK, no matter what key operation is performed in the information input section 28, the input control circuit 3
3 is designed to control not to accept that information. Of course, at this time as well, the gate circuit 31 is opened and the mode set by the mode changeover switch 19 is stored in the mode storage circuit 29.

Further, for example, when the mode changeover switch 19 is switched to the calling mode CALL, the initial display is displayed due to the mismatch between the setting mode of the mode changeover switch 19 and the storage mode of the mode storage circuit 29, in the same way as when switching the timer information setting mode described above. Setting circuit 3
2 works. On the other hand, when the mode changeover switch 19 is switched to the calling mode CALL, the input control circuit 33 notifies the address setting circuit 36 of this fact, and the address setting circuit 36 sets clock address information and causes the address register 39 to take in the clock address information. The time memory 2 is specified based on the clock address taken into the address register 39, and time information is transferred from the time memory 2 to the memory content storage register 38.
be taken into account. Then, by the operation of the initial display setting circuit 32, the time information of the memory content storage register 38 is taken into the display register 40, and the display device 4
1. For example, if the current time memory 2 is counting 8:45 a.m., the display device 41
As shown in FIG. 16, time information of 8:45 a.m. is displayed. This is similar to the display of time information in the time display mode. In this way, when the mode changeover switch 19 is switched to the calling mode CALL, the display device 41 first displays time information. Also, mode changeover switch 19
When a mismatch between the set mode and the storage mode of the mode storage circuit 29 is detected, the gate circuit 31 is opened and the information of the calling mode set by the mode changeover switch 19 is stored in the mode storage circuit 29. In this state, if you want to check the timer information of the timer memory at address 1, that is, the first timer memory 5, press the numeric key 2 in the information input section 28.
All you have to do is operate on "1" of 0. In other words, when "1" of the number key 20 is pressed, the input control circuit 33
The address setting circuit 36 is controlled by the address setting circuit 36, and the address information of address 1 is taken into the address register 39 by the address setting circuit 36. Then, the address information of address 1, which is taken into the address register 39, is transferred to the display register 34 by the display selection circuit 34 operated by the input control circuit 33.
0 and displayed on the display device 41. The display on the display device 41 at this time is as shown in FIG. In this state, if you stop pressing "1" on the number key 20 and release your hand from the key, the address register 39
The timer information of the first timer memory 5, which is loaded into the memory content storage register 38 based on the address loaded into the display device, is loaded into the display register 40 by the display selection circuit 34. 41
will be displayed. For example, when timer information is set in the first timer memory 5 to turn on at 7:20 every morning, the display shown in FIG. 14 is displayed on the display device 41. Also, if you want to check the timer information of the timer memory at address 2, that is, the second timer memory 6, press the numeric key 2 in the information input section 28.
If "2" of 0 is operated, each circuit operates in the same way as described above, and while "2" of the numeric key 20 is pressed, the display device 41 displays the address 2 as shown in FIG. is performed, and when the pressing operation is stopped, the timer information in the second timer memory 6 is displayed. For example, when the second timer memory 6 stores timer information indicating that the timer is turned off at 12:16 p.m., the display shown in FIG. 15 will be displayed on the display device 41. When the numeric key 20 "3" to "9" is operated, the addresses and timer information of the third timer memory 7 to the ninth timer memory 13 will be displayed on the display device 41 in response. Further, when the clear key 26 is operated in the information input section 28 while the timer information is called in this calling operation, the contents of the timer memory are cleared by the input control circuit 33, and at that time the display on the display device 41 changes to the first one. As shown in Figure 18, it changes to "〓" to indicate that it has been cleared. When "0" is pressed on the number key 20, the input control circuit 33 controls the address setting circuit 36, and the address setting circuit 36 causes the address register 39 to take in the clock address. And this address register 3
The clock address taken into 9 is taken into the display register 40 by the display selection circuit 34 and displayed on the display device 41. The contents displayed on the display device 41 at this time are as shown in FIG. If you stop operating the "0" key in this state, the time information already stored in the memory content storage register 38 at the time of key operation is taken into the display register 40 by the display selection circuit 34 and displayed on the display device 41. will be done. In this call mode, even if the clear key 26 is operated while time information is being called, the input control circuit 33 does not accept it. In other words, the time information is not cleared at this time. In this way, the keys ``0'' to ``9'' of the numeric key 20 are stored in the time memory 2 and the first to ninth timer memories 5.
There is a one-to-one correspondence with the addresses of ~13.

The clear key 26 is also used as a key to clear the information when the information is entered incorrectly in the timer information setting mode SET and time setting mode TIME ADJ.
At this time, when the clear key 26 is operated, the setting register 35 is cleared by the input control circuit 33.

With such a configuration, the number keys 20 of the information input section 28 and the mode changeover switch 19 can be set to the time setting mode TIME ADJ. and the timer information setting mode.
When set to SET, it functions as a key for inputting time values of time information and timer information.
When the call mode is set to CALL, it functions as a key for calling time information and timer information. When functioning as a recall key, the "0" key of the numeric key 20 serves as a time information recall key, and the "1" to "9" keys function as timer keys of the first to ninth timer memories 5 to 13, respectively. This is a key for accessing information. Therefore, the timer information that becomes the time information to be retrieved can be performed with a single key operation, and the retrieval operation can be performed easily. In other words, it is possible to improve the operability of keys when accessing information. Moreover, since the existing numeric keys are used for calling, there is no need to provide a separate key, so there is no need to increase the space of the input section or increase the cost. Furthermore, when one of the numeric keys 20 is being operated during information recall, the memory address corresponding to that key is displayed on the display device 41 while that key is being operated. It is possible to easily check whether the memory to be recalled has been specified correctly.

Also, the mode changeover switch 19 is set to time display mode.
When it is CLOCK, the input control circuit 33
does not accept any input from the information input section 28, so even if a key is accidentally operated at this time, the time memory 2 and each of the timer memories 5-13 will not be cleared.

In the above embodiment, the time memory 2 was described as one that counts time based on the power supply frequency, but it is not limited to this. For example, an oscillator having a crystal oscillator is provided, and the oscillation frequency of the oscillator is set. The time may be counted as a reference. Further, in the above embodiment, the time display mode CLOCK and the call mode CALL are provided separately, but the invention is not limited to this.
CLOCK may be omitted and the time may be displayed only in call mode. Further, in the above embodiment, the time information is displayed by specifying the address of the time memory using the numeric key "0", but the invention is not limited to this. For example, the number key "0" may be used to One timer memory may be provided, and the timer information may be displayed by specifying the address of the timer memory using the "0" key. In this case, ten timer memories can be provided. Further, in the axis embodiment, time information is displayed on the display device when the mode changeover switch is switched to the call mode, but the present invention is not limited to this. For example, a timer memory corresponding to the "0" key may be displayed. The address of the timer memory corresponding to the "0" key may be displayed when switching to the calling mode.

As detailed above, according to the present invention, the numeric key of the information input section is provided with the function of importing numerical time information when the mode changeover switch is set to the time information setting mode or the timer information setting mode, In addition, when the mode changeover switch is set to time recall mode or timer information recall mode, it has a function of recalling information in the time memory or each timer memory in a one-to-one correspondence, so that information from multiple timer memories can be recalled. Accordingly, it is possible to provide an electronic timer device that can easily call up timer information and improve operability.

[Brief explanation of the drawing]

The figures show an embodiment of the present invention; FIG. 1 is a block diagram showing the circuit configuration, FIG. 2 is a plan view showing the input section, FIG. 3 is a diagram showing the configuration of the display device of the display device, and FIG. 4 is a diagram showing the display state of the clock address of the time memory, FIGS. 5 to 13 are diagrams showing the display state of the addresses of the 1st to 9th timer memories, respectively, and FIGS. 16 is a diagram showing the display state of time information. Figures a to e in Figure 17 are diagrams showing changes in the display state when timer information is input. Figure 18 is a diagram showing the display state of timer information. It is a figure which shows the display state when cleared. 2... Time memory, 5-13... Timer memory, 14... Comparison match detection circuit, 17... Output circuit, 18... Input section, 19... Mode changeover switch, 28... Information input section, 33... ...Input control circuit, 34...Display selection circuit, 36...Address setting circuit, 37...Setting address selection circuit, 39...
...address register, 41...display device.

Claims (1)

[Claims] 1. A time memory for counting time by counting a reference frequency, and a plurality of timer memories for storing timer information including time and operation mode information;
Controlled object control means that compares the time information in the time memory with the timer information in each of the timer memories and operates the controlled object as a timer; and a mode for setting time information for starting counting in at least the time memory. , a mode changeover switch for switching between a mode for setting timer information in each of the above-mentioned timer memories and a mode for recalling information set in each of the above-mentioned memories, an information input section having a numeric key and a timer operation setting key; When the mode changeover switch is set to time information setting mode or timer information setting mode, the numeric key of the information input section has a function of reading numerical time information, and the mode changeover switch is set to information recall mode. In the set state, there is a function selection means for a numeric key which has a function of recalling the contents of each of the memories in a one-to-one correspondence with the numeric keys of the information input section, and at least time information of the time memory and each of the timers. An electronic timer comprising: a display device that displays timer information stored in memory based on a switching operation of the mode changeover switch and a key operation of the information input section. 2. In addition to setting an address in the time memory, at least a 0 key is provided as a numeric key, and the numeric key function selection means sets the 0 key to the address of the time memory when the numeric key has a function of calling up the contents of the time memory. An electronic timer according to claim 1, characterized in that the electronic timer is adapted to correspond to the following. 3 Nine timer memories are provided, addresses from 1 to 9 are set, and the number keys have at least 1 to 9 keys, and the function selection means for the number keys selects the number keys for each timer memory. The numeric keys 1 to 9, which have a content recall function, are placed one to one at addresses 1 to 9 of each timer memory.
An electronic timer according to claim 1, characterized in that: 4. When the mode changeover switch is set to the information recall mode and the contents of the memory are recalled using the numeric key, the display device will respond to the numeric key that is being operated while the numeric key is being operated. 2. The electronic timer according to claim 1, wherein the electronic timer is adapted to display an address of a memory to be set.