JPS628750B2 - - Google Patents
Info
- Publication number
- JPS628750B2 JPS628750B2 JP54116468A JP11646879A JPS628750B2 JP S628750 B2 JPS628750 B2 JP S628750B2 JP 54116468 A JP54116468 A JP 54116468A JP 11646879 A JP11646879 A JP 11646879A JP S628750 B2 JPS628750 B2 JP S628750B2
- Authority
- JP
- Japan
- Prior art keywords
- capacitor
- semiconductor integrated
- integrated circuit
- circuit device
- terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000003990 capacitor Substances 0.000 claims description 36
- 239000004065 semiconductor Substances 0.000 claims description 17
- 238000000034 method Methods 0.000 claims description 9
- 238000005259 measurement Methods 0.000 claims description 7
- 238000012360 testing method Methods 0.000 claims description 6
- 230000002159 abnormal effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 5
- 230000003321 amplification Effects 0.000 description 2
- 238000003199 nucleic acid amplification method Methods 0.000 description 2
- 230000010355 oscillation Effects 0.000 description 2
- 230000002123 temporal effect Effects 0.000 description 2
- 206010000117 Abnormal behaviour Diseases 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000000691 measurement method Methods 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
Landscapes
- Testing Of Individual Semiconductor Devices (AREA)
- Tests Of Electronic Circuits (AREA)
Description
【発明の詳細な説明】
本発明は、コンデンサを外付け素子として用い
る半導体集積回路装置の電気的特性の測定法に関
し、特に時間短縮効果のある測定法を提供しよう
とするものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for measuring the electrical characteristics of a semiconductor integrated circuit device using a capacitor as an external element, and particularly aims to provide a measuring method that is effective in reducing time.
従来、半導体集積回路装置の外付け素子として
大容量のコンデンサが接続された場合、あるい
は、コンデンサの接続された端子の内部インピー
ダンスが大きい場合、コンデンサが充電されて、
定常状態になるまでに長い時間を取られ、そのの
ち測定を開始していたため、半導体集積回路装置
の特性検査を行う場合、この時間の損失は極めて
大きい。 Conventionally, when a large-capacity capacitor is connected as an external element to a semiconductor integrated circuit device, or when the internal impedance of the terminal to which the capacitor is connected is large, the capacitor is charged.
Since it takes a long time to reach a steady state and then measurement is started, this time loss is extremely large when testing the characteristics of a semiconductor integrated circuit device.
第1図は、従来の方法による半導体集積回路装
置の電気的特性を測定する場合の1例を示す回路
接続図で、この回路において電源電圧Vcc投入後
の被測定半導体集積回路装置DUTの端子2とコ
ンデンサCfの接続点Aの電位Vは、第2図に示
す様に変化する。Toは電源投入時刻を表わす。
この場合、コンデンサCfの容量が非常に大き
く、かつ半導体集積回路装置DUTの端子−2か
ら見た内部インピーダンスが大きい場合、A点の
電位が第2図で示すV1に到達するまでの時間T1
は非常に長くなり、その時間は、コンデンサCf
及び端子2の内部インピーダンスに比例する。特
性の測定は、電源電圧を投入して時間(T1―
T0)後に、すなわち、回路が定常状態に達した
後、開始するため、測定に要する時間が長くなる
が、特に低周波増幅用半導体集積回路において
は、Cfを例えば100μFのように大きくとるので
RfCfに比例する時間(T1―T0)は数秒の大きさ
になり、この時間は大量に試験する場合に累積さ
れて極めて大きな時間損失となる。 FIG. 1 is a circuit connection diagram showing an example of measuring the electrical characteristics of a semiconductor integrated circuit device using a conventional method. The potential V at the connection point A between the capacitor C f and the capacitor C f changes as shown in FIG. To represents the power-on time.
In this case, if the capacitance of capacitor C f is very large and the internal impedance seen from terminal -2 of semiconductor integrated circuit device DUT is large, the time required for the potential at point A to reach V 1 shown in Figure 2 is T 1
becomes very long, and that time is the capacitor C f
and is proportional to the internal impedance of terminal 2. Characteristics are measured by turning on the power supply voltage and measuring the time (T 1 -
T 0 ), that is, after the circuit reaches a steady state, the time required for measurement is longer, but especially in semiconductor integrated circuits for low frequency amplification, C f is set to a large value, for example, 100 μF. Therefore, the time (T 1 -T 0 ) proportional to R f C f is several seconds long, and this time is accumulated when a large number of tests are performed, resulting in an extremely large time loss.
本発明はこのような欠点を除去し、外付けコン
デンサを速やかに充電せしめて測定開始までの時
間損失を軽減できる外付けコンデンサを有する半
導体集積回路装置の電気的特性測定法を提供する
ことを目的とする。 It is an object of the present invention to provide a method for measuring the electrical characteristics of a semiconductor integrated circuit device having an external capacitor that eliminates such drawbacks and can quickly charge the external capacitor and reduce time loss until the start of measurement. shall be.
本発明によれば、コンデンサを外付けして用い
る半導体集積回路装置の電気的特性測定法におい
て、被測定用半導体集積回路装置のコンデンサを
外付けする端子を、まず電源投入時には発振等の
異常動作を防止するに足る小容量の第1のコンデ
ンサに接続し、かつ該第1のコンデンサの充電電
位を電圧利得1倍の電流増幅器を介して正規容量
の第2のコンデンサに伝達。次いで前記第2のコ
ンデンサの充電電位が所定値に達してから前記第
2のコンデンサに切換えて測定を開始することを
特徴とするコンデンサを外付けして用いる半導体
集積回路装置の電気的特性測定法が得られる。 According to the present invention, in a method for measuring the electrical characteristics of a semiconductor integrated circuit device using an externally attached capacitor, the terminal to which the capacitor of the semiconductor integrated circuit device under test is externally attached is first detected to cause abnormal behavior such as oscillation when the power is turned on. The first capacitor is connected to a first capacitor having a small capacity sufficient to prevent the above, and the charging potential of the first capacitor is transmitted to a second capacitor having a regular capacity via a current amplifier with a voltage gain of 1. A method for measuring electrical characteristics of a semiconductor integrated circuit device using an external capacitor, characterized in that the charging potential of the second capacitor reaches a predetermined value, and then switching to the second capacitor and starting measurement. is obtained.
次に実施例に従い、図面を用いて本発明を説明
する。 Next, the present invention will be explained according to examples and with reference to the drawings.
第3図は本発明の一実施例を説明するための回
路接続図で、最初DUTの端子2(コンデンサを
外付けする端子)はスイツチSを介してコンデン
サC1に接続されている。コンデンサC1の容量は
DUTの発振を防止し安定に動作させるために必
要とされる最小限の値、例えば数十ピコフアラツ
ドに選ぶ。C1はこのように小さな容量をもつの
で電源投入後の充電によりA点の電位は速やかに
立上つて定常値V1に達する。A点の電位は電圧
ホロワ6を介して他端を接地された大容量のコン
デンサCfの一端に伝達され、コンデンサCfを速
やかに充電する。Cfの電位はC1の電位に追随し
て急速に立上がり、その速さは電圧ホロワ6の電
流増幅率に比例する。第4図a及びbはそれぞれ
コンデンサC1およびCfの充電電位の変化を示す
曲線で、T1′,T1″はそれぞれ定常電位V1に達す
る時刻である。DUTの端子電圧すなわちV1が
個々のDUTによつて大きく異なるとしても、C1
の電位を検出してCfを充電する方法であるた
め、DUTの個々によつて定まる電位にすること
ができる。 FIG. 3 is a circuit connection diagram for explaining one embodiment of the present invention. Initially, terminal 2 of the DUT (terminal to which a capacitor is externally connected) is connected to a capacitor C1 via a switch S. The capacitance of capacitor C1 is
Select the minimum value required to prevent DUT oscillation and ensure stable operation, for example, several tens of picofurads. Since C 1 has such a small capacity, the potential at point A quickly rises and reaches the steady-state value V 1 by charging after power is turned on. The potential at point A is transmitted via the voltage follower 6 to one end of a large-capacity capacitor C f whose other end is grounded, and quickly charges the capacitor C f . The potential of C f rises rapidly following the potential of C 1 , and its speed is proportional to the current amplification factor of the voltage follower 6 . FIGS. 4a and 4b are curves showing changes in the charging potential of capacitors C 1 and C f, respectively, and T 1 ′ and T 1 ″ are the times at which the steady potential V 1 is reached, respectively. The terminal voltage of the DUT, that is, V 1 C 1
Since this method detects the potential of C f and charges C f , the potential can be determined depending on each DUT.
この回路による電気的特性の測定はC1とCfの
電位がともに定常電位となつた後、すみやかにス
イツチSにより、A点をコンデンサCf側に切換
えれば、直ちに開始することができる。それには
例えば、電源投入に伴なつて発生する電圧
Vcc′を遅延回路7を通してトランジスタ8のベ
ースに加えてこれを導通させてリレーのコイル9
に電流を流し、スイツチSを切換えるようにすれ
ばよい。端子10はリレー電源(図示していな
い)に接続されているものとする。遅延回路の遅
延時間は(T1″―T0)より小さくなければよい。
あるいはスイツチSは半導体スイツチを用いて、
Cfの電位が所定値に達したことを検出して切換
えるようにしてもよいことはいうまでもない。 Measurement of electrical characteristics using this circuit can be started immediately by switching point A to the capacitor C f side using switch S immediately after the potentials of C 1 and C f both reach steady potentials. For example, the voltage generated when the power is turned on.
Vcc' is applied to the base of the transistor 8 through the delay circuit 7, and this is made conductive to make the relay coil 9
What is necessary is to apply a current to the switch S and switch the switch S. It is assumed that the terminal 10 is connected to a relay power source (not shown). The delay time of the delay circuit need not be smaller than (T 1 ″−T 0 ).
Alternatively, the switch S uses a semiconductor switch,
It goes without saying that the switching may be performed by detecting that the potential of C f has reached a predetermined value.
以上詳細に説明したように本発明によれば、電
源投入後、測定開始までの待時間(従来は(T1
―T0)、本発明では(T1″―T0))を極めて短かく
できる((T1―T0)≫(T1″―T0))ので、半導体
集積回路装置の測定時間の無駄を省いて時間短縮
できる効果がある。 As explained in detail above, according to the present invention, the waiting time (conventionally (T 1
- T 0 ), the present invention can make (T 1 ″-T 0 )) extremely short ((T 1 - T 0 )≫(T 1 ″-T 0 )), which reduces the measurement time of semiconductor integrated circuit devices. This has the effect of eliminating waste and saving time.
第1図は、従来のコンデンサを外付け素子とし
て用いる半導体集積回路装置の電気的特性の測定
法を説明するための回路接続図、第2図は第1図
のA点の電位の時間的変化を示す曲線図、第3図
は本発明の測定法を説明するための回路接続図、
第4図aおよびbはそれぞれ第3図のコンデン
サ、C1およびCfの充電電位の時間的変化を示す
曲線図である。
IN…信号入力端、Esig…試験信号、DUT…被
測定半導体集積回路装置、C0,C1,Cf…コンデ
ンサ、S…スイツチ、Vcc…電源電圧、OUT…
DUTの出力端、1,2,3,4,5…DUTの端
子を指示する記号、6…電圧ホロワ、7…遅延回
路、8…トランジスタ、9…コイル、10…リレ
ー電源用端子。
Figure 1 is a circuit connection diagram for explaining a method for measuring the electrical characteristics of a semiconductor integrated circuit device that uses a conventional capacitor as an external element, and Figure 2 is a temporal change in the potential at point A in Figure 1. 3 is a circuit connection diagram for explaining the measurement method of the present invention,
FIGS. 4a and 4b are curve diagrams showing temporal changes in the charging potential of the capacitors C 1 and C f of FIG. 3, respectively. IN...Signal input terminal, Esig...Test signal, DUT...Semiconductor integrated circuit device under test, C0 , C1 , Cf ...Capacitor, S...Switch, Vcc...Power supply voltage, OUT...
DUT output terminal, 1, 2, 3, 4, 5...Symbols indicating DUT terminals, 6...Voltage follower, 7...Delay circuit, 8...Transistor, 9...Coil, 10...Relay power supply terminal.
Claims (1)
路装置の電気的特性測定法において、被測定用半
導体集積回路装置のコンデンサを外付けする端子
を、まず電源投入時には異常動作を防止し装置を
安定に動作させるに足る小容量の第1のコンデン
サに接続し、かつ該第1のコンデンサの充電電位
を電圧利得1倍の電流増幅器を介して正規容量の
第2のコンデンサに伝達し、次いで前記第2のコ
ンデンサの充電電位が所定値に達してから前記第
2のコンデンサに切換えて測定を開始することを
特徴とするコンデンサを外付けして用いる半導体
集積回路装置の電気的特性測定法。1 In a method for measuring the electrical characteristics of a semiconductor integrated circuit device that uses an external capacitor, the terminal to which the capacitor of the semiconductor integrated circuit device under test is externally connected must first be connected to the terminal to prevent abnormal operation and ensure stable operation of the device when the power is turned on. the charging potential of the first capacitor is transmitted to a second capacitor of normal capacity via a current amplifier with a voltage gain of 1; 1. A method for measuring electrical characteristics of a semiconductor integrated circuit device using an external capacitor, characterized in that measurement is started by switching to the second capacitor after the charging potential of the capacitor reaches a predetermined value.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11646879A JPS5640772A (en) | 1979-09-11 | 1979-09-11 | Electric characteristic measurement method for semiconductor integrated circuit device using capacitor mounted externally |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11646879A JPS5640772A (en) | 1979-09-11 | 1979-09-11 | Electric characteristic measurement method for semiconductor integrated circuit device using capacitor mounted externally |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5640772A JPS5640772A (en) | 1981-04-17 |
| JPS628750B2 true JPS628750B2 (en) | 1987-02-24 |
Family
ID=14687843
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11646879A Granted JPS5640772A (en) | 1979-09-11 | 1979-09-11 | Electric characteristic measurement method for semiconductor integrated circuit device using capacitor mounted externally |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5640772A (en) |
-
1979
- 1979-09-11 JP JP11646879A patent/JPS5640772A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5640772A (en) | 1981-04-17 |
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