JPS6316903B2 - - Google Patents
Info
- Publication number
- JPS6316903B2 JPS6316903B2 JP57116532A JP11653282A JPS6316903B2 JP S6316903 B2 JPS6316903 B2 JP S6316903B2 JP 57116532 A JP57116532 A JP 57116532A JP 11653282 A JP11653282 A JP 11653282A JP S6316903 B2 JPS6316903 B2 JP S6316903B2
- Authority
- JP
- Japan
- Prior art keywords
- oxide film
- silicon oxide
- silicon
- thermally
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/01—Manufacture or treatment
- H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
- H10W10/012—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/10—Isolation regions comprising dielectric materials
- H10W10/13—Isolation regions comprising dielectric materials formed using local oxidation of silicon [LOCOS], e.g. sealed interface localised oxidation [SILO] or side-wall mask isolation [SWAMI]
Landscapes
- Element Separation (AREA)
Description
【発明の詳細な説明】
本発明は集積回路装置の製造方法に関し、特に
集積回路の素子間分離方法に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing an integrated circuit device, and more particularly to a method for isolating elements of an integrated circuit.
集積回路装置に於いては近年高密度化の要請が
強くなり内部に組み込まれる素子の面積が微細に
なつている。 In recent years, there has been a strong demand for higher density in integrated circuit devices, and the areas of elements incorporated therein have become smaller.
この様に素子の面積が微少になると共に素子間
を分離する領域の集積回路装置に占める面積が集
積度の向上に大きな障害となる事が明確となつて
きた。 As the area of elements becomes smaller in this way, it has become clear that the area occupied by the area separating the elements in the integrated circuit device becomes a major obstacle to improving the degree of integration.
従来、集積回路装置に於ける素子間分離は選択
的に成長されたシリコン酸化膜によつて行われて
いた。このシリコン酸化膜を選択的に成長させる
為には通常シリコン基板を熱酸化して選択的に埋
設する酸化膜を形成する方法が採用されている。
この方法に於いては、シリコン基板上に500〜
1000Å程度の薄い熱酸化シリコン酸化膜と1000〜
2000Åの気相成長シリコン窒化膜を選択的に形成
し、これらの二層膜を熱酸化時の酸化マスクとし
て用い、シリコン基板上に約1.0μmの厚い熱酸化
膜を形成していた。この二層膜に於ける薄いシリ
コン酸化膜の役割は、熱酸化時に於けるシリコン
基板と気相成長シリコン窒化膜の間のストレスを
緩和する事であり、この薄いシリコン酸化膜があ
る事によりシリコン基板表面にストレスによる欠
陥が入る事が防がれている。他方この薄いシリコ
ン酸化膜中は、酸素や水酸基等の酸化因子が拡散
しやすいために、1.0μm程度の厚い酸化膜を形成
する時に窒化膜の端の部分に於いて、薄いシリコ
ン酸化膜も厚くなり厚い酸化膜が酸マスクである
気相成長窒化膜の下側にまで入り込んでしまうと
いう現象があつた。この為素子分離領域が拡がつ
てしまい能動素子領域が減少し集積度の向上に対
して大きな障害となつていた。 Conventionally, isolation between elements in integrated circuit devices has been achieved using selectively grown silicon oxide films. In order to selectively grow this silicon oxide film, a method is usually adopted in which a silicon substrate is thermally oxidized to form a selectively buried oxide film.
In this method, 500 ~
Thin thermally oxidized silicon oxide film of about 1000 Å and 1000 Å
A 2000 Å thick vapor-phase silicon nitride film was selectively formed, and these two-layer films were used as an oxidation mask during thermal oxidation to form a thermal oxide film approximately 1.0 μm thick on the silicon substrate. The role of the thin silicon oxide film in this two-layer film is to relieve the stress between the silicon substrate and the vapor-phase grown silicon nitride film during thermal oxidation. Defects caused by stress are prevented from forming on the substrate surface. On the other hand, in this thin silicon oxide film, oxidizing factors such as oxygen and hydroxyl groups easily diffuse, so when forming a thick oxide film of about 1.0 μm, the thin silicon oxide film also thickens at the edge of the nitride film. There was a phenomenon in which the thick oxide film penetrated beneath the vapor-phase grown nitride film that served as the acid mask. For this reason, the element isolation region has expanded and the active element area has decreased, posing a major obstacle to improving the degree of integration.
この様な、従来の素子間分離法に於ける欠点を
除去する為に上記分離領域を予め溝状にエツチン
グしてから厚い酸化膜を形成する等、種々の方法
が提案されているが、それらの新しい分離方式は
非常に複雑な工程をへる事が多く実用上に難点を
生じていた。 In order to eliminate these drawbacks of conventional element isolation methods, various methods have been proposed, such as etching the isolation region in advance into a groove shape and then forming a thick oxide film. The new separation method often involves extremely complicated processes, which poses practical difficulties.
従つて本発明の目的は上記の欠点を除いた素子
間分離法を提供する事である。 SUMMARY OF THE INVENTION It is therefore an object of the present invention to provide a device isolation method that eliminates the above-mentioned drawbacks.
本発明は数百Åの厚さのシリコン酸化を予め熱
窒化をして酸化のマスクとなる気相成長窒化膜の
下に用いれば、厚い酸化膜形成的に基板シリコン
に歪を生じさせる事なく又、厚い酸化物の横方向
の拡がりもなく、素子間分離の為の厚い酸化膜を
形成できるという知見に基く。 In the present invention, if silicon oxide with a thickness of several hundred Å is thermally nitrided in advance and used under a vapor-phase grown nitride film that serves as an oxidation mask, it is possible to form a thick oxide film without causing strain on the silicon substrate. This method is also based on the knowledge that a thick oxide film for isolation between elements can be formed without the lateral spread of the thick oxide.
本発明の素子間分離方法は、シリコン基板を熱
酸化する工程と、該シリコン酸化膜をたとえばア
ンモニアを含むガス中に於いて熱窒化する工程
と、該シリコン酸化膜上に選択的に気相成長シリ
コン窒化膜を形成する工程と、該シリコン窒化膜
をマスクとしてシリコン基板を選択的に酸化する
工程を有するものである。 The device isolation method of the present invention includes a step of thermally oxidizing a silicon substrate, a step of thermally nitriding the silicon oxide film in a gas containing, for example, ammonia, and selective vapor phase growth on the silicon oxide film. The method includes a step of forming a silicon nitride film, and a step of selectively oxidizing a silicon substrate using the silicon nitride film as a mask.
次に本発明をよりよく理解する為に図面を用い
て説明しよう。第1図は従来の素子間分離法を説
明する為の断面図である。この従来の方法に於い
ては、先づ第1図aに示す如く、シリコン基板1
01上に熱酸化により数百Åの厚さのシリコン酸
化膜102を形成し、次に第1図bに示す様に気
相成長によりシリコン窒化膜103を成長させ、
第1図cに示す如く素子間分離領域から該シリコ
ン酸化膜102シリコン窒化膜103をエツチン
グ除去し選択的に後の酸化的のマスクとなる。シ
リコン酸化膜102,シリコン酸化膜103を残
し、最後に第1図dに示す如く該シリコン窒化膜
103,シリコン酸化膜102をマスクとしてシ
リコン基板101を1000℃前後の温度で通常はス
チーム雰囲気中に於いて酸化し約1.0μの厚さの素
子間分離酸化膜104を形成する。 Next, in order to better understand the present invention, the present invention will be explained using the drawings. FIG. 1 is a cross-sectional view for explaining a conventional element isolation method. In this conventional method, first, as shown in FIG.
A silicon oxide film 102 with a thickness of several hundred angstroms is formed on 01 by thermal oxidation, and then a silicon nitride film 103 is grown by vapor phase growth as shown in FIG. 1b.
As shown in FIG. 1c, the silicon oxide film 102 and the silicon nitride film 103 are etched away from the element isolation region to selectively serve as a mask for later oxidation. The silicon oxide film 102 and the silicon oxide film 103 are left behind, and finally, as shown in FIG. Then, it is oxidized to form an inter-element isolation oxide film 104 having a thickness of about 1.0 μm.
この従来の素子間分離法に於いては厚い酸化膜
104はマスクとなる。シリコン窒化膜103の
端から横方向に拡がり長さLBだけシリコン窒化
膜103の下に入り込む。このLBの値は厚いシ
リコン酸化膜104の厚さの7割から10割位の値
に及ぶ。この為に素子間分離領域の面積が拡がつ
てしまい、従つて後からトランジスタ等の能動素
子を形成する領域が狭くなり集積度の向上が阻害
されるという大きな欠点があつた。 In this conventional device isolation method, the thick oxide film 104 serves as a mask. It spreads laterally from the end of the silicon nitride film 103 and enters under the silicon nitride film 103 by a length L B . The value of L B ranges from 70% to 100% of the thickness of the thick silicon oxide film 104. For this reason, the area of the element isolation region increases, and therefore the area where active elements such as transistors are later formed becomes narrower, resulting in a major drawback in that an improvement in the degree of integration is hindered.
第2図は本発明の素子間分離法を説明する為の
断面図である。本発明の素子間分離法は先づ第2
図aに示す如く、シリコン基板201上に熱酸化
により数百Åの厚さのシリコン酸化膜202を形
成し次に第2図bに示す様にアンモニアガスを含
む雰囲気中で熱処理する事でシリコン酸化膜20
2を熱窒化されたシリコン酸化膜203に変え
る。次にシリコン窒化膜を気相成長させて選択的
にエツチングする事により、第2図cに示される
如く選択的に残された熱窒化シリコン酸化膜20
3とシリコン窒化膜204を形成し最後第2図d
に示される如くに該熱窒化シリコン酸化膜203
とシリコン窒化膜204を酸化マスクとして厚い
素子間分離用絶縁膜205を形成する。 FIG. 2 is a sectional view for explaining the device isolation method of the present invention. The inter-element isolation method of the present invention begins with the second
As shown in Figure a, a silicon oxide film 202 with a thickness of several hundred angstroms is formed on a silicon substrate 201 by thermal oxidation, and then as shown in Figure 2 b, a silicon oxide film 202 is formed by heat treatment in an atmosphere containing ammonia gas. Oxide film 20
2 is replaced with a thermally nitrided silicon oxide film 203. Next, by growing the silicon nitride film in a vapor phase and selectively etching it, the thermal nitride silicon oxide film 20 is selectively left as shown in FIG. 2c.
3 and a silicon nitride film 204 is formed, and finally, as shown in FIG.
As shown in the figure, the thermal nitride silicon oxide film 203
Then, a thick insulating film 205 for isolation between elements is formed using the silicon nitride film 204 as an oxidation mask.
この本発明の素子間分離法に於いては、シリコ
ン窒化膜204の下の薄いシリコン酸化膜は熱窒
化されたシリコン酸化膜203である。この熱窒
化されたシリコン酸化膜204は酸化に対してバ
リヤー性をもつているために、厚い酸化膜205
を形成する際に該酸化膜205の横方向への拡が
りが非常に少い。そのためにシリコン窒化膜20
4の下の、後で(能動)素子が形成される領域の
面積が狭くなる事が防がれ集積度が大きく向上す
るという利点を有する。更に又、熱窒化されたシ
リコン酸化膜203は通常のシリコン酸化膜と同
様シリコン窒化膜204とシリコン基板201の
間に入る応力を緩和する働きをもち、シリコン基
板201には歪が入らないため後で形成される素
子の特性を劣化させる事もない。 In the device isolation method of the present invention, the thin silicon oxide film under the silicon nitride film 204 is a thermally nitrided silicon oxide film 203. Since this thermally nitrided silicon oxide film 204 has barrier properties against oxidation, the thick oxide film 204
When forming the oxide film 205, the lateral spread of the oxide film 205 is very small. For this purpose, silicon nitride film 20
This has the advantage that the area of the region below 4, where (active) elements will be formed later, is prevented from becoming narrower, and the degree of integration is greatly improved. Furthermore, the thermally nitrided silicon oxide film 203 has the function of relieving stress between the silicon nitride film 204 and the silicon substrate 201, similar to a normal silicon oxide film, and since no strain is introduced into the silicon substrate 201, later There is no deterioration in the characteristics of the element formed by the method.
第1図は従来技術の半導体装置の製造方法を示
す断面図であり、第2図は本発明の一実施例を示
す断面図である。
尚、図において、101,201……シリコン
基板、102,202……シリコン酸化膜、10
3,204……気相成長によるシリコン窒化膜、
104,205……素子間分離の厚い酸化膜、2
03……熱窒化されたシリコン酸化膜である。
FIG. 1 is a sectional view showing a conventional method for manufacturing a semiconductor device, and FIG. 2 is a sectional view showing an embodiment of the present invention. In the figure, 101, 201... silicon substrate, 102, 202... silicon oxide film, 10
3,204...Silicon nitride film by vapor phase growth,
104, 205... Thick oxide film for isolation between elements, 2
03...A silicon oxide film that has been thermally nitrided.
Claims (1)
形成する工程と、該シリコン酸化膜を熱窒化する
工程と、該熱窒化されたシリコン酸化膜上にシリ
コン窒化膜を気相成長する工程と、該シリコン窒
化膜と熱窒化されたシリコン酸化膜とを選択的に
エツチング除去する工程と、残されたシリコン窒
化膜及び熱窒化されたシリコン酸化膜をマスクと
してシリコン基板を熱酸化する工程を含む事を特
徴とする半導体装置の製造方法。1. A step of thermally oxidizing a silicon substrate to form a silicon oxide film, a step of thermally nitriding the silicon oxide film, a step of vapor phase growing a silicon nitride film on the thermally nitrided silicon oxide film, and a step of thermally nitriding the silicon oxide film. The method includes a step of selectively etching away the silicon nitride film and the thermally nitrided silicon oxide film, and a step of thermally oxidizing the silicon substrate using the remaining silicon nitride film and the thermally nitrided silicon oxide film as masks. A method for manufacturing a featured semiconductor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57116532A JPS596557A (en) | 1982-07-05 | 1982-07-05 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP57116532A JPS596557A (en) | 1982-07-05 | 1982-07-05 | Manufacture of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS596557A JPS596557A (en) | 1984-01-13 |
| JPS6316903B2 true JPS6316903B2 (en) | 1988-04-11 |
Family
ID=14689451
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP57116532A Granted JPS596557A (en) | 1982-07-05 | 1982-07-05 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS596557A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6321848A (en) * | 1986-07-16 | 1988-01-29 | Sanyo Electric Co Ltd | Forming method for element separating region |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS50123275U (en) * | 1974-03-22 | 1975-10-08 | ||
| JPS5154378A (en) * | 1974-11-07 | 1976-05-13 | Fujitsu Ltd | Handotaisochino seizohoho |
| JPS56125859A (en) * | 1980-03-06 | 1981-10-02 | Fujitsu Ltd | Manufacture of semiconductor device |
-
1982
- 1982-07-05 JP JP57116532A patent/JPS596557A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS596557A (en) | 1984-01-13 |
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