JPS632363B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a current mirror circuit that operates stably under extremely low power supply voltage.

FIG. 1 is a wiring diagram of a conventionally well-known current mirror circuit, in which a reference current is supplied from the collector side of transistor 1 via input terminal It is configured to take out an output current proportional to the reference current via Y ₁ , Y ₂ , and Y ₃ .

By the way, in FIG. 1, the transistor 5 is used for the purpose of improving the matching of input current and output current as much as possible.

For example, if the transistor 5 is not used, the most common current mirror circuit can be constructed by connecting the base and collector of the transistor 1, but in that case, most of the reference input current is generated by the transistor. For example, if the DC current amplification factor of each transistor is 10, even if you apply a reference current of 100 μA and try to extract 100 μA of output current from each output terminal, you will actually only extract 70 μA. The transistor 5 is indispensable in current mirror circuits that require precision because the ratio of input current to output current depends on the direct current amplification factor of each transistor.

However, by using the transistor 5, there is a problem in that the lower limit value of the power supply voltage applied to the positive power supply terminal A increases.

For example, if the base and collector of transistor 1 are connected, it will operate satisfactorily even if the power supply voltage drops below 1V, but if transistor 5 is used, and the power supply voltage drops below 1.4V, transistor 1 and transistor 5 There was a problem that the base current stopped flowing and the device stopped working.

In addition to the circuit shown in Figure 1, there is a famous Wilson type current mirror circuit as a current mirror circuit that improves the matching of input current and output current, but this circuit also uses 2 of the base-emitter voltage of the transistor as the power supply voltage. I needed more than double the amount and had the same problem.

The current mirror circuit of the present invention is designed to solve the above problems.

FIG. 2 is a circuit connection diagram of a current mirror circuit in one embodiment of the present invention. In Figure 2,
The base and collector of transistor 1 are connected,
Its collector is connected to the reference current input terminal It is connected to the positive power supply line a via a resistor 7, and its collector is connected to the collector of an NPN transistor 81 complementary to the transistors 1 and 2.

Further, the collector of the transistor 81 is connected to the same base as well as the base of an NPN transistor 82 of the same type as the transistor 81, and the emitters of the transistors 81 and 82 are connected to the negative power supply line b.

Further, the emitter of the transistor 2 is connected to the emitter of the transistor 9, the base of the transistor 9 is connected to the collector of the transistor 82, and the collector is connected to the first current output terminal.
_Y1 , the base of the transistor 9 is connected to the bases of a transistor 10 and a transistor 11, and the emitters of the transistors 10 and 11 are connected to the positive power supply line a via resistors 12 and 13, respectively, The collectors of the transistors 10 and 11 are connected to second and third current output terminals Y ₂ and Y ₃ , respectively.

Now, in the circuit shown in Figure 2, resistors 6, 7, 1
The resistance values of 2 and 13 are R ₆ , R ₇ , R ₁₂ , R ₁₃ respectively
and transistors 1, 2, 81, 82, 9,
The DC current amplification factors of 10 and 11 are β ₁ , β ₂ , respectively.
At β ₈₁ , β ₈₂ , β ₉ , β ₁₀ , and β ₁₁ , the base-emitter voltages are V _BE1 , V _BE2 , V _BE81 , V _BE82 , respectively.
At V _BE9 , V _BE10 and V _BE11 , the collector current is
Assuming that I ₁ , I ₂ , I ₈₁ , I ₈₂ , I ₉ , I ₁₀ , and I ₁₁ , the reference current I _x drawn from the reference current input terminal
and the first, second, and third current output terminals Y ₁ , Y ₂ ,
Output currents I _y1 , I _y2 , I _y3 flowing out from Y ₃ (assuming that a load is connected to each output terminal).
The relationship can be found as follows.

I _x = I ₁ (1+1/β ₁ )+I ₂ /β ₂ ………(1) R ₆ I ₁ (1+1/β ₁ )+V _BE1 = R ₇ {I ₂ (1+1/β ₂ )+I ₉ (1+1) /β ₉ )}+V _B
E2 ………(2) I ₂ = I ₈₁ (1+1/β ₈₁ ) + I ₈₂ / β ₈₂ ………(3) I ₈₁ = I ₈₂ ………(4) I ₈₂ = I ₉ / β ₉ + I ₁₀ /β ₁₀ +I ₁₁ /β ₁₁ ………(5) R ₇ {I ₂ (1+1/β ₂ )+I ₉ (1+1/β ₉ )}+V _BE9 =R ₁₂ I ₁₀ (1+1/β ₁₀ )+V _BE10 … …(6) R ₁₂ I ₁₀ (1+1/β ₁₀ )+V _BE10 = R ₁₃ I ₁₁ (1+1/β ₁₁ )+V _BE11 ………(7) I ₉ =I _y1 ………(8) I ₁₀ = I _y2 ………(9) I ₁₁ = I _y3 ………(10) From formulas (3) and (4), I ₂ = I ₈₂ (1+1/β ₈₁ +1/β ₈₂ ) ………(11) Here Now, if we set 1+1/β ₈₁ +1/β ₈₂ = 1/γ (12), then from equations (11) and (12), I ₂ = I ₈₂ /γ (13) (5) , from formula (13), I ₂ = 1/γ (I ₉ /β ₉ +I ₁₀ /β ₁₀ +I ₁₁ /β ₁₁ )......(
14) From formulas (1), (2), (6), (7), (8), (9), (10), and (14), I _y
1 ,
When I find I _y2 and I _y3 , becomes. Here, β ₂ , β ₈₁ , β ₈₂ , β ₉ , β ₁₀ , and β ₁₁ are all larger than 10, and transistors 9 and 1
Assuming that the respective emitter areas are set so that the emitter current densities of 0 and 11 are approximately equal, from equation (12), γ≒1 ......(18), and, becomes.

In FIG. 2, by making the emitter current density of transistor 2 the same as that of transistor 1, V _BE1 and V _BE2 in equations (19) to (21) can be made equal.

Now, to simplify the explanation, let us assume that V _BE1 = V _BE2 holds, then set R ₆ = R ₇ = R ₁₂ = R ₁₃ , and β ₉ , β ₁₀ , and β ₁₁ are all 10, if I _x is 100 μA, the output current I _y1 ,
I _y2 and I _y3 are approximately 70 μA, 90 μA, and 90 μA, respectively.
Compared to the case where the base and collector of transistor 1 in Fig. 1 are short-circuited (as mentioned earlier, in that case, the output current will be 70 μA for an input current of 100 μA). is getting better.

This is because the base current required for transistors 9, 10, 11 is not supplied directly from the reference input current, but via transistors 81, 82.

Now, in the circuit of Fig. 2, for example, the resistor 7
Even if there is a voltage drop of 100mV across the
The base-emitter voltage of transistor 9 is
Since the saturation voltage of the transistor 82 is about 0.65V and 0.2V or less, it can operate satisfactorily even if the power supply voltage becomes lower than 1V.

In addition, although three current output terminals are provided in FIG. 3, these can be added as necessary, and transistors 10, 11,
It is also possible to omit the resistors 12 and 13 and provide one current output terminal.

FIG. 3 shows another embodiment of the present invention,
In Figure 3, the emitter current densities of transistor 1 and transistor 10 are set to be almost the same,
Furthermore, the emitter current densities of transistor 2 and transistor 9 are set to be approximately the same.

That is, in equation (16), V _BE1 - V _BE2 = V _BE10 - V _BE9 (22) holds true, so mismatching due to the voltage difference between V _BE1 and V _BE2 is eliminated.

Further, in the circuit shown in FIG. 3, the collector power supply of the transistor 9 is not used as an output current, but it can be taken out as an output current if necessary.

Furthermore, in the circuits of FIGS. 2 and 3, the gain in transistors 81 and 82 is greater in the circuit of the present invention than in the circuit in which transistor 81 is not used and the collector of transistor 2 is connected to the base of transistor 82. It also has the advantage of being difficult to oscillate because it is small.

Note that in the embodiments of the present invention shown in FIGS. 2 and 3, the output transistor is
Although PNP transistors are used, it goes without saying that the same effect can be expected even if all of these are replaced with NPN transistors and the transistors 81 and 82 are replaced with PNP transistors.

As described above, the current mirror circuit of the present invention includes a first transistor (corresponding to Embodiment 1) to which a reference current is supplied from the collector side via the input terminal X, and whose emitter is connected to one of the feed lines. and,
a second transistor (corresponding to 2) whose base is connected to the base of the first transistor and whose emitter is connected to the feed line via a resistor (corresponding to 7); A third transistor (corresponding to 81), which is complementary to the transistor, whose collector current is supplied from the collector of the second transistor and whose emitter is connected to the other power supply line; a fourth transistor (equivalent to 82) of the same type as the third transistor whose emitter is connected to the base of the transistor and whose emitter is connected to the other power supply line; and a fourth transistor whose emitter is connected to the emitter of the second transistor. The fifth transistor (corresponding to No. 9) is connected to the collector of the fourth transistor and whose base current is supplied from the collector of the fourth transistor.
a sixth transistor (corresponding to transistor 10) connected to the base of the fifth transistor and having its emitter connected to the power supply line; A seventh transistor (corresponding to the eleventh transistor) is provided.

Further, in the embodiment shown in FIG. 2, the output current is taken out from the collectors of the fifth, sixth, and seventh transistors, but in the embodiment shown in FIG. is configured to feed power from the negative feed line.

In this way, in the current mirror circuit of the present invention, the second
The collector current of the transistor is supplied as the collector current of the fourth transistor through complementary third and fourth transistors, and the collector current is supplied as the base current of at least the fifth transistor. Because of this structure, it operates with extremely low power supply voltage, is difficult to oscillate, and can obtain a large output current based on a small reference current while maintaining high precision matching. It has the following effect.

[Brief explanation of the drawing]

FIG. 1 is a circuit connection diagram showing a conventional example, and FIGS. 2 and 3 are circuit connection diagrams of a current mirror circuit according to an embodiment of the present invention. 1...First transistor, 2...Second transistor, 3, 4, 5...Transistor, 6,
7, 12, 13...Resistor, 81...Third transistor, 82...Fourth transistor, 9...Fifth transistor, 10...Sixth transistor, 11...Seventh transistor, A ...Positive power supply terminal, a...Positive power supply line, b...Minus power supply line, X...Input terminal, Y ₁ , Y ₂ ,
_Y3 ...Output terminal.

Claims (1)

[Claims] 1. A first transistor to which a reference current is supplied from the collector side, whose base and collector are connected, and whose emitter is connected to one of the feed lines, and whose base is connected to the base of the first transistor. connected,
a second transistor whose emitter is connected to the power supply line via a resistor; and a complementary transistor of the first and second transistors, wherein a collector current is supplied from the collector of the second transistor and a base and a third transistor whose collector is connected and whose emitter is connected to the other power supply line; the third transistor is of the same type as the third transistor, whose base is connected to the base of the third transistor, and whose emitter is connected to the other power supply line; a fourth transistor connected to a power supply line of the second transistor; and a fifth transistor whose emitter is connected to the emitter of the second transistor and whose base current is supplied from the collector of the fourth transistor; A current mirror circuit configured to take out an output current from the collector of a transistor. 2. A first transistor to which a reference current is supplied from the collector side, the base and collector are connected, and the emitter is connected to one power supply line, and the base is connected to the base of the first transistor,
a second transistor whose emitter is connected to the power supply line via a resistor, and which is complementary to the first and second transistors, the collector current being supplied from the collector of the second transistor and the base of the transistor being complementary to the first and second transistors; a third transistor whose collector is connected and whose emitter is connected to the other power supply line; the third transistor is of the same type as the third transistor, whose base is connected to the base of the third transistor, and whose emitter is connected to the other power supply line; a fourth transistor whose emitter is connected to the emitter of the second transistor and whose base current is supplied from the collector of the fourth transistor; a fifth transistor whose base is connected to the collector of the fourth transistor; a sixth transistor connected to the base of the fifth transistor and having an emitter connected to the power supply line; the collector of the fifth transistor is supplied with power from the other power supply line;
A current mirror circuit configured to take out an output current from the collector of a transistor.