JPS6330191B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a circuit for preventing a no-alarm or no-shutdown state caused by a fault in a track circuit that controls the device in a level crossing safety device for single-track sections. The purpose is to contribute to improving security.

Safety devices at level crossings in single-track sections of train tracks, such as alarms AL or gates G installed at level crossings H that intersect with the single-track track T shown schematically in Figure 1, are activated when a train approaches. One way to automatically control this is to
It consists of a track circuit OT of the required length centered on the O point of
This is a method in which OTR, ATR, and BTR (all not shown) are operated, and control is performed on the condition that the track relay is restored when a train enters any track circuit.

Figure 2 is an example of a conventional control logic circuit based on the above control method shown in Figure 1, where ASR is a memory relay for right direction operation of the train when the train enters the track circuit AT, and BSR is the track circuit The train's left direction operation memory relay when the train enters the BT, CR is the control relay of the safety device, and the alarm is activated by the recovery of the relay.
Drives devices such as AL and circuit breaker G, and stops the device by its operation. Also, memory relay
The contacts ATR and BTR inserted in the control circuits of ASR, BSR, and control relay CR are the first
These are the contacts of the track relays ATR and BTR, which are not shown in the diagram, and the contacts ASR and BSR are the memory relays.
These are the ASR and BSR contacts. Further, the contact OTR is the contact of the orbital relay OTR. (Hereafter, contact symbols are shown with the same symbol as the relay to which they belong.) Note that the first
It is assumed that each track circuit in the figure is composed of a non-insulated track circuit.

Next, as a premise for explaining the present invention, an outline of the operation of the conventional control logic circuit shown in FIG. 2 will be explained. First, when the train is not approaching the level crossing H in Figure 1, that is, when the track circuits AT, OT,
When no train is entering any BT, track relays ATR, OTR, and BTR are all operating, so both memory relays ASR and BSR in Figure 2 have their excitation circuits cut off and are in the recovery state. , and the control relay CR has its excitation circuit configured and is in operation. Therefore, the operation of the safety device at the level crossing H is stopped.

Now, when the train enters the track circuit AT from point L in the left direction, the track relay ATR is restored and the storage relay ASR is activated by the configuration of the excitation circuit via the restoration contact ATR and the restoration contact BSR.
In addition, control relay CR was restored due to recovery of orbital relay ATR.
When the excitation circuit is cut off and restored, the safety device is activated to start warning or shutting down the crossing. As the train progresses further, it steps on the track circuit OT and crosses the track circuit AT.
When BT is crossed, the orbital relays OTR and BTR are restored, and the self-holding circuit of the memory relay ASR is configured via the recovery contact BTR and the operation contact ASR. Therefore, the train passes through the track circuit AT and passes through the track relay.
Even if ATR operates, the operation of relay ASR is maintained. When the train advances and passes the track circuit OT, the track relay OTR is activated, and the control relay CR is activated by the excitation circuit via its contacts and operating contacts ATR and ASR to reset the safety device. During this time, the operating conditions of the left direction driving memory relay BSR are not configured at all, so the relay BSR remains in the restored state.

However, in the above operation, if a fault occurs in the track circuit BT that the train is approaching, for example, a voltage drop in the track circuit due to rain, the track relay BTR will be restored even after the train leaves the track circuit BT. Since it remains in the state, the memory relay in Figure 2
ASR self-holding circuit, i.e. recovery contact BTR,
Since the excitation circuit via its own operating contact ASR is not reset and the relay ASR continues to operate, the next time a train traveling from right to left approaches level crossing H and enters track circuit BT. However, since the control relay CR is energized by the control circuit via the operating contacts OTR, ATR, and ASR and remains in operation, the safety device at the level crossing H is not activated, resulting in no alarm and no shutoff. This also applies to the left direction driving memory relay BSR, and the control circuit shown in FIG. 2 has an extremely dangerous drawback.

The present invention constitutes a timing circuit that is involved before and after a train passes a railroad crossing, and depending on the timing conditions, for example, a train proceeding to the right from point L on track T in FIG.
The above memory relay is connected at point R on the right side of track circuit BT.
A train traveling to the left from point R on the ASR will be connected to the above memory relay at point L on the left side of track circuit AT.
This system is designed to forcefully restore each BSR, thereby eliminating the above-mentioned drawbacks of the conventional system.

Embodiments of the present invention will be described in detail below with reference to the drawings.

Figure 3 shows memory relays using coincidence output relays RR and LR of the timing circuit, an example of which is shown in Figure 4.
This is an example of a circuit that forcibly restores ASR and BSR.Recovery contacts RR and LR are inserted into the excitation circuits of memory relays ASR and BSR shown in Figure 2, respectively, and are excited by each operation of coincidence output relays RR and LR. The circuit is cut off to restore the memory relay ASR or BSR.

Figure 4 shows how the time before and after the train passes the level crossing is measured, and after passing the level crossing, for example, the timing of passing point R or L in Figure 1 is measured and the memory is relayed.
This is a circuit that generates a timing output that performs ASR or BSR recovery control. In other words, the time setting unit TA in FIG. (not shown) and measures the time Ta.
Then, this time Ta is multiplied by the ratio Bl/Al of the respective track circuit lengths Al and Bl of track circuits AT and BT, and the required margin time, for example, a time αt of about 10 seconds, is added (Ta×Bl/Al+αt). It is composed of a multiplier section Am that generates an output a for a set time length of , and drives an output relay _R1 .

Furthermore, the timekeeping section TO is shown in FIG. 4B. Operating conditions of said output relay _R1 and orbital relay OTR,
In other words, the counting of clock pulses cp is started by the setting output of the time setting unit TA and the operation of the control relay ISR, which operates on the condition that the train advances from the track circuit OT, that is, passes through a level crossing, and its timing output b is compared. The comparator AO compares it with the setting output a of the setting unit TA, and when the time lengths of both match, the comparator
The output of AO activates the coincidence output relay RR.

Similarly, the time setting part TB in FIG.
It consists of an adder Ba that measures , and a multiplier Bm that generates an output d for a set time length of (Tb×Al/Bl+βt) and drives the output relay _L1 . In addition, in this case, the timing section TO is based on the operating conditions of the output relay _L1 shown in Figure B and the orbital relay OTR.
The counting of clock pulses cp is started by the operation of the control relay ISR which is driven under the operating conditions of
is compared with the set output d of , and when the time lengths of both match, the match output relay LR is activated by the output of the comparator BO.

The functions of the circuit shown in FIG. 4 have been described above. Next, an outline of the circuit operation as the train progresses will be described, mainly for the case where the train moves from left to right.

On track T in Figure 1, the train is on track circuit AT
When the track relay ATR is restored, the addition unit Aa of the time setting unit TA in Figure 4A is activated.
starts counting clock pulses CP via the recovery contact ATR, and continues until the recovery contact OTR is opened, that is, the train passes the level crossing and the track relay OTR is activated. The measurement time Ta obtained by counting these clock pulses is multiplied by the track circuit length ratio Bl/Al in the multiplier Am, and then the margin time αt
Timing output a is generated for a set time length by adding , and drives output relay R _1. However, this time length (Ta×Bl/Al+αt) is such that there is little change in train speed before and after passing the level crossing. is preset as the length of time from when the train passes the railroad crossing until it passes point R. Therefore, the clock pulse cp starts counting by the operation of the control relay ISR which operates under the operating conditions of the output relay _R1 and the track relay OTR, and the clock output b of the clock unit TO measures the actual time after the train passes the level crossing.
is compared with the set output a of the setting unit TA by the comparator AO, and when the relay RR is operated based on the matched output, it means that the train has passed the point R. Thus, the memory relay ASR is forcibly restored when the train advances through the track circuit BT and passes point R.

The above is the same for the coincidence output relay LR, and the memory relay BSR is used when the train is connected to the track circuit.
When advancing through AT and passing point L, it is forcibly restored. In addition, by setting the timer, comparator, and conditional circuit as shown in Figure 4, it is possible to restore the memory relay ASR or BSR regardless of the train speed and train length, and the short-circuit condition of the track circuit can be temporarily faulty. It is characterized by the fact that it continues to add and count even when Note that each timer TA, TO, and TB are cleared by the operation of the coincidence output relay RR or LR as shown in the figure, and the control relay ISR is restored.

FIG. 5 is a circuit diagram of operating conditions for cut-off relays RR' and LR' which restore memory relays ASR or BSR with a simple circuit in place of coincidence output relays RR and LR in FIG. 4. In other words, Figure 5 shows the cut-off relay RR′,
Through the recovery contact of LR′, the control relay is activated on the condition that the track relay OTR is restored, that is, the train passes through the level crossing.
After operating ISR′, the operation is self-maintained,
A memory relay ASR or BSR is activated by driving a time relay UR that measures a certain period of time through its operating contact ISR', and after that certain period of time, by driving a cutoff relay RR' or LR' through its operating contact UR.
This circuit is designed to restore the However, the fixed time mentioned here takes into account the minimum speed and maximum train length of the trains passing through the track circuit OT.
This must be the time when the rear of the train finishes passing through the track circuit BT.

As described in the above embodiment, the present invention prevents the extremely dangerous defect of the control logic circuit of the conventional level crossing safety device as shown in FIG. This has a remarkable effect on improving the security of the seeding device.

[Brief explanation of the drawing]

Fig. 1 is a schematic diagram of the track circuit arrangement for controlling a level crossing in a single track section and its equipment, Fig. 2 is a conventional level crossing control logic circuit diagram, Fig. 3 is a circuit diagram in which the present invention is applied to the same circuit, and FIG. 4 is a timing comparison circuit and its conditional circuit diagram as an embodiment of the present invention, and FIG. 5 is a simplified substitute circuit diagram of the present invention. H: Level crossing, T: Track, OT, AT, BT: Track circuit, ATR, BTR, OTR: Track relay,
ASR: Right direction memory relay, BSR: Left direction memory relay, CR: Control relay, AL: Level crossing alarm, G: Level crossing barrier, TA, TB: Time setting section,
TO: Timing section, AO, BO: Comparator, ISR: Control relay, R ₁ , L ₁ : Output relay, RR, LR: Match output relay.

Claims (1)

[Claims] 1. A level crossing track circuit with at least a length of track that intersects with the level crossing, and track circuits with a required length adjacent to the left and right sides of the level crossing track circuit, respectively, are provided, and a track relay is provided in each of the track circuits, and a train approaching the level crossing is provided. The traveling direction of the train is detected by the activation of either of the left and right track relays, and one of the traveling direction memory relays is activated, and by the activation of the level crossing detection relay and the left or right traveling direction memory relay. Activating a control relay for operating a level crossing safety device, driving the level crossing safety device by the control relay, and driving the safety device based on the detection condition of the train passing through the level crossing by the level crossing track relay and the operating condition of the traveling direction memory relay. In a level crossing safety device for a single track section that resets a control relay for a single track section, the required time is set by measuring the time from the detection of a train approaching a level crossing by the left and right track relays to the detection of a train passing through the level crossing by the level crossing track relay. A time setting circuit that generates an output with a time length of A non-alarm prevention circuit for a level crossing safety device in a single track section, characterized in that a coincidence output relay is activated on the condition that the time length agrees with the set time length, and the traveling direction memory relay is reset by the activation of the coincidence output relay.