JPS6342297B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of diagnosing a failure of a data processing apparatus, and more particularly to a method of diagnosing a failure of a data processing apparatus in which an interrupt is applied at a predetermined period.

It has become essential for data processing devices with complex functions to have a self-diagnosis function to detect failures. Conventional fault diagnosis methods use the processor, which is a part of a data processing device, to diagnose other parts of the device on the premise that the processor itself is normal.

However, the problem was that the processor itself could not be diagnosed.

The present invention has been made in view of the above-mentioned conventional problems, and an object of the present invention is to provide a fault diagnosis method that can perform self-diagnosis on the entire device by monitoring periodic interrupts to the processor. With the goal.

An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of a processor implementing the method of the present invention. As shown in the figure, timers 2 and 3 and an interrupt controller 4 are connected to the processor 1 via a bus 1a, and the interrupt controller 4 requests the processor to execute interrupt processing at a predetermined period T.

FIG. 2 is a flowchart of a main program showing the operation of processor 1 shown in FIG. Memory N built in processor 1 in processing P1
is set to 0, and a predetermined value is set to timer 2 in process P2.
_Y2I is set and interrupt prohibition is canceled in process P3. As a result, timer 2 starts counting down linearly from Y _2I so that it reaches zero after time Y _2I , and processor 1 becomes able to accept interrupts. The value is increased by 1, and the number of interrupt processing times becomes known as the value of N. In process P4, it is determined whether the memory N is larger than a predetermined number M, and if N≧M, the process advances to process P5. Processing P
In step 5, interrupts are prohibited, processing is performed without any failure, and a series of failure diagnosis processing is completed. On the other hand, when N≧M does not hold, that is, when the number of interrupt processing times N does not reach the predetermined number M, the process advances to process P6 and reads the countdown value of timer 2 (the read value is hereinafter referred to as _Y2 ). In process P7, _Y2 is compared with a predetermined determination value A, and when A≦ _Y2 , the process returns to process P4. If A≦Y ₂ is not true, that is, if the number of interrupts does not reach M or more within the time it takes for timer 2 to count down to the judgment value A, it is assumed that there is an abnormality in the device, and a failure is displayed in process P8. do.

FIG. 3 is a flowchart of interrupt processing. In process P10, it is determined whether the merit N is 0 or not. When N=0, the process advances to process P11 and the value of N is increased by 1. In process P12, a value Y _3I is set in the timer 3 to start counting down linearly from Y _3I so that it becomes zero after a time Y _3I , and the interrupt process ends. On the other hand, when it is determined in process P10 that N≠0, the process proceeds to process 13 and reads the countdown value of timer 3 (hereinafter the read value will be referred to as _Y3 ). In process P14, it is determined that X≧Y ₃ ≧Z, and if yes, proceed to process P11; if no, proceed to process P15, and if countdown value Y ₃ does not exist within the range defined by X and Y, Indicates that there is a problem with the device.

FIG. 4 shows the changes in timers 2, 3 and memory N when an interrupt request signal with a constant period T as shown in b is supplied to the interrupt controller 4 under the program configured as described above. This is a timing chart showing the state, with time t on the horizontal axis and respective count values on the vertical axis. However, it is assumed that the interrupt is made at the rising edge of the signal output from the interrupt controller 4 shown in b.

As shown in Figure 4c, when the main program's process P2 (setting of timer 2) is executed at time _t0 , the count value _Y3 of timer 2 has a constant slope as the count progresses, that is, with time. It decreases with . Until time _t1 , the setting of timer 3 based on the interrupt has not been executed, so the count value _Y3 of timer 3 is indefinite, as shown by the broken line in FIG. 4a. , the signal from the interrupt controller 4 rises at time t ₁ , an interrupt is generated, and the count value Y ₃ of the timer 3 is set to a certain value Y _3I as shown in a. After that, it decreases with a constant slope over time. d indicates the changing state of the memory N.

Thereafter, when an interrupt is issued again at time _t2 , processor 1 responds by reading the count value _Y3 of timer 3 at that time and comparing it with predetermined set values X and Y. If Z≦Y ₃ ≦X holds true for the count value Y ₃ , it is assumed that the device is functioning normally, and the value Y _3I is set in the timer 3 again, and the operations described above are repeated. Therefore, the contents of timer 3 change as shown by a. However,
As shown in b, even though periodic interrupts are being made, the interrupts are executed irregularly, and the count value Y ₃ of timer 3 becomes Y ₃ >X or Y ₃ <Z. In other words, if it is outside the range of Z≦Y ₃ ≦X as shown in Figure 5, it is determined that there is a failure in the interrupt processing function, and the failure is detected by processing 15 in Figure 3. Display.

As described above, according to the present invention, it is determined that the timer and interrupt functions are normal during execution of the interrupt program, and a failure during execution of the main program is determined based on the normal interrupt processing. Therefore, fault diagnosis can be made extremely accurate. Further, since fault diagnosis is performed using an interrupt controller and a timer, there is no need for any special equipment, and there is an advantage that sufficient fault self-diagnosis results can be obtained.

[Brief explanation of the drawing]

Figure 1 is a block diagram showing the configuration of the processor;
The figure is a flowchart of the main program, Figure 3 is a flowchart of the interrupt processing program, Figure 4 is a timing chart showing the status of each part when there is no failure in the equipment, and Figure 5 is a diagram when there is a failure in the equipment. This is a timing chart showing the status of each part. 1... Processor, 2, 3... Timer, 4...
Interrupt controller.

Claims (1)

[Claims] 1. A processor that becomes able to accept interrupt requests by canceling interrupt prohibition, and a value set by the processor as an initial value, and a linear countdown from the initial value to zero after a set time, and
A first timer and a second timer whose countdown values can be read by the processor, an interrupt controller that outputs an interrupt request to the processor at a predetermined period, and a controller built in the processor that increases a memory value by 1 each time an interrupt process is executed. After the memory value is set to zero by executing the main program, an initial value is set in the first timer to cause the first timer to start counting down, and then the processor is disabled from interrupts. If the memory value does not exceed a predetermined value by the time the first timer counts down to a certain value, it is determined that there is a failure in the timer or the interrupt function. determine, set an initial value to the second timer during execution of the interrupt program, cause the second timer to start counting down, and at the next interrupt processing, the counted down value of the second timer is within a predetermined range. 1. A failure diagnosis method for a data processing device, characterized in that a timer and an interrupt function are determined to be normal on the condition that the timer and interrupt functions are within the above range.