JPS6346466B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a single-chip microcomputer system, particularly a single-chip microcomputer SCMP in which computer components such as an input/output control section, an arithmetic control section, a program memory, and a data memory are integrated on a single chip. and an external memory directly controlled by the single-chip microcomputer.

Generally, when constructing a single microcomputer system using an expandable single-chip microcomputer SCMP that allows direct control of external memory, the external memory is simply treated as an extension of the internal memory.

However, recently, as the built-in memory capacity has increased due to advances in LSI technology, for example,
A high-level language interpreter such as BASIC and a small-scale operating system OS such as a real-time monitor are stored in the on-chip program memory, and other application programs, such as task programs that utilize the real-time monitor, are stored in off-chip memory. Structures that allow users to memorize data have come to be adopted.

The background of this technology is that by loading the core programs of a computer system, such as the operating system OS, into the internal memory of a microcomputer, the functionality of the microcomputer itself can be enhanced. The intention is to facilitate the creation of In other words, by providing microcomputers with more logical and high functionality, we will increase the productivity of microcomputer application software,
Its purpose is to increase the usability of microcomputers themselves.

By the way, when a core program such as an operating system OS is stored in a chip's internal memory, the following problems arise.

The operating system OS monitors a large number of user tasks under certain control algorithms and provides an efficient parallel operating environment. For this reason, the operating system OS has control tables called task control block TCB, system control block SCB, etc. in RAM.

These control tables are data structures that must be read and written by the operating system OS itself, and cannot be accessed by user tasks. In other words, not only writing but even reading results in the operating system
It is prohibited as it may disrupt the control of the OS.

A conventional single-chip microcomputer system includes an external memory for storing task programs; a program memory configured on one chip for storing an operating system; and a data memory for storing control tables used by the operating system. a program counter storing a program address for reading the operating system and the task program; and an access generated based on the read operating system, the control table, and the task program supplied via a data bus. a single-chip microcomputer comprising a memory address generator that supplies addresses to the program counter, data memory, and external memory via an address bus;

Next, a conventional single-chip microcomputer system will be described with reference to the drawings.

FIG. 1 is a block diagram showing an example of a conventional expandable single-chip microcomputer system.

Chip 1 includes various elements, including a memory address generator 2 and usually a read-only memory.
It includes a program memory 3 made up of ROM and addressed by a program counter 16, a data memory 4 usually made up of random access memory RAM, an arithmetic control section 5, and an input/output control section 6.

The address bus 10 is for transferring addresses, and the data bus 11 is for transferring data. These addresses and data are stored in buffers 7 and 8, and external address bus 12 and external data bus 13 to external memory 9.
is connected to. The control unit 14 is a control unit for operating each of the above-mentioned elements.

Furthermore, when an interrupt factor occurs, the interrupt control circuit 15 saves the currently executing program address and other states under the control of the control unit 14, and sets the program address to a specific interrupt processing routine. .

FIG. 2 is an explanatory diagram for explaining address spaces of the program memory 3, data memory 4, and external memory 9 shown in FIG. 1.

It is assumed that the program memory 3, which is a read-only memory ROM, and the data memory 4, which is a random access memory RAM, are each located inside the chip and are accessed by small address values. Boundary address a is an address indicating the boundary between data memory 4 and program memory 3, and boundary address b
is an address indicating the boundary between the program memory 3 and the external memory 9.

Now, suppose that in a conventional expandable single-chip microcomputer system, the operating system OS is placed inside the chip and the user tasks are placed outside the chip. Therefore, it is not possible to prevent unauthorized access to the control block from the user task described above.

However, if you simply prohibit unauthorized access from user tasks, you will not be able to investigate what causes or why the unauthorized access occurred.

In other words, while it is important to prohibit unauthorized access during debugging, it is even more important to investigate the cause.

However, conventional single-chip microcomputer systems have the disadvantage that even if unauthorized access occurs, it cannot be detected.

An object of the present invention is to provide a microcomputer system that can detect occurrence of unauthorized access.

That is, the object of the present invention is based on the above-mentioned invention, and is devised to improve the productivity of microcomputer application software in a total sense, not only during program execution but also during debugging, and is expandable. A first instruction means for a single-chip microcomputer SCMP, which indicates whether the program being executed is in external memory or not, and whether the memory accessed by the program being executed is on-chip memory or off-chip memory. and detecting means for distinguishing between the two, and when the detecting means detects an access execution operation to the internal memory in a state where the indicating means indicates that a program on the external memory is being executed. An object of the present invention is to provide an expandable single-chip microcomputer system that can generate an interrupt, check for illegal access, and analyze the cause using an interrupt processing program.

The single-chip microcomputer system of the present invention includes an external memory for storing task programs; a program memory configured on one chip for storing an operating system; and data for storing control tables used by the operating system. a memory, a program counter storing a program address for reading the operating system and the task program, and a program counter that stores a program address for reading the operating system and the control table and the task program provided via a data bus; a memory address generator supplying access addresses to the program counter, data memory, and external memory via an address bus; the program address designating an address of the task program; and the access address designating an address of the control table. a single-chip microcomputer comprising unauthorized access detection means for outputting a drive signal for driving the interrupt control circuit when the interrupt control circuit is in use;

That is, the single-chip microcomputer system of the present invention integrates the input/output control section, arithmetic control section, program, and data memory, which are the components of a computer, on one chip, and directly connects external memory. It includes a controllable single-chip microcomputer, and includes (1) a first detecting means for distinguishing whether the program being executed is in the memory inside the chip or in the memory outside the chip; and (2) the execution (3) a state in which the first detection means detects that the program being executed is outside the chip; and interrupt generating means for generating an interrupt when a read or write operation to the memory inside the chip is detected by the second detecting means.

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 3 is a block diagram showing one embodiment of the single-chip microcomputer of the present invention.

The single-chip microcomputer system shown in FIG. 3 includes, in addition to the single-chip microcomputer shown in FIG.
18, comparators 19 and 20, OR circuit 21, AND circuit 22, and comparator 2
0 and a drive circuit 23 that receives the output signal of the AND circuit 22 and drives the interrupt control circuit 15.

Numerical value generation circuit 17 generates boundary address a. Comparator 19 compares boundary address a with access address c transferred via address bus 10,
When the access address c is less than or equal to the boundary address a, that is, when it is detected that it points to the RAM within the chip, a signal of "1" is sent to the AND circuit 22 as the RAM access signal d. The OR circuit 21 receives the memory read or memory write operation signals MR and MW output from the control unit 14 . Therefore, when an access (read or write) operation to the ROM or RAM occurs, a signal of "1" is sent to the AND circuit 22 as the memory access signal e. That is, AND circuit 2
2 outputs a RAM access display signal f when the access address c is less than or equal to the boundary address a.
Access to RAM will be detected.

Numerical value generation circuit 18 generates boundary address b. The comparator 20 receives this boundary address b and the program address g output from the program counter 16, and its comparison output indicates whether the currently executing program is outside the chip or inside the chip. ing. Here, a signal of "1" is output as the off-chip program execution signal h while the off-chip program is being executed. While the program inside the chip is being executed, the outside-chip program execution signal h becomes a "0" signal.

In the drive circuit 23, the output signals of the AND circuit 22 and the comparator 20 are both "1", that is,
When both the RAM access display signal f and the off-chip program execution signal h are supplied, a drive signal m is generated and the interrupt control circuit 15 generates an interrupt.

As described above, according to the present invention, by adding a small amount of hardware to the chip, it is possible to detect in advance the destruction of program logic due to illegal access to the memory on the chip, and to check the cause of the illegal access. A single-chip microcomputer system can be realized.

The single-chip microcomputer system according to the present invention is an effective means for improving software reliability and productivity in response to the so-called on-chip tendency of software, in which software is integrated within a microcomputer, that is, on a chip.

By adding and integrating unauthorized access detection means on a single chip, the single-chip microcomputer system of the present invention detects unauthorized access when a control table write/read instruction is issued during execution of a task program. This has the effect of preventing destruction of the control table because it can generate an interrupt.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an example of the conventional technology, FIG. 2 is an explanatory diagram for explaining address spaces of various memories shown in FIG. 1, and FIG. 3 is a block diagram showing an embodiment of the present invention. . 1, 1'...chip, 2...memory address generation section, 3...program memory, 4...data memory, 5...arithmetic control section, 6...input/output control section,
7, 8...batshua, 9...external memory, 10...
...Address bus, 11...Data bus, 12...
External address bus, 13...External data bus, 1
4...Control unit, 15...Interrupt control circuit, 16...
Program counter, 17, 18... Numerical value generation circuit, 19, 20... Comparator, 21... OR circuit,
22...AND circuit, 23...Drive circuit, a, b
...Boundary address, c...Access address, d
...RAM access signal, e...memory access signal, f...RAM access display signal, g...program address, h...external program execution signal, m...drive signal.

Claims (1)

[Claims] 1. External memory for storing task programs;
A program memory configured on one chip and storing an operating system, a data memory storing a control table used by the operating system, and a program address for reading the operating system and the task program. a program counter that supplies access addresses generated based on the read operating system, the control table, and the task program supplied via a data bus to the program counter, data memory, and external memory via an address bus; a memory address generator that outputs a drive signal for driving an interrupt control circuit when the program address indicates an address of the task program and the access address indicates an address of the control table; 1. A single-chip microcomputer system comprising: a single-chip microcomputer comprising access detection means; and;